GB1023960A - Phase slope delay network - Google Patents

Abstract

1,023,960. Phase delay network. STANDARD TELEPHONES & CABLES Ltd. Feb. 12, 1965 [Feb. 13, 1964], No. 6172/65. Heading H3U. A circuit for delaying an incident signal comprises means for slicing the frequency spectrum of the signal into a plurality of bands; means coupled to said slicing means for adding a phase shift to each band proportional to the centre frequency thereof; and means coupled to said adding means for combining the phase shifted bands and producing a delayed replica of the signal. Fig. 3a shows an LCR iterative network to produce four band slicing having cross-over frequencies F 1 , F 2 , F 3 , Fig. 3b. In this network L 11 C 12 > L 1 C 2 >L 21 C 21 and e 11 +e 12 +e 21 +e 22 =e in at all frequencies. In Fig. 5 the incident signal to be delayed is applied to an all-pass filter bank 51 composed as in Fig. 3a but extended by iteration. The output of each filter, e.g. the filter having a centre frequency Fr, is fed to an R-C phase shifter network 52r having two outputs separated in phase leg 90 degrees, the two outputs corresponding to the sine and cosine of the frequency Fr and being fed tobalanced modulators 53r, 54r. The other inputs of the modulators are D.C. voltages proportional to the sine and cosine of a variable phase angle α; this angle a when plotted against the frequency to which it is applied must give a substantially linear function, the slope of which is dependent upon the desired delay. The sine and cosine D.C. voltages are obtained from balanced modulators 56r, 57r whose inputs are the voltage from the voltage controlled oscillator 58 and a voltage from a tap on the delay line 59 fed by the same V.C.O. Since the delay line has a tap corresponding to each set of associated balanced modulators and each tap along the line introduces greater delay the application of the resultant modulator outputs to the filter derived frequencies fed to the other group of modulators, e.g. 53r, 54r, produces the linear function sought. Thus, the output of the first tap on the delay line 59 produces the D.C. sine and cosine voltages for the lowest signal frequency band, the second tap the sine and cosine voltages for the second lowest band, and so on. The variation in the slope of phase vs. frequency, and hence the overall delay is produced by varying the control voltage of VCO 58. The delayed signal is produced by a summing amplifier 55.