GB1022683A - Improvements in and relating to hybrid analogue-digital computing equipment - Google Patents

Abstract

1,022,683. Electric analogue calculating. IBM UNITED KINGDOM HOLDINGS Ltd. Aug. 19, 1963 [Aug. 29, 1962], No. 33205/62. Heading G4G. Hybrid computing equipment for performing arithmetical operations in a sequence of stages using operators in digital form and operands in analogue form, includes analogue storage means to store the partial results of the arithmetical operations derived from the successive stages in the sequence for a period long enough to permit the modification of the digital operator controlling the next stage in the sequence, thereby holding the analogue partial result of one stage for a period before it is supplied as an operand to the next stage in the operation. Fig. 3 shows the basic unit of the equipment which comprises a digital register 10 of binary or decimal form controlling an impedance network 11. The network 11 multiplies the digital input D by the signal V r supplied to terminal 13 to provide one input to a high gain amplifier 12. The other input to amplifier 12 is an analogue signal at terminal 16, and the output of the amplifier may either be the difference of the two inputs or the sum of the two inputs with reversed polarity (Fig. 4, not shown) according to the nature of the amplifier. With terminal 16 earthed (Fig. 5, not shown), the circuit operates either as a multiplier, with a second input supplied to terminal 13, or as a digital to analogue converter, with a reference signal supplied to terminal 13. With terminal 15 connected to terminal 13 (Fig. 6, not shown) to give negative feedback, the circuit divides the input applied at terminal 16 by the digital input D. In Fig. 7 the output of the amplifier 12 is fed to a comparator 17 which is also supplied with a reference signal. The comparator adjusts the digital register 10 until its inputs are equal, and the register 10 then indicates the digital equivalent of the analogue input at terminal 16. The basic circuit is combined with an analogue store, a main digital store, and gating circuits (Fig. 8, not shown) and may be programmed to perform arithmetical calculations. An example is given of a programme for calculating (P+p) C(1+at), (Fig. 9, not shown). An example is also given of a programme for calculating the square root of P using the iteration Y n+1 =0À5 (Y n +P/Y), Fig. 10 (not shown).