GB0800671D0 - Data communication device - Google Patents
Data communication deviceInfo
- Publication number
- GB0800671D0 GB0800671D0 GB0800671A GB0800671A GB0800671D0 GB 0800671 D0 GB0800671 D0 GB 0800671D0 GB 0800671 A GB0800671 A GB 0800671A GB 0800671 A GB0800671 A GB 0800671A GB 0800671 D0 GB0800671 D0 GB 0800671D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- communication device
- data communication
- data
- communication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
- H04L25/0274—Arrangements for ensuring balanced coupling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0800671A GB2456517A (en) | 2008-01-15 | 2008-01-15 | Serial data communication circuit for use with transmission lines using both data and clock to enable recovery of data synchronously |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0800671A GB2456517A (en) | 2008-01-15 | 2008-01-15 | Serial data communication circuit for use with transmission lines using both data and clock to enable recovery of data synchronously |
Publications (2)
Publication Number | Publication Date |
---|---|
GB0800671D0 true GB0800671D0 (en) | 2008-02-20 |
GB2456517A GB2456517A (en) | 2009-07-22 |
Family
ID=39144942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0800671A Pending GB2456517A (en) | 2008-01-15 | 2008-01-15 | Serial data communication circuit for use with transmission lines using both data and clock to enable recovery of data synchronously |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2456517A (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9374216B2 (en) | 2013-03-20 | 2016-06-21 | Qualcomm Incorporated | Multi-wire open-drain link with data symbol transition based clocking |
US9363071B2 (en) | 2013-03-07 | 2016-06-07 | Qualcomm Incorporated | Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches |
US9313058B2 (en) | 2013-03-07 | 2016-04-12 | Qualcomm Incorporated | Compact and fast N-factorial single data rate clock and data recovery circuits |
US9735948B2 (en) | 2013-10-03 | 2017-08-15 | Qualcomm Incorporated | Multi-lane N-factorial (N!) and other multi-wire communication systems |
US9203599B2 (en) | 2014-04-10 | 2015-12-01 | Qualcomm Incorporated | Multi-lane N-factorial (N!) and other multi-wire communication systems |
US9755818B2 (en) | 2013-10-03 | 2017-09-05 | Qualcomm Incorporated | Method to enhance MIPI D-PHY link rate with minimal PHY changes and no protocol changes |
ES2881302T3 (en) * | 2014-03-06 | 2021-11-29 | Qualcomm Inc | Clock recovery circuit for multi-wire data signals |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60261092A (en) * | 1984-06-07 | 1985-12-24 | Nec Corp | Storage device |
JP2003143119A (en) * | 2001-11-02 | 2003-05-16 | Matsushita Electric Ind Co Ltd | Communication apparatus and communication method |
US7020227B1 (en) * | 2002-05-31 | 2006-03-28 | Acard Technology Corporation | Method and apparatus for high-speed clock data recovery using low-speed circuits |
JP4950534B2 (en) * | 2006-03-28 | 2012-06-13 | 株式会社リコー | Clock data recovery control circuit |
WO2007125965A1 (en) * | 2006-04-27 | 2007-11-08 | Panasonic Corporation | Multiplex differential transmission system |
WO2007125963A1 (en) * | 2006-04-27 | 2007-11-08 | Panasonic Corporation | Multiple differential transmission system |
CN101188490B (en) * | 2006-09-25 | 2013-04-10 | 晶像股份有限公司 | Method and system for recovering time series information from serial data stream and serial clock data recoverying circuit |
JP2008090408A (en) * | 2006-09-29 | 2008-04-17 | Nec Electronics Corp | Microcomputer, data writing device, and its writing method |
-
2008
- 2008-01-15 GB GB0800671A patent/GB2456517A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
GB2456517A (en) | 2009-07-22 |
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