GB0700381D0 - Generalised Hypothetical Reference Decoder for Scalable Video Coding with Bitstream Rewriting - Google Patents

Generalised Hypothetical Reference Decoder for Scalable Video Coding with Bitstream Rewriting

Info

Publication number
GB0700381D0
GB0700381D0 GB0700381A GB0700381A GB0700381D0 GB 0700381 D0 GB0700381 D0 GB 0700381D0 GB 0700381 A GB0700381 A GB 0700381A GB 0700381 A GB0700381 A GB 0700381A GB 0700381 D0 GB0700381 D0 GB 0700381D0
Authority
GB
United Kingdom
Prior art keywords
generalised
video coding
scalable video
reference decoder
hypothetical reference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
GB0700381A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Information Technology Corp
Mitsubishi Electric R&D Centre Europe BV Netherlands
Original Assignee
Mitsubishi Electric Information Technology Corp
Mitsubishi Electric Information Technology Center Europe BV Nederlands
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Information Technology Corp, Mitsubishi Electric Information Technology Center Europe BV Nederlands filed Critical Mitsubishi Electric Information Technology Corp
Priority to GB0700381A priority Critical patent/GB0700381D0/en
Publication of GB0700381D0 publication Critical patent/GB0700381D0/en
Priority to PCT/GB2007/004661 priority patent/WO2008084184A2/en
Priority to GB0913754A priority patent/GB2458620A/en
Ceased legal-status Critical Current

Links

GB0700381A 2007-01-09 2007-01-09 Generalised Hypothetical Reference Decoder for Scalable Video Coding with Bitstream Rewriting Ceased GB0700381D0 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB0700381A GB0700381D0 (en) 2007-01-09 2007-01-09 Generalised Hypothetical Reference Decoder for Scalable Video Coding with Bitstream Rewriting
PCT/GB2007/004661 WO2008084184A2 (en) 2007-01-09 2007-12-06 Generalised hypothetical reference decoder for scalable video coding with bitstream rewriting
GB0913754A GB2458620A (en) 2007-01-09 2009-08-06 Generalised hypothetical reference decoder for scalable video coding with bitstream rewriting

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0700381A GB0700381D0 (en) 2007-01-09 2007-01-09 Generalised Hypothetical Reference Decoder for Scalable Video Coding with Bitstream Rewriting

Publications (1)

Publication Number Publication Date
GB0700381D0 true GB0700381D0 (en) 2007-02-14

Family

ID=37801922

Family Applications (2)

Application Number Title Priority Date Filing Date
GB0700381A Ceased GB0700381D0 (en) 2007-01-09 2007-01-09 Generalised Hypothetical Reference Decoder for Scalable Video Coding with Bitstream Rewriting
GB0913754A Withdrawn GB2458620A (en) 2007-01-09 2009-08-06 Generalised hypothetical reference decoder for scalable video coding with bitstream rewriting

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB0913754A Withdrawn GB2458620A (en) 2007-01-09 2009-08-06 Generalised hypothetical reference decoder for scalable video coding with bitstream rewriting

Country Status (2)

Country Link
GB (2) GB0700381D0 (en)
WO (1) WO2008084184A2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9565431B2 (en) * 2012-04-04 2017-02-07 Qualcomm Incorporated Low-delay video buffering in video coding
US9319703B2 (en) * 2012-10-08 2016-04-19 Qualcomm Incorporated Hypothetical reference decoder parameter syntax structure
CA2908888C (en) 2013-04-07 2019-04-02 Sharp Kabushiki Kaisha Signaling change in output layer sets
US9591321B2 (en) 2013-04-07 2017-03-07 Dolby International Ab Signaling change in output layer sets
WO2014168890A1 (en) 2013-04-08 2014-10-16 General Instrument Corporation Individual buffer management in video coding
US10070140B2 (en) 2013-04-08 2018-09-04 Hfi Innovation Inc. Method and apparatus for quantization matrix signaling and representation in scalable video coding
US10567804B2 (en) * 2014-01-08 2020-02-18 Qualcomm Incorporated Carriage of HEVC extension bitstreams and buffer model with MPEG-2 systems
US10205949B2 (en) 2014-05-21 2019-02-12 Arris Enterprises Llc Signaling for addition or removal of layers in scalable video
WO2015179596A1 (en) 2014-05-21 2015-11-26 Arris Enterprises, Inc. Individual buffer management in transport of scalable video
JP7482864B2 (en) * 2019-06-18 2024-05-14 パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカ Encoding device, decoding device, encoding method, and decoding method

Also Published As

Publication number Publication date
WO2008084184A2 (en) 2008-07-17
GB2458620A (en) 2009-09-30
WO2008084184A3 (en) 2008-09-12
GB0913754D0 (en) 2009-09-16

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Legal Events

Date Code Title Description
AT Applications terminated before publication under section 16(1)