GB0219278D0 - Method and apparatus for secure configuration of a field programmable gate array - Google Patents
Method and apparatus for secure configuration of a field programmable gate arrayInfo
- Publication number
- GB0219278D0 GB0219278D0 GBGB0219278.9A GB0219278A GB0219278D0 GB 0219278 D0 GB0219278 D0 GB 0219278D0 GB 0219278 A GB0219278 A GB 0219278A GB 0219278 D0 GB0219278 D0 GB 0219278D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- programmable gate
- gate array
- field programmable
- secure configuration
- secure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S40/00—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
- Y04S40/20—Information technology specific aspects, e.g. CAD, simulation, modelling, system security
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB9930145.9A GB9930145D0 (en) | 1999-12-22 | 1999-12-22 | Method and apparatus for secure configuration of a field programmable gate array |
US18111800P | 2000-02-08 | 2000-02-08 | |
PCT/GB2000/004988 WO2001046810A1 (en) | 1999-12-22 | 2000-12-22 | Method and apparatus for secure configuration of a field programmable gate array |
Publications (3)
Publication Number | Publication Date |
---|---|
GB0219278D0 true GB0219278D0 (en) | 2002-09-25 |
GB2375418A GB2375418A (en) | 2002-11-13 |
GB2375418B GB2375418B (en) | 2004-06-23 |
Family
ID=26316136
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0219278A Expired - Fee Related GB2375418B (en) | 1999-12-22 | 2000-12-22 | Method and apparatus for secure configuration of a field programmable gate array |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU2209301A (en) |
GB (1) | GB2375418B (en) |
WO (1) | WO2001046810A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2368669B (en) * | 2000-10-31 | 2005-06-22 | Advanced Risc Mach Ltd | Integrated circuit configuration |
JP2004007472A (en) | 2002-03-22 | 2004-01-08 | Toshiba Corp | Semiconductor integrated circuit, data transfer system, and data transfer method |
US7747025B1 (en) | 2005-11-22 | 2010-06-29 | Xilinx, Inc. | Method and apparatus for maintaining privacy of data decryption keys in configuration bitstream decryption |
US7693596B2 (en) * | 2005-12-14 | 2010-04-06 | Dell Products L.P. | System and method for configuring information handling system integrated circuits |
KR101303278B1 (en) | 2011-12-14 | 2013-09-04 | 한국전자통신연구원 | FPGA apparatus and method for protecting bitstream |
CN111709203B (en) * | 2020-05-09 | 2023-08-15 | 芯创智(北京)微电子有限公司 | FPGA optimization method and system for star topology of maintenance system |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997025675A1 (en) * | 1996-01-10 | 1997-07-17 | John Philip Griffits | A secure pay-as-you-use system for computer software |
US5970142A (en) * | 1996-08-26 | 1999-10-19 | Xilinx, Inc. | Configuration stream encryption |
FR2760871B1 (en) * | 1997-03-13 | 1999-04-16 | Bull Cp8 | METHOD FOR STORING AND EXPLOITING SENSITIVE INFORMATION IN A SECURITY MODULE, AND RELATED SECURITY MODULE |
US6654889B1 (en) * | 1999-02-19 | 2003-11-25 | Xilinx, Inc. | Method and apparatus for protecting proprietary configuration data for programmable logic devices |
US6351814B1 (en) * | 1999-07-21 | 2002-02-26 | Credence Systems Corporation | Field programmable gate array with program encryption |
-
2000
- 2000-12-22 GB GB0219278A patent/GB2375418B/en not_active Expired - Fee Related
- 2000-12-22 AU AU22093/01A patent/AU2209301A/en not_active Abandoned
- 2000-12-22 WO PCT/GB2000/004988 patent/WO2001046810A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
AU2209301A (en) | 2001-07-03 |
GB2375418B (en) | 2004-06-23 |
WO2001046810A1 (en) | 2001-06-28 |
GB2375418A (en) | 2002-11-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20061222 |