GB0108096D0 - Dynamic vector address allocation for a code patching scheme - Google Patents

Dynamic vector address allocation for a code patching scheme

Info

Publication number
GB0108096D0
GB0108096D0 GB0108096A GB0108096A GB0108096D0 GB 0108096 D0 GB0108096 D0 GB 0108096D0 GB 0108096 A GB0108096 A GB 0108096A GB 0108096 A GB0108096 A GB 0108096A GB 0108096 D0 GB0108096 D0 GB 0108096D0
Authority
GB
United Kingdom
Prior art keywords
address allocation
vector address
dynamic vector
code patching
patching scheme
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0108096A
Other versions
GB2373888A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Europe Ltd
Original Assignee
Toshiba Research Europe Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Research Europe Ltd filed Critical Toshiba Research Europe Ltd
Priority to GB0108096A priority Critical patent/GB2373888A/en
Publication of GB0108096D0 publication Critical patent/GB0108096D0/en
Publication of GB2373888A publication Critical patent/GB2373888A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • G06F8/66Updates of program code stored in read-only memory [ROM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)
  • Debugging And Monitoring (AREA)
GB0108096A 2001-03-30 2001-03-30 Dynamic vector address allocation for a code patching scheme Withdrawn GB2373888A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0108096A GB2373888A (en) 2001-03-30 2001-03-30 Dynamic vector address allocation for a code patching scheme

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0108096A GB2373888A (en) 2001-03-30 2001-03-30 Dynamic vector address allocation for a code patching scheme

Publications (2)

Publication Number Publication Date
GB0108096D0 true GB0108096D0 (en) 2001-05-23
GB2373888A GB2373888A (en) 2002-10-02

Family

ID=9911978

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0108096A Withdrawn GB2373888A (en) 2001-03-30 2001-03-30 Dynamic vector address allocation for a code patching scheme

Country Status (1)

Country Link
GB (1) GB2373888A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10260103A1 (en) * 2002-12-19 2004-07-01 Robert Bosch Gmbh Method and device for changing software in a control unit and corresponding control unit
US6891765B2 (en) * 2003-08-05 2005-05-10 Via Telecom, Inc. Circuit and/or method for implementing a patch mechanism for embedded program ROM
DE102006016891A1 (en) 2006-04-11 2007-10-25 Robert Bosch Gmbh Extension of the functionality of a series software in a control unit
CN102077170A (en) 2008-06-27 2011-05-25 Nxp股份有限公司 Method of interruption of meta language program code execution

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9011679D0 (en) * 1990-05-24 1990-07-11 Schlumberger Ind Ltd Mask-programmable microprocessors
JP3230262B2 (en) * 1992-01-24 2001-11-19 ソニー株式会社 Electronic device and fixed information correcting method thereof
US6049672A (en) * 1996-03-08 2000-04-11 Texas Instruments Incorporated Microprocessor with circuits, systems, and methods for operating with patch micro-operation codes and patch microinstruction codes stored in multi-purpose memory structure
TW400469B (en) * 1997-07-08 2000-08-01 Winbond Electronics Corp Device capable of fixing programs in embedded microprocessor
GB2330428B (en) * 1997-09-23 2000-05-24 Winbond Electronics Corp Apparatus for repairing faulty program segments in embedded microprocessor systems
US6158018A (en) * 1997-11-25 2000-12-05 Philips Semiconductor, Inc. Integrated circuit including patching circuitry to bypass portions of an internally flawed read only memory and a method therefore

Also Published As

Publication number Publication date
GB2373888A (en) 2002-10-02

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)