GB0012104D0 - Method and system for obtaining design parameters for satisfying multiple constraints and/or optimizing multiple objective functions - Google Patents
Method and system for obtaining design parameters for satisfying multiple constraints and/or optimizing multiple objective functionsInfo
- Publication number
- GB0012104D0 GB0012104D0 GBGB0012104.6A GB0012104A GB0012104D0 GB 0012104 D0 GB0012104 D0 GB 0012104D0 GB 0012104 A GB0012104 A GB 0012104A GB 0012104 D0 GB0012104 D0 GB 0012104D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- design parameters
- objective functions
- satisfying
- optimizing
- obtaining design
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2111/00—Details relating to CAD techniques
- G06F2111/04—Constraint-based CAD
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2111/00—Details relating to CAD techniques
- G06F2111/06—Multi-objective optimisation, e.g. Pareto optimisation using simulated annealing [SA], ant colony algorithms or genetic algorithms [GA]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US36408999A | 1999-07-30 | 1999-07-30 |
Publications (3)
Publication Number | Publication Date |
---|---|
GB0012104D0 true GB0012104D0 (en) | 2000-07-12 |
GB2354096A GB2354096A (en) | 2001-03-14 |
GB2354096B GB2354096B (en) | 2003-11-12 |
Family
ID=23432959
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0012104A Expired - Fee Related GB2354096B (en) | 1999-07-30 | 2000-05-22 | Method and system for obtaining design parameters for satisfying multiple constraints and/or optimizing multiple objective functions |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP2001052041A (en) |
GB (1) | GB2354096B (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7176942B2 (en) | 2001-03-23 | 2007-02-13 | Dassault Systemes | Collaborative design |
US7283136B2 (en) * | 2001-03-23 | 2007-10-16 | Dassault Systemes | Cell descriptor |
US6807652B2 (en) | 2001-09-06 | 2004-10-19 | Synopsys, Inc. | Method of robust semiconductor circuit products design using rational robust optimization |
US6910192B2 (en) * | 2001-09-06 | 2005-06-21 | Synopsys, Inc. | Method of robust technology design using rational robust optimization |
GB2407660A (en) * | 2003-10-31 | 2005-05-04 | Hewlett Packard Development Co | Distributing components across resources by modelling physical properties |
EP1672533B1 (en) | 2004-12-20 | 2013-02-27 | Dassault Systèmes | Method and computer system for interacting with a database |
US7584440B2 (en) * | 2006-10-12 | 2009-09-01 | Cadence Design Systems, Inc. | Method and system for tuning a circuit |
US7533358B2 (en) * | 2006-10-12 | 2009-05-12 | Cadence Design Systems, Inc. | Integrated sizing, layout, and extractor tool for circuit design |
JP5267398B2 (en) * | 2009-09-25 | 2013-08-21 | 富士通株式会社 | Pareto data generation program, method and apparatus for automatic circuit design, and automatic circuit design program, method and apparatus |
JP5780089B2 (en) * | 2011-09-28 | 2015-09-16 | 富士通株式会社 | Calculation method, calculation program, and calculation apparatus |
JP6394630B2 (en) * | 2016-03-17 | 2018-09-26 | 株式会社豊田中央研究所 | Information processing apparatus, method, and program |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5326659A (en) * | 1992-03-05 | 1994-07-05 | Regents Of The University Of California | Method for making masks |
JP3432573B2 (en) * | 1993-06-10 | 2003-08-04 | 株式会社ブリヂストン | Tire pitch arrangement method |
JP3686107B2 (en) * | 1993-10-06 | 2005-08-24 | 株式会社ブリヂストン | Pneumatic tire design method |
JP4393595B2 (en) * | 1997-08-08 | 2010-01-06 | 株式会社ブリヂストン | Tire design method, optimization analysis device, and storage medium storing optimization analysis program |
-
2000
- 2000-05-22 GB GB0012104A patent/GB2354096B/en not_active Expired - Fee Related
- 2000-06-28 JP JP2000194386A patent/JP2001052041A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2001052041A (en) | 2001-02-23 |
GB2354096A (en) | 2001-03-14 |
GB2354096B (en) | 2003-11-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20170522 |