FR3128056B1 - METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCRYSTALLINE SIC LAYER ON A POLY-CRYSTALLINE SIC SUPPORT SUBSTRATE - Google Patents

METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCRYSTALLINE SIC LAYER ON A POLY-CRYSTALLINE SIC SUPPORT SUBSTRATE Download PDF

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Publication number
FR3128056B1
FR3128056B1 FR2110626A FR2110626A FR3128056B1 FR 3128056 B1 FR3128056 B1 FR 3128056B1 FR 2110626 A FR2110626 A FR 2110626A FR 2110626 A FR2110626 A FR 2110626A FR 3128056 B1 FR3128056 B1 FR 3128056B1
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France
Prior art keywords
silicon carbide
composite structure
layer
support substrate
manufacturing
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FR2110626A
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French (fr)
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FR3128056A1 (en
Inventor
Hugo Biard
Ionut Radu
Frédéric Allibert
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Soitec SA
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Soitec SA
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Publication date
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Priority to FR2110626A priority Critical patent/FR3128056B1/en
Priority to PCT/FR2022/051774 priority patent/WO2023057700A1/en
Priority to TW111136001A priority patent/TW202331792A/en
Publication of FR3128056A1 publication Critical patent/FR3128056A1/en
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Publication of FR3128056B1 publication Critical patent/FR3128056B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer

Abstract

L’invention concerne un procédé de fabrication d’une structure composite comprenant une couche mince en carbure de silicium monocristallin disposée sur un substrat support en carbure de silicium poly-cristallin, le procédé comprenant : a) une étape de fourniture d’un substrat initial en carbure de silicium monocristallin, présentant une face avant et une face arrière, et d’un substrat support en carbure de silicium poly-cristallin présentant une face avant et une face arrière, b) une étape de porosification appliquée au substrat initial, pour former une couche poreuse au moins du côté de la face avant du substrat initial, c) une étape de formation d’une couche superficielle en carbure de silicium amorphe, sur la couche poreuse, d) une étape d’assemblage du substrat initial et du substrat support au niveau de leurs faces avant respectives, menant à l’obtention d’une première structure intermédiaire, e) une étape de traitement thermique appliqué à la première structure intermédiaire, à une température supérieure à 900°C, pour cristalliser la couche superficielle, au moins en partie sous forme de carbure de silicium monocristallin, à partir d’une interface de contact avec la couche poreuse, pour former la couche mince, l’étape e) menant à l’obtention d’une deuxième structure intermédiaire, f) une étape de séparation dans la couche poreuse de la deuxième structure intermédiaire, pour obtenir d’une part la structure composite et d’autre part le reste du substrat initial. Figure à publier avec l’abrégé : Pas de figureThe invention relates to a method of manufacturing a composite structure comprising a thin layer of monocrystalline silicon carbide arranged on a support substrate of polycrystalline silicon carbide, the method comprising: a) a step of providing an initial substrate made of monocrystalline silicon carbide, having a front face and a rear face, and a support substrate made of polycrystalline silicon carbide having a front face and a rear face, b) a porosification step applied to the initial substrate, to form a porous layer at least on the side of the front face of the initial substrate, c) a step of forming a surface layer of amorphous silicon carbide, on the porous layer, d) a step of assembling the initial substrate and the substrate support at their respective front faces, leading to obtaining a first intermediate structure, e) a heat treatment step applied to the first intermediate structure, at a temperature above 900°C, to crystallize the surface layer, at least partly in the form of monocrystalline silicon carbide, from a contact interface with the porous layer, to form the thin layer, step e) leading to obtaining a second intermediate structure, f) a separation step in the porous layer of the second intermediate structure, to obtain on the one hand the composite structure and on the other hand the remainder of the initial substrate. Figure to be published with the abstract: No figure

FR2110626A 2021-10-07 2021-10-07 METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCRYSTALLINE SIC LAYER ON A POLY-CRYSTALLINE SIC SUPPORT SUBSTRATE Active FR3128056B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR2110626A FR3128056B1 (en) 2021-10-07 2021-10-07 METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCRYSTALLINE SIC LAYER ON A POLY-CRYSTALLINE SIC SUPPORT SUBSTRATE
PCT/FR2022/051774 WO2023057700A1 (en) 2021-10-07 2022-09-21 Method for manufacturing a composite structure comprising a thin film of monocrystalline sic on a carrier substrate of polycrystalline sic
TW111136001A TW202331792A (en) 2021-10-07 2022-09-22 Process for fabricating a composite structure comprising a thin layer made of single-crystal sic on a carrier substrate made of polycrystalline sic

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2110626A FR3128056B1 (en) 2021-10-07 2021-10-07 METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCRYSTALLINE SIC LAYER ON A POLY-CRYSTALLINE SIC SUPPORT SUBSTRATE
FR2110626 2021-10-07

Publications (2)

Publication Number Publication Date
FR3128056A1 FR3128056A1 (en) 2023-04-14
FR3128056B1 true FR3128056B1 (en) 2023-10-27

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Application Number Title Priority Date Filing Date
FR2110626A Active FR3128056B1 (en) 2021-10-07 2021-10-07 METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN MONOCRYSTALLINE SIC LAYER ON A POLY-CRYSTALLINE SIC SUPPORT SUBSTRATE

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FR (1) FR3128056B1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69628505T2 (en) * 1995-07-21 2004-05-06 Canon K.K. Semiconductor substrate and its manufacturing process
FR2810448B1 (en) * 2000-06-16 2003-09-19 Soitec Silicon On Insulator PROCESS FOR PRODUCING SUBSTRATES AND SUBSTRATES OBTAINED BY THIS PROCESS

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Publication number Publication date
FR3128056A1 (en) 2023-04-14

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