FR3107375B1 - Procede de transmission de donnees et puce electronique de type manycore - Google Patents

Procede de transmission de donnees et puce electronique de type manycore Download PDF

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Publication number
FR3107375B1
FR3107375B1 FR2001470A FR2001470A FR3107375B1 FR 3107375 B1 FR3107375 B1 FR 3107375B1 FR 2001470 A FR2001470 A FR 2001470A FR 2001470 A FR2001470 A FR 2001470A FR 3107375 B1 FR3107375 B1 FR 3107375B1
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FR
France
Prior art keywords
electronic chip
manycore
data transmission
transmission method
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2001470A
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English (en)
Other versions
FR3107375A1 (fr
Inventor
Louis-Théophile Thirion
Sangeerthman Subramaniam
Nicolas Maitrot
Jean-Charles Riand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Safran Electronics and Defense SAS
Original Assignee
Safran Electronics and Defense SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Safran Electronics and Defense SAS filed Critical Safran Electronics and Defense SAS
Priority to FR2001470A priority Critical patent/FR3107375B1/fr
Priority to PCT/EP2021/052475 priority patent/WO2021160482A1/fr
Priority to CN202180014009.6A priority patent/CN115104085A/zh
Priority to EP21702040.3A priority patent/EP4104057A1/fr
Priority to US17/798,249 priority patent/US12001360B2/en
Publication of FR3107375A1 publication Critical patent/FR3107375A1/fr
Application granted granted Critical
Publication of FR3107375B1 publication Critical patent/FR3107375B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • G06F13/225—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2012—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant and using different communication protocols
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2041—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with more than one idle spare processing component
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2043—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share a common memory address space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7825—Globally asynchronous, locally synchronous, e.g. network on chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)

Abstract

PROCEDE DE TRANSMISSION DE DONNEES ET PUCE ELECTRONIQUE DE TYPE MANYCORE Un procédé de transmission de données entre des fonctions implémentées sur une première puce électronique de type manycore est décrit. La première puce électronique comprend une pluralité de cœurs d’exécution, les cœurs d’exécution étant regroupés en clusters, les clusters étant interconnectés par au moins deux systèmes de communication. Le procédé de transmission de données comprend les étapes de : - implémenter une première fonction sur un premier cluster ; - implémenter une seconde fonction sur un second cluster, caractérisée en ce que ladite seconde fonction est également implémentée sur un troisième cluster distinct desdits premier et second clusters ; et - transmettre au moins une donnée entre ladite première fonction et ladite seconde fonction. Fig. 5
FR2001470A 2020-02-14 2020-02-14 Procede de transmission de donnees et puce electronique de type manycore Active FR3107375B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR2001470A FR3107375B1 (fr) 2020-02-14 2020-02-14 Procede de transmission de donnees et puce electronique de type manycore
PCT/EP2021/052475 WO2021160482A1 (fr) 2020-02-14 2021-02-03 Procede de transmission de donnees et puce electronique de type manycore
CN202180014009.6A CN115104085A (zh) 2020-02-14 2021-02-03 数据传输方法和众核类型的电子芯片
EP21702040.3A EP4104057A1 (fr) 2020-02-14 2021-02-03 Procede de transmission de donnees et puce electronique de type manycore
US17/798,249 US12001360B2 (en) 2020-02-14 2021-02-03 Data transmission method and electronic chip of the manycore type

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2001470A FR3107375B1 (fr) 2020-02-14 2020-02-14 Procede de transmission de donnees et puce electronique de type manycore
FR2001470 2020-02-14

Publications (2)

Publication Number Publication Date
FR3107375A1 FR3107375A1 (fr) 2021-08-20
FR3107375B1 true FR3107375B1 (fr) 2022-04-08

Family

ID=71094468

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2001470A Active FR3107375B1 (fr) 2020-02-14 2020-02-14 Procede de transmission de donnees et puce electronique de type manycore

Country Status (5)

Country Link
US (1) US12001360B2 (fr)
EP (1) EP4104057A1 (fr)
CN (1) CN115104085A (fr)
FR (1) FR3107375B1 (fr)
WO (1) WO2021160482A1 (fr)

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7478261B2 (en) * 2005-09-13 2009-01-13 M2000 Reconfigurable circuit with redundant reconfigurable cluster(s)
GB2443442A (en) * 2006-11-04 2008-05-07 Object Matrix Ltd Automated redundancy control and recovery mechanisms in a clustered computing system
JP2012075009A (ja) * 2010-09-29 2012-04-12 Oki Networks Co Ltd 冗長化装置及び冗長化プログラム
US10992675B2 (en) * 2014-04-14 2021-04-27 Oracle International Corporation Anomaly detection using tripoint arbitration
US9916873B2 (en) * 2015-02-12 2018-03-13 Rambus Inc. Extended capacity memory module with dynamic data buffers
US10761925B2 (en) 2015-03-24 2020-09-01 Nxp Usa, Inc. Multi-channel network-on-a-chip
FR3057127B1 (fr) * 2016-10-05 2019-04-19 Airbus Operations Processeur adapte pour un reseau ethernet commute deterministe
CN108228082B (zh) * 2016-12-21 2021-04-02 伊姆西Ip控股有限责任公司 存储系统和用于存储控制的方法
CN106713046A (zh) * 2017-01-12 2017-05-24 郑州云海信息技术有限公司 一种服务器集群环境中网络冗余的设计方法
US20190363727A1 (en) * 2017-02-24 2019-11-28 Teledyne Dalsa B.V. Analog-to-digital converter and electronic device comprising the same
US10608640B1 (en) * 2019-05-10 2020-03-31 Achronix Semiconductor Corporation On-chip network in programmable integrated circuit
US20230239244A1 (en) * 2023-03-09 2023-07-27 Intel Corporation Heavy hitter flow detection

Also Published As

Publication number Publication date
CN115104085A (zh) 2022-09-23
EP4104057A1 (fr) 2022-12-21
FR3107375A1 (fr) 2021-08-20
US12001360B2 (en) 2024-06-04
US20230075900A1 (en) 2023-03-09
WO2021160482A1 (fr) 2021-08-19

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