FR3105582A1 - Photodiode comprising a memory area - Google Patents

Abstract

Photodiode comprising a memory zone The present description relates to a photodiode comprising at least one memory zone (104), each memory zone (104) comprising at least two charge storage regions (106). Figure for the abstract: Fig. 1

Description

Photodiode comprising a memory area

The present description generally relates to electronic components and more particularly to photodiodes comprising a memory zone.

Photodiodes are semiconductor components each comprising a PN junction. Photodiodes have the ability to detect light radiation, for example from the optical domain, and to transform it into an electrical signal.

Image sensors are electronic devices each comprising a plurality of photodiodes. The photodiodes allow the device to obtain an image of a scene at a given instant. The image consists of a matrix of pixels, the information of each pixel being obtained by one or more photodiodes. For example, this information generally corresponds to a quantity of electrons obtained by a photodiode at a given instant, this quantity of electrons being converted by the image sensor into color levels (red, green or blue) or into levels of gray.

During a first operating step during which a photodiode receives radiation from a scene, the photodiode can, for example, store the electrons obtained in memory areas, that is to say electron storage areas . During a second operating step, the quantity of electrons located in the memory areas is read. This value is then representative of the quantity of radiation received from the scene.

One embodiment overcomes all or part of the drawbacks of known photodiodes comprising a memory zone.

One embodiment provides a photodiode comprising at least one memory zone, each memory zone comprising at least two charge storage regions.

According to one embodiment, each memory zone comprises exactly two storage regions.

According to one embodiment, the storage regions are separated by a wall comprising an opening.

According to one embodiment, the wall is an insulated conductive wall.

According to one embodiment, the opening is at least partially covered by a connection pad.

According to one embodiment, each of the storage regions has substantially the shape of a parallelogram.

According to one embodiment, the main directions of the storage regions of a same memory zone are parallel.

According to one embodiment, each memory zone comprises at least three storage regions whose main directions are parallel.

According to one embodiment, the main directions of the storage regions of the same memory zone are perpendicular.

According to one embodiment, the storage regions are at least partially surrounded by insulated conductive walls.

According to one embodiment, each insulated conductive wall comprises a conductive core configured to receive, during operation of the photodiode, a negative voltage, the insulating core at least partially surrounded by an insulating sheath.

Another embodiment provides a method for using a photodiode as described previously, comprising a first step during which electrons are generated and are stored in the memory zone(s) and a second step of reading the quantity of electrons in the memory area(s).

According to one embodiment, the connection pad receives a negative voltage during the first stage and a positive voltage during the second stage.

These characteristics and advantages, as well as others, will be set out in detail in the following description of particular embodiments made on a non-limiting basis in relation to the attached figures, among which:

Figure 1 shows one embodiment of a photodiode;

Figure 2 shows another embodiment of a photodiode;

Figure 3 shows another embodiment of a photodiode;

Figure 4 shows another embodiment of a photodiode;

Fig. 5 shows the electrostatic potential in the electron path in the embodiment of Fig. 1;

Figure 6 shows the electrostatic potential in part of one of the embodiments of Figures 1 to 4;

Figure 7 shows the electrostatic potential in part of one of the embodiments of Figures 1-4;

Figure 8 shows the electrostatic potential in part of one of the embodiments of Figures 1-4;

Figure 9 shows another embodiment of a photodiode;

Figure 10 shows another embodiment of a photodiode;

Figure 11 shows the electrostatic potential in part of the embodiment of Figure 10 during three stages of operation;

FIG. 12 represents another embodiment of a photodiode.

The same elements have been designated by the same references in the various figures. In particular, the structural and/or functional elements common to the various embodiments may have the same references and may have identical structural, dimensional and material properties.

For the sake of clarity, only the steps and elements useful for understanding the embodiments described have been represented and are detailed. In particular, electronic devices comprising pixels, for example image sensors, will not be detailed.

Unless otherwise specified, when reference is made to two elements connected together, it means directly connected without intermediate elements other than conductors, and when reference is made to two elements connected or coupled together, it means that these two elements can be connected or be linked or coupled through one or more other elements.

In the following description, when referring to absolute position qualifiers, such as "front", "rear", "up", "down", "left", "right", etc., or relative, such as the terms "above", "below", "upper", "lower", etc., or to qualifiers of orientation, such as the terms "horizontal", "vertical", etc., it reference is made unless otherwise specified to the orientation of the figures.

Unless specified otherwise, the expressions “about”, “approximately”, “substantially”, and “of the order of” mean to within 10%, preferably within 5%.

Figure 1 shows one embodiment of a photodiode 100. More specifically, Figure 1 is a top view of the photodiode 100.

The photodiode 100 comprises an active zone 102, located in a semiconductor substrate, for example made of silicon. The active area 102 is the semiconductor area receiving radiation and generating electrical charges, for example electrons. The active zone 102 comprises for example a PN junction, for example a PN junction comprising horizontal semiconductor layers.

Photodiode 100 includes memory areas 104 in the substrate. Each memory area 104 is an area in which charges are stored, for example in electron storage areas. Each memory zone 104 is for example a zone of the semiconductor substrate in which the photodiode 100 is formed.

In the example of FIG. 1, the photodiode 100 comprises two memory areas 104. The memory areas 104 are located on either side of the active area 102.

Each memory zone 104 comprises at least two electron storage regions 106. In the example of FIG. 1, each memory zone 104 comprises two electron storage regions 106. Each electron storage region 106 has for example substantially the shape of a parallelogram.

The principal direction of an electron storage region 106 is considered to be the direction of the highest dimension in the plane of Fig. 1. In the example of Fig. 1, the principal directions of the storage regions 106 of the same memory zone 104 are parallel. In the example of FIG. 1, the main directions of the storage regions 106 of the different memory zones 104 are parallel.

In the example of FIG. 1, the storage regions 106 of a same memory zone 104 have identical dimensions. However, the regions can have different dimensions. For example, the two regions 106 can have a substantially equal width. For example, one of the two regions may have a length greater than that of the other region 106. For example, the storage region 106 furthest from the active area 106 may have a length greater than the length of the active area 106 closest to the active area 102.

The width of one of the storage regions 106 is called the dimension in the direction perpendicular to the main direction of this region in the plane of FIG. 1. The length of one of the storage regions 106 is called the dimension in the main direction of the storage region 106.

Each memory area 104 is surrounded by insulated conductive walls 108, with the exception of an input region of the memory area. The insulated conductive walls 108 receive, during operation of the photodiode 102, a negative voltage.

Each insulated conductive wall 108 comprises a conductive core and an insulating sheath not shown in FIG. 1. The conductive core is for example made of metal. The sheath is for example made of silicon oxide. The conductive core is for example connected to a voltage application node. The insulating sheath surrounds the conductive core, with the exception, for example, of the connections with the voltage source. In particular, the insulating sheath separates the conductive core from the active zone 102 of the photodiode 100 and from the electron storage regions 106. The insulating sheath for example entirely covers the side walls and the bottom of the conductive core. The insulating sheath, for example, partially covers the upper face of the conductive core.

In the example of FIG. 1, each memory zone 104 comprises three insulated conductive walls 108a, 108b and 108c extending in the main direction of the storage regions 106. The walls 108a and 108b constitute the side walls of the memory zone 104 The wall 108c forms the separation between the two storage regions 106. Each memory zone 104 further comprises one or more walls 108 connecting some of the three walls 108a, 108b and 108c on one side of the memory zone 104. In In the example of FIG. 1, the photodiode 100 comprises a single wall 108d connecting the walls 108a and 108c on one side of the memory zone. The other side of memory area 104 is, for example, separated from a strip 110 extending along photodiode 100 by an insulated conductive wall 112. Wall 112 connects walls 108a and 108b. The insulated conductive wall 112 comprises, like the walls 108, a conductive core and an insulating sheath similar to the core and to the sheath of the walls 108. The wall 112 extends, in the example of FIG. 1, along the part of the strip 110 extending along the photodiode 100. The wall 112 is therefore common to the two memory zones of the photodiode 100. The wall 112 also separates the active zone 102 from the strip 110.

Strip 110 is for example a conductive strip. The strip 110 is for example a reading strip allowing the reading of the photodiode, that is to say the obtaining of a voltage representative of the quantity of charges in the memory zones 104.

For each memory area 104, wall 108a extends from wall 112 to wall 108d. Walls 108b and 108c partially extend from wall 112 to wall 108d. The wall 108b comprises an opening 114 constituting the entrance to the memory zone 104. The opening 114 is, in the example of FIG. 1, located between the wall 108b and the wall 108d. The opening 114 allows the electrons generated in the active area 102 to pass into the memory area 104.

Similarly, wall 108c includes an opening 116. Opening 116 forms the connection between the two electron storage regions 106. Opening 116 allows electrons to pass from one region to the other. The opening 116 is, in the example of Figure 1, between the wall 108c and the wall 112.

Openings 114 and 116 are preferably located at opposite ends of memory area 104, in the main direction of regions 106.

A conductive pad 118 is located above each opening 114, that is to say above each entry of the memory zones 104. In FIG. 1, there are therefore two conductive pads 118 each covering a portion of the substrate semiconductor in which the active area 102 and the memory areas 104 are formed.

A conductive pad 120 is located above each opening 116. Each conductive pad 120 preferably completely covers the opening 116. In the example of Figure 1, the conductive pad 120 partially covers the strip 110, the wall 112 and the parts of the memory zone 104 in contact with the wall 112. For example, the conductive pad 120 partially covers the walls 108a, 108b and 108c extending in the main direction of the storage regions 106.

In the example of FIG. 1, the photodiode 100 also comprises a region 122 of semiconductor material partially surrounded by walls 124 of insulated conductors. In the example of Figure 1, region 122 is surrounded by two walls 124 each having a U-shape in the plane of the figure.

Region 122 is for example connected to a voltage application node.

Alternatively, elements 122 and 124 may be absent.

During a first operating step, electrons are generated in active area 102. Region 122 and pads 116 receive negative voltages. The conductive pads 118 receive a positive voltage, so as to attract the electrons towards the memory areas 104. The electrons fill the electron storage region 106 closest to the opening 114 then, the electrons passing through the opening 116 , fill the storage region farthest from opening 114.

During a second stage of operation, region 122 receives a positive voltage so as to attract the new electrons generated. This makes it possible to ensure that the quantity of electrons read in the memory zones is representative of the scene at a given instant. Pads 118 receive a negative voltage and pads 116 receive a positive voltage.

Throughout the operation of the photodiode, the insulated conductive walls 108 and 112 receive a negative voltage, for example approximately equal to -2 V or -2.5 V.

The operation of the photodiode will be described in more detail in relation to figures 5, 6, 7, and 8.

Figure 2 shows another embodiment of photodiodes 125. Figure 2 shows two photodiodes 125.

Each of the two photodiodes 125 comprises the same elements as the photodiode 100 of FIG. 1, referenced in the same way, with the exception of the strip 110 and the walls 112. The identical elements will not be detailed again. Strip 110 is replaced by strip 127. Strip 127 is, like strip 110, a conductive strip. The strip 127 is common to the two photodiodes 125. The two photodiodes 125 are symmetrical to each other with respect to the strip 127. Each memory zone 104 is therefore located opposite another memory zone 104, separated by the band 127.

Contrary to FIG. 1, in which the strip 110 was a continuous strip over the entire length of the photodiode, the strip 127 common to the two photodiodes 125 comprises openings 129. Similarly, the strip 112 comprises openings 131 at the level of the openings 129.

In the example of FIG. 2, strip 127 includes two openings 129. Each strip 112 therefore includes two openings 131. Each memory area 104 of one of the two photodiodes is connected to a memory area 104 of the other of the two photodiodes 125 by two openings 131 and one opening 129.

The opening 129 and the two openings 131 are for example located between the two openings 116. The two openings 116 of the two memory zones 104 are therefore connected by the opening 129 and the two openings 131.

The operation of the photodiodes 125 is identical to the operation of the photodiode 100. The various elements of the photodiodes 125 are for example controlled in an identical manner, and at the same instants.

Figure 3 shows another embodiment of a photodiode 150.

Photodiode 150 is identical to photodiode 100 except for the number of electron storage regions 106. Elements common between photodiode 150 and photodiode 100 are referenced the same way and are not detailed again.

The photodiode 150 comprises, in each memory zone 104, three electron storage regions 106. The three storage regions, as in FIG. 1 and in FIG. 2, have for example a substantially parallelogram shape. Moreover, the regions 106 have a principal direction substantially parallel to one another, preferably parallel to the principal direction of all the regions 106 of the photodiode. Regions 106 are separated from each other by insulated conductive walls 108c' and 108c". Walls 108c' and 108c" are identical to walls 108c of Figure 1.

Each of the walls 108c' and 108c" respectively forms an opening 116' and 116". Preferably, openings 116' and 116" are located on the same side of memory area 104, for example on the side opposite opening 114 in the main direction of regions 106.

The stud 120 of each memory zone 104 is identical to the studs 120 described in relation to FIG. 1 and covers at least the two openings 116' and 116". Preferably, each stud 120 extends from the wall 108a to the wall 108b.

The operation of photodiode 150 is the same as the operation of photodiode 100 in Figure 1.

Two photodiodes 150 can be arranged in the same way as the photodiodes 125 are arranged in FIG. 2, that is to say symmetrically to one another with respect to a strip 127 replacing the strip 110. The openings 129 and 131 are for example located in the band 110 between the two openings 116' and 116".

FIG. 4 represents another embodiment of a photodiode 155. Photodiode 155 comprises elements identical to the elements of FIG. 1, referenced in the same way. These elements are not detailed again.

The photodiode 155 of FIG. 4 differs from the photodiode 100 of FIG. 1 in that the storage regions 106 of a memory zone 104 do not extend in directions parallel to each other, but in preferably substantially perpendicular directions. The storage regions therefore have, for each memory zone 104, substantially an L-shape.

Each memory zone 104 comprises a region 106a extending along the wall 108a and a region 106b extending along the wall 112. The regions 106a and 106b meet in a region 157 located at the level where the walls 108a and 112.

Region 106a is separated from active area 102 by a wall 159. Region 106b is separated from active area 102 by a wall 161. Regions 106b of the two memory areas 104 are separated by a wall 163. Walls 159, 161 and 163 are insulated conductive walls, similar to walls 108.

The pad 120 covers the region 157. For example the pad 120 partially covers the wall 112, the wall 108a, the wall 159 and the wall 161. The conductive pads 120 do not cover the active area 102. The conductive pads 120 do not cover band 110.

In the example of FIG. 4, the active area 102 is separated from the wall 112 over the entire length of the active area 102 by the regions 106b, the wall 163, and the walls 161. The dimensions of the regions 106b and the dimensions of the wall 163 ensure that the active area 102 is not in contact with the wall 112.

As a variant, a part (not shown) of the active area 102 could be located between the two regions 106b. Each of the regions 106b would thus be separated from this part of the active zone by an insulated conductive wall similar to the wall 163. The dimensions of the regions 106b in their main direction, that is to say the direction in which the wall extends 112, would then be less than the dimension of the regions 106b in their main direction in the case of FIG. 4. The active zone 102 would therefore be in contact with the wall 112.

Like the photodiode 150 of Figure 3, two photodiodes 155 can be arranged in the same way as the photodiodes 125 are arranged in Figure 2, i.e. symmetrically to each other with respect to a band 127 replacing strip 110. Openings 129 and 131 are for example located at region 157.

The operation of the photodiode 155 is substantially identical to the operation of the photodiodes 100, 125 and 150 of the preceding figures.

Figure 5 shows the electrostatic potential on an electron path in the embodiment of Figure 1.

The origin of the path of the electrons, corresponding to the origin of the abscissa (Distance), is located in the active zone 102. The path of the electrons considered then extends into one of the openings 114, in the region 106 furthest close to the active zone 102, in the opening 116 and in the other region 106.

The ordinate corresponds to the electrostatic potential (Electrostatic Potential) on the path of the electrons. The y-axis is represented in such a way that positive values point down and negative values point up the y-axis.

FIG. 5 comprises a first curve 175 in solid lines and a second curve 177 in dotted lines. Curve 175 corresponds to the maximum electrostatic potential over a thickness ranging from 0.1 μm to 2 μm in the semiconductor material on the path. The thickness is measured from the upper face of the substrate, that is to say the face represented in FIG. 1. Curve 177 corresponds to the maximum electrostatic potential in a thickness ranging from 0.3 μm to 2 μm in the semi -driver on the way. Thus, curve 175 includes a part of the substrate located above the part considered for curve 177.

In the example of FIG. 5, it is considered that the pads 118 receive a positive voltage, for example 1.1 V. It is further considered that the pad 120 receives a negative voltage, for example -1 V. The values curves 175 and 177 correspond to a time during the electron generation step, before the reading step.

The opening 114 of the memory zone 104 corresponds to a distance d1, for example approximately 1.5 μm, on the path of the electrons.

At distance d1, curves 175 and 177 both have an extrema. This extrema represents a first barrier to be crossed by the electrons. Thus, when the quantity of electrons is sufficient in the active area 102, that is to say at a distance less than d1, the electrons enter the first region 106. The first region 106 therefore corresponds to a distance between the distance d1 and a distance d2. The distance d2 is for example substantially equal to 5.25 μm. Between d1 and d2, the electrostatic potential is much lower than at distances d1 and d2. The distance d2 corresponds to the opening 116. At the distance d2, the curves 175 and 177 have an extrema. This is a second barrier. Thus, when the number of electrons is sufficient in the first region 106, the electrons pass into the second region 106. For distances greater than the distance d2, the curves 175 and 177 represent the electrostatic potential in the second region 106.

Thus for a memory zone 104, the region 106 closest to the active zone 102 is first filled then when this region is filled, the electrons are transferred to the region 106 furthest from the active zone 102.

Memory areas such as those described in relation to FIG. 1 therefore make it possible to obtain an electron storage capacity greater than the storage capacity of a memory comprising only one electron storage region.

One could have chosen to enlarge the dimensions of a storage region without adding a second region 106 separated by an opening 116. However, the single storage region would then comprise, particularly in the deep regions, regions in which the electrons would be difficult to read.

FIGS. 6 and 7 each represent two views according to section A-A of FIG. 2. The first views, 6A and 7A, represent the doping levels in the part concerned. The second views 6B and 7B represent the electrostatic potential in this same part, respectively in the part represented in view 6A and 7A, during the reading step, that is to say when the connection pad 120 receives a voltage of positive value.

Although FIGS. 6 and 7 are described in relation to FIG. 2, the observations made are also valid for embodiments comprising two photodiodes 100, 150 or 155 symmetrical to each other with respect to a band 127 as well as than for the embodiments of the other figures.

Views 6A, 6B, 7A and 7B represent an insulated conductive wall 200 comprising a conductive core 202 and an insulating sheath 204. The wall 200 corresponds for example to the wall 108c of FIG. 2. The views also represent the conductive pad 120. The views further show the semiconductor material of the electron storage regions and more particularly the semiconductor material of aperture 116, aperture 131, and aperture 129.

In FIG. 6A, the doping of the semiconductor material located in the opening 129 but not being located under the connection pad 120, is greater than approximately 10^18 dopants/cm^3 (the symbol ^ representing the power function), over a thickness substantially equal to 0.2 μm. This substantially corresponds to a region 206 of view 6A.

The doping of the semiconductor material located in the opening 116, more precisely along the wall 200, is between about 10^10 dopants/cm^3 and 10^18 dopants/cm^3, for a depth of up to 1 .5 µm. This substantially corresponds to a region 208 of view 6A. The concentration is for example decreasing in the region 208 from the surface of the opening 116.

Regions 206 and 208 are connected by a region 210. The doping of region 210 is for example between approximately 10^15 and 10^18 dopants/cm^3. Region 210 is located at the surface of the semiconductor material. Region 210 is located in contact with pad 120. The thickness of region 210 is for example substantially equal to 0.1 μm. The thickness of region 210 is for example less than the thickness of region 206.

A region 212 located below regions 206 and 210 has a doping of less than -10^16 dopants/cm^3. Region 212 is located just below regions 206 and 210. Region 212 extends for example from regions 206 and 210 to a depth of about 0.5 μm.

The remainder of the semiconductor material considered has for example a doping of between −10^13 and −10^16 dopants/cm^3.

Region 208 extends partially below region 212. Negative dopant concentrations correspond to doping of the opposite type to positive concentration doping. Thus, a doping lower than a negative doping corresponds to a greater number of dopants of the type whose concentration corresponds to a negative value.

The dimensions of regions 210 and 212 are chosen such that the path for electrons heading to region 206 is relatively narrow. Thus, there is little risk of leakage.

In FIG. 6B, it is observed that the electrostatic potential is highest in region 210 and in the part of region 208 closest to region 210. A pocket 214 is also observed, within region 208, having a electrostatic potential value higher than the potential values of the parts of the region 108 which surround it. This pocket 214 constitutes an electron storage pocket, ie during reading, electrons will remain stored in this pocket and will not move towards region 206 to be read. The value read is therefore not entirely representative of the number of electrons which were present in the memory, and therefore of the number of electrons having been generated by the photodiode.

View 7A is similar to View 6A. View 7A differs from view 6A in that region 212 extends deeper. Thus, region 212 extends to approximately 0.7 µm. Additionally, region 212 is more lightly doped, i.e., a large portion of region 212 has a doping of less than -10^18 dopants/cm^3.

We observe, in view 7B, the absence of the pocket 214. The electrostatic potential decreases gradually from the region 210.

During the reading step, there will therefore be no electrons which will remain stored in the pocket 214 and therefore cannot be read.

Thus, the presence of a region 212 extending more deeply makes it possible to ensure the absence of the pocket 214.

FIG. 8 represents the electrostatic potential on a path going from the first electron storage region to the second electron storage region of a same memory zone in two different cases. Curve 215 corresponds to the case of figure 6 and curve 217 corresponds to the case of figure 7.

It is observed that each curve comprises an extrema located at the same distance D. This distance D corresponds to the opening 116, that is to say to the place where one passes from the first region to the second region. This maximum therefore corresponds to the barrier that must be crossed by the electrons to pass to the second electron storage region.

It is observed that by passing from the case of FIG. 6 to the case of FIG. 7, that is to say by increasing the thickness of the region 212, the barrier to be crossed by the electrons is increased.

The inventors have determined that by increasing the thickness of region 212, it is possible to remove the presence of electron storage pockets, however this increases the barrier to be crossed between the two electron regions. This can pose problems, particularly in the case where the barrier situated between the active zone and the first electron storage region is lower than the barrier between the two storage regions. Indeed, some electrons could then return to the active area rather than crossing the barrier to the second region.

The inventors have further determined that increasing the distance between wall 108c and region 212 results in a decrease in the barrier between regions 106. However, this increases the dimensions of region 208 in depth. There is therefore a risk that certain electrons, located in depth, will not be read.

FIG. 9 represents another embodiment of a photodiode 275. Photodiode 275 comprises elements identical to the elements of FIG. 1, referenced in the same way. These elements are not detailed again.

The photodiode 275 of Figure 9 differs from the photodiode 100 of Figure 1 in that each wall 108c comprises two distinct parts. Each wall 108c comprises a first part 277 extending from the wall 108d in the main direction of the electron storage regions 106. Each wall 108c further comprises a second part 279. The second part 279 is located in the extension of the first part 277. The second part is therefore located between the first part and the wall 112. The first part 277 and the second part 279 are separated by an opening 281.

The conductive pad 120 does not cover the opening 281. The conductive pad 120 for example partially covers the second part 279.

The voltage received by the conductive core of the second part 279 of the wall 108c is independent of the voltage received by the conductive cores of the other insulated conductive walls 108 and 112. In particular, the voltage received by the conductive core of the second part is independent of the voltage received by the conductive core of the first part 277 of the wall 108c.

Preferably, the opening 281 is as close to the pad 120 as current technologies allow without being located under the pad 120. For example, the dimension of the second part 279 in the main direction of the electron storage regions 106 is for example substantially equal to 0.4 μm. The dimension of the opening 281 in the main direction of the electron storage regions 106 is for example substantially equal to 0.2 μm. Preferably, the dimension of the first part 277 in the main direction of the regions 106 is at least five times greater than the dimension in the same direction of the second part 279, preferably at least ten times greater.

The operating steps of this embodiment are identical to that of the embodiment of FIG. 1. However, during the step of generating electrons in the active zone 102 and of storing the electrons, the electrons move from the zone storage region closest to the active area to the other storage region via opening 281. Indeed, the electrostatic potential barrier is weaker in opening 281 than in opening 116. Preferably, the electrostatic potential barrier of aperture 281 is lower than the barrier of aperture 114.

As a variant, the conductive pads 120 can have a U-shape. For example, each conductive pad 120 comprises a main portion identical to the conductive pads 120 of FIG. 9, and two secondary portions, not shown, each extending above of one of the storage regions 106. The secondary portions do not extend above the opening 281.

Figure 10 shows another embodiment of a photodiode. The photodiode 300 comprises elements identical to the elements of FIG. 9, referenced in the same way. These elements are not detailed again.

Photodiode 300 differs from photodiode 275 in that walls 108a and 108b include projecting portions 302. The walls 108a and 108b therefore comprise a main portion and a projecting portion 302. The main parts of the walls 108a and 108b are identical to the walls 108a and 108b of FIG. 9. The portions 302 extend from the main portions towards the regions storage 106. The portions 302 are preferably located on either side of the opening 281. Preferably, the portions 302 are therefore not covered, even partially, by the conductive pad 120.

The presence of portions 302 makes it possible to reduce the electrostatic potential barrier of opening 281.

Figure 11 shows the electrostatic potential in part of the embodiment of Figure 10 during three stages of operation. Figure 11 includes Y and Z axes representing distances in microns. The Y axis is in the major direction of regions 106 and the Z axis is in the direction perpendicular to the Y axis in the plane of Figure 11.

Although the observations made in relation to the embodiment of FIG. 10 in a structure comprising two symmetrical photodiodes similar to FIG. 2, similar observations can be made in relation to the embodiment of FIG. 9 and with the mode embodiment of Figure 13 which will be described later.

FIG. 11 represents only part of one of the memory zones 104, in particular the part comprising the conductive pad 120, the portions 277 and 279 of the wall 108c, the opening 281, part of the strip 127 and the opening 129.

The three steps described in relation to FIG. 1 are steps for reading one of the memory areas 104.

During a first step, illustrated by view 11A, pad 120 receives a positive voltage. In addition, portion 279 of wall 108c receives a negative voltage, for example the same voltage as the voltage received by the other insulated conductive walls, for example a voltage substantially equal to -2 V.

The electrostatic potential under the conductive pad 120 is between about 2 and 3 V. The value of the potential decreases away from the strip 127, according to potential curves similar to curves 303 and 304. The potential in the storage regions 106 is between about 0.8 V and 2.5 V.

The electrons move towards the conductive pad 120.

During a second step, illustrated by view 11B, the value of the voltage received by portion 279 increases, for example until reaching a value substantially equal to 0 V.

Electrons are still flowing towards conductive pad 120. However, electron storage pockets 305 are beginning to form on either side of portion 279. Electron storage pockets are locations where there are an extrema of the electrostatic potential.

During a third step, illustrated by view 11C, the value of the voltage received by portion 279 increases, for example until reaching the value of the voltage received by conductive pad 120, for example until reaching a value substantially equal to 2.5 V.

The electrons move towards the conductive pad 120. The dimensions of the storage pockets 305 increase. For example, storage pockets 305 extend along portion 279, such as the entire length of portion 279.

During a following step not shown, the voltage received by portion 279 is again negative.

The electrostatic potentials then become similar to those of view 11A. The electrons stored in the pockets 305 are then attracted by the pad 120. The pockets 305 are located for example at the level of the upper face of the regions 106. Thus, the electrons are easily attracted from the pockets towards the pad 120, and do not remain not stored deep.

The voltage of pad 120 then becomes negative again so as to stop the reading step.

Figure 12 shows another embodiment of a 375 photodiode.

Photodiode 375 is identical to photodiode 275 except for the number of electron storage regions 106. Elements common between photodiode 275 and photodiode 375 are referenced the same way and are not detailed again.

The photodiode 375 comprises, in each memory zone 104, three electron storage regions 106. The three storage regions, as in FIG. 3, have for example a substantially parallelogram shape. In addition, regions 106 have a main direction substantially parallel to each other, preferably parallel to the main direction of all regions 106 of the photodiode. Regions 106 are separated from each other by insulated conductive walls 108c' and 108c". Walls 108c' and 108c" are identical to walls 108b of Figure 1.

Each of the walls 108c' and 108c" respectively comprises an opening 116' and 116". Preferably, openings 116' and 116" are located on the same side of memory area 104, for example on the side opposite opening 114.

The pad 120 of this memory zone 104 is identical to the pads 120 described in relation to FIG. 9 and covers at least the two openings 116' and 116".

Each wall 108c' or 108c" comprises two distinct parts. Each wall 108c', respectively 108c", comprises a first part 277', respectively 277", extending from the wall 108d in the main direction of the electron storage regions 106. Each wall 108c', respectively 108c", further comprises a second part 279', respectively 279". The second part 279', respectively 279", is located in the extension of the first part 277', respectively 277". ". Each second part is therefore located between the corresponding first part and the wall 112. Each first part 277' or 277" and the corresponding second part 279' or 279" are separated by an opening 281' or 281".

The conductive pad 120 does not cover the openings 281' and 281". The conductive pad 120 for example partially covers the second parts 279' and 279".

The voltage received by the conductive core of the second parts 279' and 279" of the walls 108c' and 108c'' is independent of the voltage received by the conductive cores of the other insulated conductive walls 108 and 112. In particular, the voltage received by the conductive core of each second part 279' or 279" is independent of the voltage received by the conductive core of the first part 277' or 277" of the corresponding wall 108c' or 108".

Preferably, each opening 281' or 281" is as close to pad 120 as current technologies allow without being located under pad 120. For example, the dimension of each second part 279' or 279" in the main direction of the regions of electron storage 106 is for example substantially equal to 0.4 μm. The dimension of each opening 281' or 281" in the main direction of the electron storage regions 106 is for example substantially equal to 0.2 μm. Preferably, the dimension of each first part 277' or 277" in the direction principal of the regions 106 is at least five times greater than the dimension in the same direction of the corresponding second part 279' or 279″, preferably at least ten times greater.

The operation of the 375 photodiode is the same as the operation of the 300 photodiode.

Two photodiodes 375 can be arranged in the same way as the photodiodes 125 are arranged in FIG. 2, that is to say symmetrically to one another with respect to a strip 127 replacing the strip 110. The openings 129 and 131 are for example located in the strip 110 between the two openings 116' and 116".

An advantage of the embodiments of FIGS. 9, 10 and 12 is that the openings 281 allow less difficult passage between the different storage regions of the memory zones, by lowering the electrostatic potential barrier between the regions.

Another advantage of the embodiments of FIGS. 9, 10 and 12 is that the voltage received by the second part 279 of the walls 108c makes it possible to better attract the charges, in particular the charges which could have been located deep in the memory zone and could then not be read.

Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art based on the functional indications given above.

Claims (13)

Photodiode comprising at least one memory zone (104), each memory zone (104) comprising at least two charge storage regions (106). A photodiode according to claim 1, wherein each memory area (104) comprises exactly two storage regions (106). A photodiode according to claim 1 or 2, wherein the storage regions (106) are separated by a wall (108c, 108c', 108c") comprising an opening (116, 116', 116"). A photodiode according to claim 3, wherein the wall (108c, 108c', 108c") is an insulated conductive wall. Photodiode according to claim 3 or 4, in which the opening (116, 116', 116") is at least partially covered by a connection pad (120). A photodiode according to any of claims 1 to 5, wherein each of the storage regions (106) is substantially parallelogram shaped. Photodiode according to any one of Claims 1 to 6, in which the main directions of the storage regions (106) of the same memory zone (104) are parallel. Photodiode according to any one of Claims 1 and 3 to 7, in which each memory zone (104) comprises at least three storage regions (106) whose main directions are parallel. Photodiode according to any one of Claims 1 to 6, in which the main directions of the storage regions (106) of the same memory zone (104) are perpendicular. A photodiode according to any of claims 1 to 9, wherein the storage regions (106) are at least partially surrounded by insulated conductive walls (108, 112). A photodiode according to claim 10, wherein each insulated conductive wall (108) comprises a conductive core configured to receive, during operation of the photodiode, a negative voltage, the insulating core at least partially surrounded by an insulating sheath. Method of using a photodiode according to any one of Claims 1 to 11, comprising a first step during which electrons are generated and are stored in the memory zone(s) (104) and a second step of reading the quantity of electrons in the memory area(s). A method according to claim 12 when appended to claim 5, wherein the connection pad (120) receives a negative voltage during the first stage and a positive voltage during the second stage.