FR3094567B1 - Procédé de fabrication bas coût d’un élément modulaire de commutation de puissance - Google Patents
Procédé de fabrication bas coût d’un élément modulaire de commutation de puissance Download PDFInfo
- Publication number
- FR3094567B1 FR3094567B1 FR1903229A FR1903229A FR3094567B1 FR 3094567 B1 FR3094567 B1 FR 3094567B1 FR 1903229 A FR1903229 A FR 1903229A FR 1903229 A FR1903229 A FR 1903229A FR 3094567 B1 FR3094567 B1 FR 3094567B1
- Authority
- FR
- France
- Prior art keywords
- switching element
- power switching
- modular power
- low cost
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 6
- 238000000034 method Methods 0.000 abstract 4
- 238000004080 punching Methods 0.000 abstract 2
- 238000003475 lamination Methods 0.000 abstract 1
- 238000001465 metallisation Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Fuses (AREA)
Abstract
PROCÉDÉ DE FABRICATION BAS COÛT D’UN ÉLÉMENT MODULAIRE DE COMMUTATION DE PUISSANCE Le procédé de l'invention Le procédé est conçu pour la fabrication d’un élément modulaire de commutation de puissance (MP) comprenant des premier et deuxième blocs stratifiés (BL, BH) entre lesquels est enserrée au moins une puce de transistor (CP1, CP2). Les premier et deuxième blocs stratifiés comportent respectivement des premier et deuxième bus-barres (BBL, BBH) sur lesquels sont stratifiées des couches internes diélectriques et conductrices. Le procédé comprend, préalablement à la stratification des premier et deuxième blocs stratifiés, la fabrication en parallèle d’une première ébauche du premier bloc stratifié (BL) et d’une deuxième ébauche du deuxième bloc stratifié (BH), cette fabrication en parallèle comprenant au moins une opération de poinçonnage et/ou matriçage à l’emporte-pièce réalisant au moins un orifice (OR1, OR2) dans le premier bus-barre et/ou le deuxième bus-barre, une réalisation d’une couche diélectrique (DL1, DL2) recouvrant l’intérieur de l’orifice et une métallisation (CU2, CU3) de l’intérieur de l’orifice incluant la couche diélectrique. Fig.2
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1903229A FR3094567B1 (fr) | 2019-03-28 | 2019-03-28 | Procédé de fabrication bas coût d’un élément modulaire de commutation de puissance |
PCT/FR2020/000067 WO2020193876A1 (fr) | 2019-03-28 | 2020-03-25 | Procédé de fabrication bas cout d'un élément modulaire de commutation de puissance |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1903229A FR3094567B1 (fr) | 2019-03-28 | 2019-03-28 | Procédé de fabrication bas coût d’un élément modulaire de commutation de puissance |
FR1903229 | 2019-03-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3094567A1 FR3094567A1 (fr) | 2020-10-02 |
FR3094567B1 true FR3094567B1 (fr) | 2021-05-21 |
Family
ID=67810736
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1903229A Active FR3094567B1 (fr) | 2019-03-28 | 2019-03-28 | Procédé de fabrication bas coût d’un élément modulaire de commutation de puissance |
Country Status (2)
Country | Link |
---|---|
FR (1) | FR3094567B1 (fr) |
WO (1) | WO2020193876A1 (fr) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2789803B1 (fr) * | 1999-02-12 | 2002-03-08 | St Microelectronics Sa | Procede de realisation d'une connexion metallique verticale dans un circuit integre |
FR3060255B1 (fr) * | 2016-12-12 | 2019-07-19 | Institut Vedecom | Procede d’integration de puces de puissance parallelisable et modules electroniques de puissance |
FR3060846B1 (fr) * | 2016-12-19 | 2019-05-24 | Institut Vedecom | Procede d’integration de puces de puissance et de bus barres formant dissipateurs thermiques |
JP6972686B2 (ja) * | 2017-06-15 | 2021-11-24 | 株式会社ジェイテクト | 半導体装置 |
-
2019
- 2019-03-28 FR FR1903229A patent/FR3094567B1/fr active Active
-
2020
- 2020-03-25 WO PCT/FR2020/000067 patent/WO2020193876A1/fr active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2020193876A1 (fr) | 2020-10-01 |
FR3094567A1 (fr) | 2020-10-02 |
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