FR3086426B1 - Gestionnaire de verrous pour architecture multicoeurs - Google Patents

Gestionnaire de verrous pour architecture multicoeurs Download PDF

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Publication number
FR3086426B1
FR3086426B1 FR1858803A FR1858803A FR3086426B1 FR 3086426 B1 FR3086426 B1 FR 3086426B1 FR 1858803 A FR1858803 A FR 1858803A FR 1858803 A FR1858803 A FR 1858803A FR 3086426 B1 FR3086426 B1 FR 3086426B1
Authority
FR
France
Prior art keywords
lock
lock manager
core architecture
manager
processing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1858803A
Other languages
English (en)
Other versions
FR3086426A1 (fr
Inventor
Maxime France-Pillois
Jerome Martin
Eric Guthmuller
Frederic Rousseau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1858803A priority Critical patent/FR3086426B1/fr
Priority to EP19198447.5A priority patent/EP3629171A1/fr
Priority to US16/580,039 priority patent/US11397625B2/en
Publication of FR3086426A1 publication Critical patent/FR3086426A1/fr
Application granted granted Critical
Publication of FR3086426B1 publication Critical patent/FR3086426B1/fr
Active legal-status Critical Current
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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4498—Finite state machines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/524—Deadlock detection or avoidance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/542—Event management; Broadcasting; Multicasting; Notifications

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Multi Processors (AREA)

Abstract

La présente description concerne une architecture multicœur comprenant : une pluralité de dispositifs de traitement, chaque dispositif de traitement comprenant un seul processeur ou une grappe de processeurs ; et un gestionnaire de verrous (500) associé à chaque dispositif de traitement, chaque gestionnaire de verrous étant agencé pour : mémoriser une première valeur de données indiquant s'il possède ou non actuellement un premier verrou, le premier verrou autorisant l'accès à une ressource ; et permettre qu'un propriétaire du premier verrou soit déterminé par un ou plusieurs gestionnaires de verrous en diffusant, sur un réseau d'interconnexions vers chacun des autres gestionnaires de verrous, au moins un message.
FR1858803A 2018-09-26 2018-09-26 Gestionnaire de verrous pour architecture multicoeurs Active FR3086426B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1858803A FR3086426B1 (fr) 2018-09-26 2018-09-26 Gestionnaire de verrous pour architecture multicoeurs
EP19198447.5A EP3629171A1 (fr) 2018-09-26 2019-09-19 Gestionnaire de verrouillage pour architectures multi-c urs
US16/580,039 US11397625B2 (en) 2018-09-26 2019-09-24 Lock manager for multi-core architectures

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1858803A FR3086426B1 (fr) 2018-09-26 2018-09-26 Gestionnaire de verrous pour architecture multicoeurs

Publications (2)

Publication Number Publication Date
FR3086426A1 FR3086426A1 (fr) 2020-03-27
FR3086426B1 true FR3086426B1 (fr) 2021-10-29

Family

ID=65243887

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1858803A Active FR3086426B1 (fr) 2018-09-26 2018-09-26 Gestionnaire de verrous pour architecture multicoeurs

Country Status (3)

Country Link
US (1) US11397625B2 (fr)
EP (1) EP3629171A1 (fr)
FR (1) FR3086426B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116438518A (zh) * 2020-11-16 2023-07-14 许梓俊 通过硬件加速内核线程进行微线程控制的处理器架构

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8086579B1 (en) 2002-01-22 2011-12-27 Oracle International Corporation Semantic response to lock requests to reduce coherence overhead in multi-node systems
US6950913B2 (en) * 2002-11-08 2005-09-27 Newisys, Inc. Methods and apparatus for multiple cluster locking
US7627573B2 (en) * 2004-03-27 2009-12-01 Cisco Technology, Inc. Bypassing native storage operations by communicating protected data within locking messages using a lock manager independent of the storage mechanism
CN104102549B (zh) * 2013-04-01 2017-12-15 华为技术有限公司 一种实现多线程互斥操作的方法、装置和芯片
WO2017018976A1 (fr) * 2015-07-24 2017-02-02 Hewlett Packard Enterprise Development Lp Gestionnaire de verrouillage

Also Published As

Publication number Publication date
US11397625B2 (en) 2022-07-26
US20200097336A1 (en) 2020-03-26
FR3086426A1 (fr) 2020-03-27
EP3629171A1 (fr) 2020-04-01

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