FR3079944B1 - POWER MANAGEMENT SYSTEM AND METHOD - Google Patents

POWER MANAGEMENT SYSTEM AND METHOD Download PDF

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Publication number
FR3079944B1
FR3079944B1 FR1853101A FR1853101A FR3079944B1 FR 3079944 B1 FR3079944 B1 FR 3079944B1 FR 1853101 A FR1853101 A FR 1853101A FR 1853101 A FR1853101 A FR 1853101A FR 3079944 B1 FR3079944 B1 FR 3079944B1
Authority
FR
France
Prior art keywords
island
management system
power management
circuit
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1853101A
Other languages
French (fr)
Other versions
FR3079944A1 (en
Inventor
Mathieu Louvat
Lionel Jure
Gauthier Reveret
Alexandre Charvier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dolphin Design Fr
Original Assignee
Dolphin Integration SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dolphin Integration SA filed Critical Dolphin Integration SA
Priority to FR1853101A priority Critical patent/FR3079944B1/en
Priority to US16/377,761 priority patent/US11068018B2/en
Priority to CN201910285193.2A priority patent/CN110362187A/en
Publication of FR3079944A1 publication Critical patent/FR3079944A1/en
Application granted granted Critical
Publication of FR3079944B1 publication Critical patent/FR3079944B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

L'invention concerne un système informatique comprenant : un îlot (102) comprenant un groupe de circuits capable de fonctionner dans l'un d'une pluralité de modes de fonctionnement, l'îlot étant couplé à un circuit de commande d'îlot (122) ; et un circuit de génération d'horloge (902) fournissant un autre signal d'horloge au circuit de commande d'îlot (122) pour contrôler un changement de mode de l'îlot, le circuit de génération d'horloge (902) étant agencé pour sélectionner l'une d'une pluralité de fréquences d'horloge pour l'autre signal d'horloge, la sélection étant basée sur le changement de mode de fonctionnement à appliquer.A computer system comprising: an island (102) including a circuit group capable of operating in one of a plurality of modes of operation, the island being coupled to an island control circuit (122). ); and a clock generation circuit (902) supplying another clock signal to the island control circuit (122) to control a mode change of the island, the clock generation circuit (902) being arranged to select one of a plurality of clock frequencies for the other clock signal, the selection being based on the change of operating mode to be applied.

FR1853101A 2016-10-25 2018-04-10 POWER MANAGEMENT SYSTEM AND METHOD Active FR3079944B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1853101A FR3079944B1 (en) 2018-04-10 2018-04-10 POWER MANAGEMENT SYSTEM AND METHOD
US16/377,761 US11068018B2 (en) 2016-10-25 2019-04-08 System and method for power management of a computing system with a plurality of islands
CN201910285193.2A CN110362187A (en) 2018-04-10 2019-04-10 System and method for power management

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1853101 2018-04-10
FR1853101A FR3079944B1 (en) 2018-04-10 2018-04-10 POWER MANAGEMENT SYSTEM AND METHOD

Publications (2)

Publication Number Publication Date
FR3079944A1 FR3079944A1 (en) 2019-10-11
FR3079944B1 true FR3079944B1 (en) 2021-05-21

Family

ID=63209490

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1853101A Active FR3079944B1 (en) 2016-10-25 2018-04-10 POWER MANAGEMENT SYSTEM AND METHOD

Country Status (2)

Country Link
CN (1) CN110362187A (en)
FR (1) FR3079944B1 (en)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5623234A (en) * 1996-03-04 1997-04-22 Motorola Clock system
US7071738B1 (en) * 2004-06-24 2006-07-04 Xilinx, Inc. Glitchless clock selection circuit using phase detection switching
JP2006318380A (en) * 2005-05-16 2006-11-24 Handotai Rikougaku Kenkyu Center:Kk Circuit system
TWI342498B (en) * 2007-01-12 2011-05-21 Asustek Comp Inc Multi-processor system and performance enhancement method thereof
US20090292934A1 (en) * 2008-05-22 2009-11-26 Ati Technologies Ulc Integrated circuit with secondary-memory controller for providing a sleep state for reduced power consumption and method therefor
FR3043476B1 (en) * 2015-11-05 2018-09-28 Dolphin Integration SYSTEM AND METHOD FOR FEED MANAGEMENT

Also Published As

Publication number Publication date
FR3079944A1 (en) 2019-10-11
CN110362187A (en) 2019-10-22

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