FR3053832B1 - METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR - Google Patents

METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR Download PDF

Info

Publication number
FR3053832B1
FR3053832B1 FR1656407A FR1656407A FR3053832B1 FR 3053832 B1 FR3053832 B1 FR 3053832B1 FR 1656407 A FR1656407 A FR 1656407A FR 1656407 A FR1656407 A FR 1656407A FR 3053832 B1 FR3053832 B1 FR 3053832B1
Authority
FR
France
Prior art keywords
transistor
field effect
manufacturing field
effect heterojunction
corresponding transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1656407A
Other languages
French (fr)
Other versions
FR3053832A1 (en
Inventor
Serge Loudot
Rene Escoffier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renault SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Renault SAS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Renault SAS, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1656407A priority Critical patent/FR3053832B1/en
Publication of FR3053832A1 publication Critical patent/FR3053832A1/en
Application granted granted Critical
Publication of FR3053832B1 publication Critical patent/FR3053832B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
FR1656407A 2016-07-05 2016-07-05 METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR Active FR3053832B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR1656407A FR3053832B1 (en) 2016-07-05 2016-07-05 METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1656407A FR3053832B1 (en) 2016-07-05 2016-07-05 METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR
FR1656407 2016-07-05

Publications (2)

Publication Number Publication Date
FR3053832A1 FR3053832A1 (en) 2018-01-12
FR3053832B1 true FR3053832B1 (en) 2018-11-30

Family

ID=56684112

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1656407A Active FR3053832B1 (en) 2016-07-05 2016-07-05 METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR

Country Status (1)

Country Link
FR (1) FR3053832B1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5383059B2 (en) * 2008-02-26 2014-01-08 ローム株式会社 Field effect transistor
US20140374766A1 (en) * 2013-06-20 2014-12-25 Texas Instruments Incorporated Bi-directional gallium nitride switch with self-managed substrate bias

Also Published As

Publication number Publication date
FR3053832A1 (en) 2018-01-12

Similar Documents

Publication Publication Date Title
FR3057702B1 (en) METHOD FOR MANUFACTURING A COILGROUND FIELD EFFECT TRANSISTOR
FR3026454B1 (en) ROLLER SCREW MECHANISM AND METHOD OF MANUFACTURING THE SAME
GB2563365B (en) Method for manufacturing a graphene thin-film transistor
FR3042907B1 (en) METHOD FOR MANUFACTURING A MOS TRANSISTOR DEVICE
FR3026455B1 (en) INTEGRATED CURVED ROLLER SCREW MECHANISM AND METHOD FOR MANUFACTURING SAME
FR3038774B1 (en) METHOD FOR PRODUCING A HIGH-VOLTAGE TRANSISTOR WITH A REDUCED SIZE, AND CORRESPONDING INTEGRATED CIRCUIT
FR3003086B1 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
FR3025056B1 (en) LASER DEVICE AND METHOD FOR MANUFACTURING SUCH A LASER DEVICE
FR3007573B1 (en) TRIGGER AND METHOD FOR MANUFACTURING SUCH TRIGGER
EP3509101A4 (en) Device integrating a junction field effect transistor and manufacturing method therefor
FR3033665B1 (en) SINGLE ELECTRONIC TRANSISTOR AND METHOD FOR MAKING SAME
FR3050867B1 (en) PROCESS FOR MANUFACTURING A VERTICAL CHANNEL NANOCOUCHES TRANSISTOR
FR3020500B1 (en) PROCESS FOR PRODUCING AN IMPROVED FIELD EFFECT TRANSISTOR
FR3045940B1 (en) INDUCTANCE DEVICE AND METHOD FOR MANUFACTURING THE SAME
FR3006108B1 (en) METHOD FOR MANUFACTURING A PHOTOSENSITIVE DEVICE
EP3432349A4 (en) Method for manufacturing a field effect transistor
FR3043376B1 (en) FLYWHEEL AND METHOD FOR MANUFACTURING SUCH A FLYWHEEL.
FR3046559B1 (en) METHOD AND INSTALLATION FOR MANUFACTURING A THREE-DIMENSIONAL OBJECT
FR3034906B1 (en) METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT COINTEGRATING A FET TRANSISTOR AND A MEMORY POINT OXRAM
FR3035815B1 (en) METHOD FOR MANUFACTURING A PLASTIC PART, AND ASSOCIATED DEVICE
FR3002813B1 (en) METHOD FOR MANUFACTURING A MOS-TOILET TRANSISTOR
FR3049110B1 (en) PROCESS FOR PRODUCING A FIELD EFFECT TRANSISTOR WITH REDUCED PARASITE CAPACITY
FR3037613B1 (en) DEVICE AND METHOD FOR MANUFACTURING A TUNNEL TAP
FR3057586B1 (en) METHOD FOR MANUFACTURING A BALCONY AND BALCONY OBTAINED
FR3053832B1 (en) METHOD FOR MANUFACTURING FIELD EFFECT HETEROJUNCTION TRANSISTOR AND CORRESPONDING TRANSISTOR

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLSC Publication of the preliminary search report

Effective date: 20180112

PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 5

PLFP Fee payment

Year of fee payment: 6

PLFP Fee payment

Year of fee payment: 7

CA Change of address

Effective date: 20221014

PLFP Fee payment

Year of fee payment: 8