FR3039707A1 - METHOD FOR MANUFACTURING HYBRID DEVICES - Google Patents

Abstract

The method comprises the steps of: a) providing at least a first substrate (1), b) providing a second substrate (2), c) forming an intermediate portion (5) extending at least partially between the at least one first substrate (1) and the second substrate (2), d) forming a first emitter layer (6) and a BSF layer (17) respectively on either side of the at least one first substrate (1) , e) forming a second emitter layer (7) and a base layer (15) respectively on either side of the second substrate (2), f) forming a first metal contact (11) on the first layer of emitter (6) and forming a second metal contact (13) on the BSF layer (17), g) forming a third metal contact (8) on the second emitter layer (7) and forming a fourth metal contact (14) ) on the base layer (15), and h) forming an electrical connection between the fourth metal contact (14) and the first metal contact (11) and connecting in parallel the bypass diode (21) and the photovoltaic cell (19).

Description

The present invention relates to a method for manufacturing hybrid devices, comprising at least one photovoltaic cell and a bypass diode, intended for applications in the photovoltaic field, in particular for the manufacture of photovoltaic modules. According to a second aspect, the invention relates to the hybrid device obtainable by said manufacturing method.

A photovoltaic module (or photovoltaic) is a set of photovoltaic cells connected to each other by a series connection. The majority of modules marketed include about sixty cells of size 156 mm x 56 mm and provide a power of about 270 W. The module also fulfills the function of protecting the cells of the external environment because they are encapsulated in a transparent resin which is it -Even sandwiched between two glass plates or a glass plate and a polymer plate during a lamination step that finalizes the manufacture of the module. Despite this protection, the performance of a module can still be mitigated by two phenomena: the shading of a portion of the photovoltaic panel and / or the technical failure of one or more cells.

In order to limit these problems, a corrective measure consists in connecting in parallel a network of cells of the module to a bypass diode, commonly called bypass diode, in inverted polarity, for short-circuiting a faulty network of the module generally comprising three networks. . Thus, when a cell produces a lower current than usual, due to shading effects or failures, the bypass diode offers an alternative to the cell network because it has a lower electrical resistance. The bypass diode then allows either to prevent heating of the cell and its damage, because of a current feedback in the opposite direction of the dipole, or a loss of power produced by the module, the cells connected in series. producing a current of the same intensity as the shaded cell. This mitigates the loss of performance of the module.

However, this configuration pauses the following problems: - In the current configuration (three networks per module), each time a cell of a network is shaded or partially damaged, the module loses one third of its power by the malfunction of the network. one of the three networks. - By-pass diodes are manufactured separately and offered by global suppliers of electronic components, o By-pass diodes are not necessarily guaranteed for the constraints specific to the photovoltaic module, hence a risk of lack of robustness. o This is an additional article in the nomenclature with all the associated logistical complexity. o These are elements external to the manufacture of photovoltaic devices which are added at the time of mounting the module by connection in opposite polarity to a network of cells. This requires a specific step for soldering these diodes in the junction box.

One of the aims of the present invention is to overcome one or more of these disadvantages. To this end, the invention relates to a method of manufacturing hybrid devices for photovoltaic applications, the method comprising the steps of: a) providing at least a first substrate for forming a photovoltaic cell, b) providing a second substrate for to form a bypass diode, c) forming an intermediate portion extending at least partially between the at least one first substrate and the second substrate, the intermediate portion being configured to at least partially and electrically isolate the at least one minus a first substrate of the second substrate, d) forming a first emitter layer and a BSF layer respectively on either side of the at least one first substrate, e) forming a base layer and a second layer of transmitter respectively on either side of the second substrate, f) forming a first metal contact on the first emitter layer and forming a second metal contact on the BSF layer so as to obtain the photovoltaic cell, and g) forming a third metal contact on the second emitter layer and forming a fourth metal contact on the base layer so as to obtain the bypass diode, and h) Form an electrical connection between the fourth metal contact and the first metal contact and connect in parallel the bypass diode and the photovoltaic cell.

Thus, this method allows the manufacture of a hybrid device, comprising a photovoltaic cell and a bypass diode on the same support. This facilitates the integration of bypass diodes in a photovoltaic module. It is then advantageous to divide the module into a larger number of networks comprising photovoltaic cells and a bypass diode connected in parallel. This device is operational after the conventional connection operations performed during the assembly of a photovoltaic module. The manufacture of this device takes place without any additional step compared to the conventional manufacture of a photovoltaic cell used in mono-facial homojunction devices. This is made possible by the use of substrates delimited by an insulating spacer portion making it possible to avoid leakage currents, produced during the step of manufacturing the hybrid device.

In addition, this hybrid device avoids the sacrifice of a portion of the first illuminated surface of the photovoltaic cell so that the intensity of the current produced by a cell is maximized.

The photovoltaic cell formed by the method is advantageously connected to photovoltaic cells in order to form an array of cells connected in series in a photovoltaic module. The bypass diode formed by the method is then connected in parallel to the network. This type of integration of the bypass diode allows greater use for the same number of cells in a photovoltaic module, making the modules more robust and tolerant of shadows and failures. This makes it possible to reduce the number of cells per network while maintaining an identical number of cells in a module, and thus to limit power losses in the event of shading or failure of a cell.

By convention, the first surface of the first substrate is designated as the face which is intended to be illuminated by light.

The term bypass diode means in this document a non-return diode, connected in parallel to an electric circuit so as to allow a short-circuit of the latter in case of reverse voltage.

By the term "transmitter layer" is meant in this document a layer of conductivity type identical to that of the substrate. The term "base layer" refers to a layer of conductivity type opposite to that of the substrate herein. The expression "BSF" comes from the English acronym 'Back Surface

Field '.

It is understood in this document that the expression "at least partially insulate" means that the insulation provided may be partial because the material of the intermediate portion is not an insulator but a material with lower electrical conduction properties. to those of the first substrate and the second substrate, such as for undoped semiconductor material. According to another case, the insulation provided is partial for spatial reasons, for example because part of the first substrate is in direct contact with a part of the second substrate, in the absence of an intervening portion between these parts. .

Preferably, the first metal contact, the second metal contact, the third metal contact and the fourth metal contact are formed by screen printing.

It is also understood that steps a) and h) of this method are not necessarily performed in alphabetical order.

According to one arrangement, step c) is carried out after one of the steps from step d), step e), step f), and step g). Thus, the realization of the integration of the bypass diode can be carried out at any time in the production line of photovoltaic module networks, from raw substrates as from substrate more or less functionalized to substrates transformed into a cell or diode.

Likewise, the formation of the emitter base layers on the first substrate according to steps d) and e) can be shifted in time.

Moreover, complementary steps can be introduced between each of the steps a) to h). For example, according to one possibility, the method comprises, before step f), a step of forming an antireflection layer on the first substrate. For simplification of the process this step may also include the formation of an antireflection layer on the second substrate

Advantageously, the method comprises, before step f), a step of forming a passivation layer on the first substrate and on the second substrate.

Preferably, the first substrate and the second substrate are formed of an n-type or p-type doped semiconductor material, preferably the semiconductor material is chosen from alloys of elements of columns III and V comprising GaN and a element or alloys of elements of columns IV and more preferably, the semiconductor material is silicon and preferably crystalline silicon. These materials have indeed a forbidden band particularly adapted to supply current from the light.

According to one arrangement, the first substrate and / or the second substrate are formed by a heterostructure of semiconductor materials of different natures.

Advantageously, the formation of the first emitter layer is performed concomitantly with the formation of the second emitter layer. This configuration reduces the cycle times of the manufacturing process.

For the same reason, the formation of the BSF layer is carried out concomitantly with the formation of the base layer.

According to a particular embodiment, the method comprises, before step a) a step I) of supplying a wafer, and wherein steps a) and b) comprise the formation of a trench in the wafer so as to at least partially delimiting the at least one first substrate (1) and the second substrate, and wherein the step (c) of forming the intermediate portion comprises the formation of an electrical insulation layer on the walls of the trenched so as to at least partially and electrically isolate the at least one first substrate of the second substrate.

According to this embodiment, steps a) and b) are performed by the step of providing a wafer comprising the first substrate and the second substrate. These are then partially defined by the formation of the trench, the latter not separating the two substrates over their entire thickness. Thus, the intermediate portion partially isolates the two substrates because part of these remain in direct contact.

The trench is preferably formed from the surface of the wafer which is intended to receive the light.

According to one possibility, the trench is formed by a laser irradiation of the surface of the wafer.

Typically, the formation of the electrical insulation layer comprises the deposition of a SiOx layer by PECVD (Plasma Enhanced Chemical Vapor Deposition).

According to another embodiment, the method comprises, before step a), the realization of a step m) of supplying a p-type silicon wafer, and in which steps a) and b) comprise the formation of a a doping zone compensated in the wafer so as to delimit the at least one first substrate and the second substrate, the compensated doping zone forming the intermediate portion of step c).

In this embodiment, the compensated doping zone in the silicon wafer defines at least in part a primary side surface of the first substrate and a secondary side surface of the second substrate.

Preferably, the compensated doping zone completely delimits the first substrate and the second substrate by completely defining the primary lateral surface and the secondary lateral surface. Thus the intermediate portion extends over the entire primary side surface and the entire secondary side surface so as to avoid leakage currents.

According to one possibility, the formation of the compensated doping zone is carried out by the steps of applying a heat treatment to the entire wafer so as to activate thermal donors until a wafer is obtained. n-type silicon, and laser local irradiation of a portion of the wafer so as to form the compensated doping zone.

The heat treatment or activation annealing is carried out at 450 ° C. and for 15 to 300 minutes depending on the initial dopant concentration of the material.

Preferably, the spacer portion or compensated doping zone formed by this variant embodiment is configured to define the totality of the primary lateral surface and the secondary lateral surface, so as to provide electrical insulation of the first substrate and the second substrate on all their thickness. The first substrate does not maintain contact with the second substrate.

According to a third embodiment of the invention, step c) of forming the intermediate portion comprises the formation of at least one electrical insulation layer between the at least one first substrate and the second substrate, the layer electrical insulation covering a primary side surface of the at least one first substrate and a secondary side surface of the second substrate, the at least one first substrate and the second substrate being assembled through the electrical insulation layer .

In this configuration, the first substrate and the second substrate as provided in steps a) and b) are initially separate and then assembled by the at least one layer of electrical insulation.

Preferably, the electrical insulation layer covers the entire lateral surface of the first substrate and the second substrate so as to completely isolate the first substrate from the second substrate.

According to one possibility, the at least one electrical insulation layer is formed from silicon oxide, such as SiOx or SiO 2, or from a TiO 2, Al 2 O 3, ZnO oxide powder, a mixture of these oxide powders, or a mixture of these oxide powders with at least one organic and / or inorganic binder.

According to one possibility, step c) of forming the intermediate portion comprises: depositing electrical insulation layers respectively on the primary lateral surface of the at least one first substrate and on the secondary lateral surface of the second substrate, and - forming an electrical conduction layer between the electrical insulation layers so as to assemble the at least first substrate and the second substrate, step f) comprises forming a first metal contact configured to connect electrically the first emitter layer and the electrical conduction layer, step g) comprises forming a fourth metal contact configured to electrically connect the base layer and the electrical conduction layer, and forming the electrical connection between the bypass diode and the photovoltaic cell according to step h) being carried out via the electric conduction layer.

In this configuration, the at least one first substrate and the second initially distinct substrate are electrically isolated from one another and assembled together with an assembly comprising two layers of electrical insulation between which a layer conduction is formed vertically. Thus, when mounting a photovoltaic module, the parallel connection of the bypass diode to the network comprising the photovoltaic cells connected in series is performed by the electric conduction layer. This configuration makes it possible to avoid an additional wired connection step between the bypass diode and the first photovoltaic cell of the network.

According to one possibility, the first metal contact is disposed in contact with the first emitter layer and the electrical conduction layer.

According to one arrangement, the fourth metal contact is disposed in contact with the base layer and the electrical conduction layer.

According to one possibility, the formation of the electrical conduction layer comprises, before step f), the steps of: - forming a silicon layer on the at least one electrical insulation layer, - forming a metal layer on at least one of the silicon layers, the metal being in particular chosen to form a eutectic with silicon, such as aluminum, silver, gold, platinum, barium, copper or an alloy of these metals, - contacting the metal layers in pairs, and - applying a heat treatment at a temperature between the eutectic forming temperature between the silicon and said metal and 900 ° C.

Thus an electrical conduction layer is obtained between the first substrate and the second substrate. Furthermore, the conditions used are favorable for obtaining diffusion of the silicon in the metal so as to obtain, after cooling, an assembly of substrates bonded together by means of a stack formed of an insulation layer. electric, for example of SiOx thermal oxide, a residual layer of silicon, a layer of an Si-metal alloy, a residual metal layer, a layer of the Si-metal alloy, a residual layer of silicon and an SiOx electrical insulation layer.

Another advantage provided by the use of a metal and especially a low-melting point metal, such as aluminum, to form the electrical conduction layer is that the heat treatment makes it possible to liquefy at least part the metal layers in contact so as to homogenize the electrical conduction layer and ensure a very good bonding between the first and second substrates. Furthermore, the heat treatment guarantees the diffusion of the adjacent silicon in the liquid aluminum phase, which, after cooling, allows the formation of an Al-Si alloy whose composition is close to that of the eutectic when the heat treatment applied reaches 650 ° C. In addition, the electrical insulation layers deposited upstream on the first and second substrates form an effective barrier to the diffusion of the metal to the first and second substrates so that the electrical insulation between them is well maintained.

Another advantage to the presence of the electrical insulation layers lies in the fact that they act as barrier layers to the diffusion of the impurities of the metal towards the first substrate and the second substrate, which could have adverse effects on the performance of the cells.

In this embodiment, the material of the electrical insulation layers may be of any of the aforementioned types, namely a deposited silicon oxide, thermal, in the form of powder and oxide powders.

The metal layer is advantageously formed by sputtering or by evaporation or by full plate screen printing of a conductive paste whose conductive element forms a eutectic with silicon.

The nature of the metal present in the metal layer is also chosen so that the metal layer has an electrical resistivity of less than or equal to 10 -4 ohm.cm.

According to one variant, the formation of the electrical conduction layer comprises, before step f), an arrangement of at least one metallic element, such as an Al, Ar, Au, Zn, Cu, Pt or Ba insert between the layers of electrical insulation. Preferably, this arrangement of an insert is followed by a heat treatment is applied to enhance the energy assembly between the first substrate and the second substrate.

According to another possibility, the formation of the electrical conduction layer comprises, before step f), a screen-printing deposit of a layer of conductive paste on at least one layer of electrical insulation, followed by a thermal treatment applied between 300 ° C and 900 ° C and preferably at about 500 ° C so as to anneal or activate the screen printed conductive paste

The conductive paste consists, for example, of a fairly viscous mixture of a matrix, such as glass frit, and metal billets, such as aluminum billets.

According to one possibility, protective elements of the exposed surfaces of the conduction layer and electrical insulation layers are formed so as to protect these layers from subsequent treatments, such as HF cleaning, and also to avoid the risks of short circuit between the photovoltaic cell and the bypass diode.

Advantageously, step a) of the method comprises the provision of a plurality of first substrates, step d) comprises the formation of a first emitter layer and a BSF layer respectively on either side of each of the first substrates, step f) comprises the formation of a first metal contact on each of the first emitter layers and the formation of a second metal contact on each of the BSF layers so as to obtain a plurality of photovoltaic cells, the a method further comprising a step i) of serially connecting the plurality of photovoltaic cells so as to form a photovoltaic cell array, and wherein step h) comprises forming an electrical connection for connecting in parallel the by-pass diode and the photovoltaic cell network.

The provision of several photovoltaic cell arrays connected in parallel to a bypass diode as previously described allows the rapid construction of an efficient photovoltaic module.

According to another possibility, the method comprises, before step a) the realization of a step k) comprising the steps of: - providing bricks with assembly surfaces, - forming layers of electrical insulation so as to cover the assembly surfaces, - forming an electrical conduction layer between the electrical insulation layers so as to assemble neighboring bricks according to an assembly plane and to form at least one assembly, - subject the assembly to a heat treatment and - cutting the at least one assembly in a plane perpendicular to the assembly plane, the at least one cut assembly forming the plurality of first substrates and the second substrate assembled to a first adjacent substrate via a electrical conduction layer, the method further comprising a step i) of forming an electrical connection for connecting in series the photovoltaic cells, obtained according to the steps of ) and f) via an electrical conduction layer.

Thus, the series connection of photovoltaic cells is obtained via an electrical conduction layer and the parallel connection of the bypass diode to the photovoltaic cell array.

According to one possibility, the method furthermore comprises the provision of several networks of photovoltaic cells connected in series, each of the networks being connected in parallel with a bypass diode, and each of the networks being connected in parallel with the other networks so as to to form a photovoltaic module.

According to a second aspect, the invention also proposes a hybrid device intended for photovoltaic applications, the hybrid device comprising - at least one photovoltaic cell comprising a first substrate, a first emitter layer and a BSF layer respectively disposed of on one side and on the other side. other of the first substrate, a first metal contact disposed on the first emitter layer and a second metal contact disposed on the BSF layer, - a bypass diode comprising a second substrate, a second emitter layer and a stripping layer. base respectively disposed on either side of the second substrate, a third metal contact disposed on the second emitter layer and a fourth metal contact disposed on the base layer, - an intermediate portion extending at least partially between the first substrate and the second substrate, the intermediate portion being configured to at least isolate and electrically the first substrate and the second substrate, and - an electrical connection connecting in parallel the at least one photovoltaic cell and the bypass diode.

According to one possibility, the first substrate and the second substrate are formed of a semiconductor material, preferably the semiconductor material is selected from alloys of elements of columns III and V comprising GaN and a metal alloy element or alloys. Column elements IV and more preferably, the semiconductor material is silicon and preferably crystalline silicon.

Advantageously, the intermediate portion extends completely between the first substrate and the second substrate, the intermediate portion comprising a first electrical insulation layer covering a primary lateral surface of the first substrate, a second electrical insulation layer covering a secondary lateral surface. of the second substrate, and an electrical conduction layer between the first electrical insulating layer and the second electrical insulating layer and assembling the at least first substrate to the second substrate, and wherein the electrical connection connecting in parallel the at least one minus one photovoltaic cell and the bypass diode is realized via the electric conduction layer.

Preferably, the hybrid device comprises a plurality of photovoltaic cells connected in series and an electrical connection connecting in parallel the bypass diode and the series network of the photovoltaic cells. Other aspects, objects and advantages of the present invention will appear better on reading the following description of the different embodiments thereof, given by way of non-limiting example and with reference to the accompanying drawings. The figures do not necessarily respect the scale of all the elements represented so as to improve their readability. In the remainder of the description, for the sake of simplification, identical, similar or equivalent elements of the various embodiments bear the same numerical references.

Figures 1 to 7 schematically illustrate a first embodiment of the method of the invention.

Figures 8 to 11 schematically illustrate the first steps of a second embodiment of the method of the invention.

Figures 12 to 16 schematically illustrate a third embodiment of the method of the invention.

Fig. 17 illustrates a variant of the third embodiment.

Figures 18 and 19 schematically illustrate a fourth embodiment of the method of the invention.

Figures 20 to 22 schematically illustrate another embodiment of the method of the invention.

FIGS. 1 to 7 illustrate a first embodiment of the invention in which the at least one first substrate 1 and the second substrate 2 are provided according to step a) and b) by producing a wafer 3 in silicon containing the at least a first substrate 1 and the second substrate 2 (Figure 1-step I). In this example, the wafer is p-type silicon. As illustrated in FIG. 2, a step of forming a trench 4 in the wafer 3 by laser irradiation makes it possible to delimit in part the first substrate 1 and the second substrate 2 (FIG. 2). Then the formation of an intermediate portion 5 according to step c) is obtained in two steps; firstly by deposition of an electrical SiOx insulation layer by PECVD on a first surface of the at least one first substrate 1, on a first face of the second substrate 2 and on the walls of the trench 4 (FIG. 3). In a second step, a local withdrawal of the SiOx layer on the substrates 1, 2 is carried out by dry etching of the plasma type. The SiOx electrical insulation layer remains only on the walls of the trench 4 and constitutes the intermediate portion 5. A portion of the first substrate 1 remaining in contact with a portion of the second substrate 2, the electrical insulation generated by the presence of the intermediate portion 5 between the first substrate 1 and the second substrate 2 is partial (Figure 4).

According to an alternative, the removal of the SiOx electrical insulation layer on the substrates 1, 2 is carried out by chemical etching in the liquid phase.

A layer of material of reversed polarity to that of the wafer 3, here an n-type silicon layer, is then formed by diffusion of POCI3 at 850 ° C from the first surface and the first face (oriented in the same direction). direction), making it possible to create n + type dopants in the silicon and respectively a first emitter layer 6 and a second emitter layer 7. A layer based on a phosphor glass formed during the diffusion is cleaned in a hydrofluoric acid bath diluted 10% for about 5 minutes (Figure 5). Then, the deposition of an antireflection layer 9 of SiNx is carried out by PECVD on the emitter layer 6 and the emitter layer 7. As illustrated in FIG. 6, a first metal contact 11 and a third metal contact 8 are deposited in silver form of grid and "busbar" by screen printing respectively on the first emitter layer 6 and the second emitter layer 7, while an aluminum contact layer is deposited by screen printing on the opposite surface of the first substrate 1 and on an opposite face of the second substrate 2 to form respectively a second metal contact 13 and a fourth metal contact 14. A heat treatment is then applied at 850 ° C under ambient atmosphere to anneal the contacts and allow the diffusion of aluminum in the first substrate 1 and the second substrate 2 in silicon. This diffusion of the aluminum in the silicon creates dopants of the same polarity as that of the wafer 3, here p + type which lead to the formation of an underlying p-type layer forming the BSF layer 17 on the first substrate 1, and forming the base layer 15 on the second substrate 2. Then, the first substrate 1 is electrically connected to a plurality of other first substrates 1, similarly functionalized, so as to connect the photovoltaic cells in series. 19 according to step i) of the process (bold line Figure 7). The second substrate 2 is then connected in parallel (dashed lines) to the array of photovoltaic cells 19 in series according to step h) so as to ensure the function of a bypass diode 21. According to a possibility not shown, three sets each consisting of a network of photovoltaic cells 19 in series and the bypass diode, are connected in parallel so as to generate a photovoltaic module.

Advantageously, the trench 4 is formed so as to create a first substrate 1 of larger longitudinal dimensions than those of the second substrate 2. The first substrate 1 requires in fact to absorb a maximum of photons while material savings are made for the manufacture of the bypass diode 21 which does not require an absorption surface.

FIGS. 8 to 11 illustrate a second embodiment of the invention in which the intermediate portion 5 is formed by compensation of the doping of an area of a wafer 3 of p-type silicon (FIG. 8) so as to delimit the at least a first substrate 1 and the second substrate 2. According to one possibility, the compensation is performed in two steps. A first step first consists in applying a heat treatment at approximately 450 ° C. for 15 minutes to the wafer 3 so as to activate thermal donors in a proportion such that the polarity of the wafer 3 is inverted in the n-type (FIG. 9). The second step comprises local laser irradiation on both sides of the wafer. The compensated doping zone 5 delimits the entirety of the first substrate 1 and the second substrate 2 (FIG. 10).

The intermediate portion 5 in fact defines the whole of a primary lateral surface 22 of the first substrate 1 and of a secondary lateral surface 23 of the second substrate 2 facing the primary lateral surface 22. Thus, at the end of the step compensation, no residual contact area persists between the first substrate 1 and the second substrate 2. The intermediate portion 5 spatially isolates the two substrates 1,2. The rest of the process relating to steps d) to g) of forming the dipoles, forming the metal contacts 8, 11, 13, 14 is similar to that described above. By-pass diode 21 and photovoltaic cell 19 are also connected in reverse polarity (step h) -figure 11).

FIGS. 12 to 16 illustrate a third embodiment which differs from the previous embodiments, in particular in that the first substrate 1 supplied in step a) and the second substrate 2 supplied in step b) are spatially distinct and that the formation of the intermediate portion 5 according to step c) participates in the assembly between the two substrates 1, 2.

As illustrated in FIG. 12, a first substrate 1 with a length of 156 mm in silicon, of type p in this example, is provided with a second substrate 2 with a length of 20 mm in silicon, also of p type (concentration in boron 10e15 at / cm3), the length being measured in the direction of the assembly of the primary lateral surface 22 of the first substrate 1 and the secondary lateral surface 23 of the second substrate 2 (refer to the arrows in FIG. 12). The two substrates 1, 2 are placed in a thermal oxidation oven for the application of a heat treatment at 850 ° C. for a period of 30 minutes. These conditions allow the formation of an electrical insulation layer 24 of SiOx silicon oxide, of a few nanometers in thickness, in particular on the primary lateral surface 22 and on the secondary lateral surface 23. Then, during the bonding of the first substrate 1 with the second substrate 2 the silicon oxide layers 24 are brought into contact and form the intermediate portion 5 extending between the first substrate 1 and the second substrate 2, and providing a total electrical insulation between the two substrates 1 , 2 (Figure 13). Indeed, the intermediate portion 5 is formed of an insulating material which separates all the primary side surfaces 22 and secondary 23.

According to one variant, a single electrical insulation layer 24 of silicon thermal oxide SiOx with a thickness of 15 nm is sufficient to form the insulating interlayer portion 5 between the first and the second substrate 1,2.

Furthermore, the at least one electrical insulation layer 24 forming the intermediate portion 5 can be obtained from other insulating materials, such as deposited silicon oxide SiO 2, an oxide powder based on TiO 2, Al 2 O 3, powdered SiO 2 ZnO, a mixture of these oxide powders, or a mixture of these oxide powders with at least one organic and / or inorganic binder. The presence of the binders makes it possible to lower the temperature necessary for sintering the powders. In the case of using powder to form the intermediate portion 5, the thickness of the latter is greater and is between 20 nm and 200 micrometers.

The rest of the process according to steps d) to i) are reproduced as previously described (FIGS. 14 and 15). The hybrid device 100 comprising a bypass diode 21 glued to a photovoltaic cell 19 and connected to a series array 18 of photovoltaic cells 19 is thus obtained. This set forms the first network of a photovoltaic module (Figure 16).

According to an alternative illustrated in FIG. 17, the first emitter layer 6 of the first substrate 1 is oriented on the same side as the base layer 15 of the second substrate 2. It follows that the electrical connection between the bypass diode 21 and the photovoltaic cell 19 is facilitated.

FIGS. 18 and 19 illustrate a fourth embodiment which differs from the third embodiment in that the first substrate 1 and the second substrate 2 are assembled via an electrical conduction layer 25 facilitating the electrical connections between the diode by pass 21 and an adjacent photovoltaic cell 19. An SiO 2 electrical insulation layer 24 is first deposited by PECVD on the primary side surface 22 and the secondary side surface 23 so as to laterally isolate each of the substrates 1, 2. Then, a screen-printing deposit of a layer of conductive paste based on aluminum and a glass frit matrix is produced on the electrical insulation layers 24 so as to form the electric conduction layer 25. Once the first substrate 1 and the second substrate 2 assembled, the intermediate portion 5 is thus formed by the two electrical insulation layers 24 between which the electrical conduction layer 25 extends. The latter has a final thickness of about 100 micrometers . Then, a heat treatment, used to stiffen the conductive paste ensuring the mechanical bonding between the first substrate 1 and the second substrate 2, is applied for 200 minutes at a temperature of about 700 ° C.

According to a variant, the metal contained in the conductive paste is silver or copper. According to still other variants, the thickness of the electrical conduction layer 25 varies between 5 and 500 μm and preferably it is between 10 and 100 micrometers. Depending on the nature of the materials used alternatively, the duration of the heat treatment varies between 1 and 300 minutes and the temperature is between 200 to 900 ° C.

The first emitter layer 6, the base layer 15, the second emitter layer 7, the BSF layer 17, and the metal contacts 8, 11, 13, 14 are formed in a manner similar to the method described above. except that the metal contacts are formed partly on the emitter layers and partly on exposed portions of the electrical conduction layer 25 at both ends thereof. Thus, the electrical connection between the bypass diode 21 and the adjacent photovoltaic cell 19 is made vertically via the electrical conduction layer 25, which also makes it possible to assemble the first substrate 1 and the second substrate 2. The assembly is realized so that when the array 18 of photovoltaic cells in series is in short-circuit mode because of a failure or a shading effect on a photovoltaic cell, the current flows in parallel through the layer electrical conduction 25 between the photovoltaic cell 19 and the bypass diode 21 (Figure 19).

FIGS. 20, 21 and 22 illustrate yet another embodiment of the invention in which the photovoltaic cells 19 and the bypass diode 21 are all assembled by means of at least one electrical conduction layer 25 making it possible to make some of the electrical connections.

A step k) performed before step a) comprises the provision of a plurality of bricks of semiconductor materials having assembly surfaces on which an electrical conduction layer 25 is deposited between two electrical insulation layers 24 of so to assemble two adjacent bricks according to an assembly plan (illustration of two bricks assembled in Figure 20). Once a heat treatment is performed, the assembly of the plurality of bricks is cut in a plane perpendicular to the assembly plane so as to form the plurality of first substrates 1 and a substrate 2, all assembled in pairs through an electrical conduction layer 25 disposed within two layers of electrical insulation 24 (Figure 21). Then the first emitter layer 6 and the second emitter layer 7 are formed simultaneously, the base layer 15 and the BSF layer 17 are also formed simultaneously according to the technique described above. The metal contacts 8 and 11 are formed simultaneously on the first emitter layer 6, and the second emitter layer 7 and partly on exposed portions of the electrical conduction layer 25 as the metal contacts 13 and 14 are formed simultaneously on the BSF layer 17 and the base layer 15 and partly on other exposed portions of the electrical conduction layer 25 so as to allow electrical connection (step i) by vertical electrical conduction between two adjacent photovoltaic cells 19 and between the bypass diode 21 and an adjacent photovoltaic cell 19 (Fig. 22). Thus, the number of manufacturing steps of a photovoltaic module network is significantly reduced, the volume of the hybrid device 100 as well as that of the series network of the cells is also reduced.

Thus, the present invention provides a method of manufacturing a hybrid device 100 for integration of a bypass diode 21 in a series array 18 of photovoltaic cells 19 at the stage of preparation of the substrate. Since the n-type p-layer forming steps and the metal contacts are the same for a network cell 18 as for the bypass diode 21, the overall number of steps for manufacturing the module is reduced. This method also eliminates the need to manufacture a junction box connecting the cell network and the bypass diode. The bypass diode 21 is formed specifically under the same conditions as the cells and preferably, together with the latter, so that it is perfectly suited to an outdoor application in the photovoltaic field and shows less failure than when it is purchased from a global supplier of electronic components. Furthermore, the contacts formed for the connection of the photovoltaic cell to the bypass diode are identical to the conventional contacts so that no loss of absorbing surface takes place. Thus, the method is inexpensive, has a reduced cycle time and provides a hybrid device effective and reliable over time.

It goes without saying that the invention is not limited to the embodiments described above as examples but that it includes all the technical equivalents and variants of the means described as well as their combinations.

Claims (13)

A method of manufacturing hybrid devices (100) for photovoltaic applications, the method comprising at least the steps of: a) Providing at least a first substrate (1) for forming a photovoltaic cell (19), b) Providing a second substrate (2) for forming a bypass diode (21); c) forming an intermediate portion (5) extending at least partially between the at least one first substrate (1) and the second substrate (2); ), the intermediate portion (5) being configured to at least partially and electrically isolate the at least one first substrate (1) of the second substrate (2), d) forming a first emitter layer (6) and a BSF layer (17) respectively on either side of the at least one first substrate (1), e) forming a second emitter layer (7) and a base layer (15) respectively of part and of other of the second substrate (2), f) forming a first metal contact (11) on the first layer of transmitter (6) and forming a second metal contact (13) on the BSF layer (17) so as to obtain the photovoltaic cell (19), and g) forming a third metal contact (8) on the second transmitter layer ( 7) and forming a fourth metal contact (14) on the base layer (15) so as to obtain the bypass diode (21), and h) forming an electrical connection between the fourth metal contact (14) and the first metal contact (11) and connect in parallel the bypass diode (21) and the photovoltaic cell (19). 2. Method according to claim 1, wherein the formation of the first emitter layer (6) is performed concomitantly with the formation of the second emitter layer (7). 3. Method according to one of claims 1 to 2, wherein the formation of the BSF layer (17) is performed concomitantly with the formation of the base layer (15). 4. Method according to one of claims 1 to 3, wherein before step a) is carried out a step I) of providing a wafer (3), wherein the steps a) and b) comprise the formation of a trench (4) in the wafer (3) so as to delimit at least partially the at least one first substrate (1) and the second substrate (2), and wherein the step c) of forming the intermediate portion (5) comprises forming an electrical insulation layer on the walls of the trench (4) so as to at least partially and electrically isolate the at least one first substrate (1) from the second substrate (2) . 5. Method according to one of claims 1 to 3, wherein before step a) is performed a step m) of providing a wafer (3) of p-type silicon, and wherein the steps a) and b) comprise the formation of a compensated doping zone in the wafer (3) so as to delimit the at least one first substrate (1) and the second substrate (2), the compensated doping zone forming the intermediate portion ( 5) of step c). 6. Method according to one of claims 1 to 3, wherein the step c) of forming the intermediate portion (5) comprises the formation of at least one layer of electrical insulation (24) between the at least a first substrate (1) and the second substrate (2), the electrical insulation layer (24) covering a primary side surface (22) of the at least one first substrate (1) and a secondary side surface (23) the second substrate (2), the at least one first substrate (1) and the second substrate (2) being assembled via the electrical insulation layer (24). 7. The method of claim 6, wherein step c) of forming the intermediate portion (5) comprises: - the deposition of electrical insulation layers (24) respectively on the primary side surface (22) of the at least one first substrate (1) and on the secondary side surface (23) of the second substrate (2), and - the formation of an electrical conduction layer (25) between the electrical insulation layers (24) so in assembling the at least first substrate (1) and the second substrate (2), step f) comprises forming a first metal contact (11) configured to electrically connect the first emitter layer (6) and the electrical conduction layer (25), step g) comprises forming a fourth metal contact (14) configured to electrically connect the base layer (15) and the electrical conduction layer (25), and the formation the electrical connection between the bypass diode (21) and the photovoltaic cell ue (19) according to step h) being carried out via the electrical conduction layer (25). The method of claim 1 to 7, wherein step a) comprises providing a plurality of first substrates (1), step d) comprises forming a first emitter layer (6). and a BSF layer (17) respectively on either side of each of the first substrates (1), step f) comprises the formation of a first metal contact (11) on each of the first emitter layers (6). and forming a second metal contact (13) on each of the BSF layers so as to obtain a plurality of photovoltaic cells (19), the method further comprising a step i) of serially connecting the plurality of cells photovoltaic cells (19) so as to form a photovoltaic cell array (19), and wherein step h) comprises forming an electrical connection for connecting in parallel the bypass diode (21) and the cell network photovoltaic (19). 9. The method of claim 8 combined with claim 7, wherein before step a) is carried out a step k) comprising the steps of: - providing bricks with assembly surfaces, - forming layers of insulation electrical (24) so as to cover the assembly surfaces, - forming an electrical conduction layer (25) between the electrical insulation layers (24) so as to assemble neighboring bricks according to an assembly plane and to form at least one assembly, - subjecting the assembly to a heat treatment, and - cutting the at least one assembly in a plane perpendicular to the assembly plane, the at least one cut assembly forming the plurality of first substrates (1) and the second substrate (2) connected to a first adjacent substrate via an electrical conduction layer (25), wherein step i) comprises forming an electrical connection for connecting the photocells in series. ovoltaic, obtained according to steps d) and f) through an electrical conduction layer (25). Hybrid device for photovoltaic applications, the hybrid device comprising: at least one photovoltaic cell comprising a first substrate, a first emitter layer and a BSF layer (17) disposed respectively on either side of the first substrate; , a first metal contact 11 disposed on the first emitter layer and a second metal contact (13) disposed on the BSF layer (17), - a bypass diode having a second substrate, a second emitter layer (7). ) and a base layer (15) respectively disposed on either side of the second substrate, a third metal contact (8) disposed on the second emitter layer (7) and a fourth metal contact (14) disposed on the base layer (15), - an intermediate portion extending at least partially between the first substrate and the second substrate, the intermediate portion being configured to at least partially isolate and electrically the first substrate and the second substrate, and an electrical connection connecting in parallel the at least one photovoltaic cell and the bypass diode. Hybrid device according to claim 10, wherein the first substrate (1) and the second substrate (2) are formed of a semiconductor material, preferably the semiconductor material is selected from column element alloys. III and V comprising GaN and an element or alloys of elements of columns IV and more preferably, the semiconductor material is silicon and preferably crystalline silicon. 12. Hybrid device according to one of claims 10 to 11, wherein the intermediate portion (5) extends completely between the first substrate and the second substrate, the intermediate portion comprising a first layer of electrical insulation covering a side surface. primary layer of the first substrate, a second electrical insulation layer covering a secondary side surface of the second substrate, and an electrical conduction layer (25) between the first electrical insulation layer and the second electrical insulation layer and assembling the at least one first substrate to the second substrate, and wherein the electrical connection connecting in parallel the at least one photovoltaic cell and the bypass diode is made via the electrical conduction layer (25). 13. Hybrid device according to one of claims 10 to 12, comprising a plurality of photovoltaic cells connected in series and an electrical connection connecting in parallel the bypass diode and the series network of photovoltaic cells.