FR3022675A1 - MEMORY PROTECTION METHOD - Google Patents

Abstract

The present invention relates to a method for reading a piece of data, said data to be read, stored in at least one memory device 1 in the form of at least one piece of data, said stored data item, said at least one memory device 1 being connected to at least one memory controller 2 managing read and write access commands to said at least one memory device 1, said method comprising the following steps implemented by a memory protection module 3, said memory protection module 3 being functionally separated from memory devices 1 and memory controllers 2 and configured to be connected to said at least one memory controller 2: a) obtaining said at least one stored data stored in said at least one memory device 1 and transmitted by said memory device at least one memory controller 2, b) detecting and / or correcting errors from said at least one stored data item obtained, c) determining a corrected data and / or an alert message if said at least one stored data has errors.

Description

TECHNICAL FIELD The invention relates to the field of computer memories and more particularly to a memory protection module configured to detect and / or correct errors among data stored in such memories. STATE OF THE ART Computer systems all have different memories, volatile or otherwise, of different types, such as SDRAM memories ("Synchronous Dynamic Random Access Memory", "Synchronous Dynamic Memory 15 Random Access"), DDR SDRAM (" Dual Data Rate Synchronous Dynamic Random Access Memory "," Dual Data Rate SDRAM "), Flash ... used to store the data needed to run the system. In normal operation, such data are only intentionally modified by write accesses controlled by a master module of the system, such as a processor. However, it may happen that some data in memory is changed randomly, regardless of the operation of the computer system. Such an event can occur in the event of hardware failure of a memory module storing data or in the event of exposure of a memory module to ionizing radiation such as a cosmic ray capable of interacting with a memory cell memory module and modify the value of the data stored in this cell. Such modifications may in particular occur for computer systems operating at high altitude such as aeronautical or space systems.

In the field of consumer computer systems, such changes in the state of the memory are generally ignored and may possibly lead to a malfunction or even a system crash, which is considered acceptable because of the nature of the memory. non-critical of the system. On the contrary, in areas such as aeronautics in which computer systems provide critical functions that can have serious consequences in the event of a malfunction, it is necessary to take into account such events in order to avoid any alteration of the operation of the system. . For this, such systems embody memory protection mechanisms capable of detecting and correcting at least some of these memory errors. The simplest of these mechanisms consist of using a parity bit or a checksum calculation. Some more sophisticated mechanisms use error-correcting codes such as Reed-Solomon codes. The memories protected by such mechanisms are called ECC memories ("Error Correction Coding"). In existing systems, such memory protection mechanisms are implemented in the memory access controller that manages the read and write accesses to the memory. Such an integrated design makes it possible to minimize the physical space occupied by the circuits implementing the memory protection mechanisms and is generally economical. Nevertheless, such a design has the drawback of definitively linking the functions of memory controller and memory protection. It is thus impossible in such devices to choose a memory protection mechanism regardless of the memory used and the technology used by the memory controller. Similarly, it is impossible to change a memory module and its controller without also replacing the circuits implementing the memory protection mechanisms. In addition, in such devices, the memory protection mechanisms only have access to the data accessible by the memory controller and therefore can not take advantage of data stored elsewhere than in memory modules managed by the memory controller. controller.

There is therefore a need for a system for separately implementing data protection functions stored in the system memory and memory controller used to manage accesses to that memory. The present invention thus relates, according to a first aspect, to a method for reading a piece of data, said data item to be read, stored in at least one memory device in the form of at least one piece of data, called a piece of data. stored data, said at least one memory device being connected to at least one memory controller managing read and write access commands to said at least one memory device, said method comprising the following steps implemented by a protection module zo memory module, said memory protection module being functionally separated from the memory devices and memory controllers and configured to be connected to said at least one memory controller: a) obtaining said at least one stored data stored in said at least one memory device and transmitted by said at least one memory controller, b) detection and / or correction of errors to party r of said at least one stored data obtained, c) determination of corrected data and / or of an alert message if said at least one stored data has errors.

Such a method makes it possible to detect and correct the errors affecting the data stored in the at least one memory device independently of their reading by a memory controller, the detection and correction of error being carried out outside the memory device. and the memory controller. The detection and correction of these errors is thus independent of the protocol and the hardware used to perform the reading of the data. According to an advantageous and nonlimiting characteristic, the memory protection module can be connected to a master module 10 capable of controlling read and write accesses to said at least one memory device and step a) of obtaining process data according to the first aspect may comprise prior receipt a0) a read access command to said read data issued by the master module.

This makes it possible to trigger the detection and correction of errors on the fly during the reading process controlled by the master module and to provide corrected data even if the stored data has been corrupted in memory. The step a) of obtaining data of the method according to the first aspect may also comprise previously the transmission al) to the memory controllers of a read access command to the data to be read. This makes it possible to verify that the data have not been altered and possibly to correct them in case of detection of an error, in order to avoid a malfunction of the system resulting from an erroneous data item. In one embodiment of the method according to the first aspect, the step b) of detecting and / or correcting errors may implement error correcting codes such as Hamming codes, Reed codes Solomon, checksums and repetition codes.

Such codes make it possible to detect and correct a maximum number of errors depending on the detection and correction capacity of each code. Their implementation in the memory protection module outside of any memory controller makes this implementation possible regardless of the technology and protocols employed at the memory controllers. In another embodiment of the method according to the first aspect, said data item to be read is redundantly stored in a plurality of separate memory devices, so-called redundant memory devices, and the data acquisition step a) comprises: obtaining stored data stored in each of the redundant memory devices, - the step b) of detecting and / or correcting errors comprises comparing the stored data obtained and the implementation of a majority vote. This makes it possible to detect and correct errors in a simple way. In addition, the number of detectable and correctable errors is greater than in the conventional use of an error correction code, as long as the errors in question do not relate to the same bit of a data item written in error. memory in the majority of memory devices. Furthermore, the error detection step b) may comprise the control of a new read access to said data to be read in the event of detection of an error. This makes it possible to obtain the data to be read without error if the alteration of the data has occurred outside the memory device. According to an advantageous and nonlimiting characteristic: the error detection step b) can comprise the detection of at least one error during a read access to data stored at a memory address of a memory device, called address, and step c) of determining an alert message may include transmitting an alert message to said master module so that the master module controls subsequent write accesses to addresses memory device memories separate from the corrupted memory address. This prevents the system from continuing to write data to a faulty address at which the written data is regularly corrupted. According to a second aspect, the present invention relates to a computer program product comprising code instructions for executing a read method according to the first aspect, when this program is executed by a processor. The present invention relates in a third aspect to a memory protection module configured to detect and / or correct errors among data stored in at least one memory device, said at least one memory device being connected to at least one controller memory device that manages read and write access commands to said at least one memory device, characterized in that it is functionally separate from the memory devices and the memory controllers and is configured to be connected on the one hand to a module master capable of controlling read / write access to said at least one memory device and secondly to said at least one memory controller, and in that it comprises means for implementing the steps of the reading method according to the first aspect.

According to a fourth aspect, the present invention relates to a memory system comprising: at least one memory device configured to store data, at least one memory controller managing read and write access commands to said at least one device memory, at least one memory protection module according to the third aspect.

In one embodiment, the system according to the fourth aspect may comprise a plurality of redundant memory devices configured to store the same data to be read and a single memory controller that manages read access commands to the data stored in each of the devices. redundant memories, said memory controller being configured to transmit the data stored in each of the redundant devices to the memory protection module. Such an architecture makes it possible to simplify the system, in particular by reducing the number of chips and communication buses between the memory protection module and the memory controller. In addition, the implementation of the memory protection module in such a system is more easily adaptable to an increase in the number of memory devices since the memory protection module is still in communication with a memory controller.

In another embodiment, the system according to the fourth aspect may comprise a plurality of redundant memory devices configured to store the same data to be read and a plurality of memory controllers, each memory controller being associated with a redundant memory device, managing commands of memory. read access to the data stored in the associated redundant memory device and being configured to transmit the data stored in the associated redundant memory device to the memory protection module. This simplifies the operating logic of each controller that only manages a single memory device. In addition, such a system is less susceptible to a possible failure of a memory controller. In addition, such computer program products, memory protection module and memory system have the same advantages as those mentioned for the method according to the first aspect.

Other features and advantages will become apparent upon reading the following description of an embodiment. This description will be given with reference to the accompanying drawings in which: - Figure 1 schematically illustrates hardware means in a memory system according to a first embodiment of the invention; FIG. 2 diagrammatically illustrates a memory protection module according to one embodiment of the invention; FIG. 3 schematically illustrates hardware means in a memory system according to a second embodiment of the invention; FIG. 4 schematically illustrates hardware means in a system according to a third embodiment of the invention; FIG. 5 is a diagram schematizing a reading method according to an embodiment of the invention. DETAILED DESCRIPTION An implementation of the invention shown in FIG. 1 relates to a method of reading a piece of data, said data item to be read, stored in at least one memory device 1 in the form of at least one piece of data, called data. stored. Said at least one memory device 1 25 is connected to at least one memory controller 2 managing read and write access commands to said at least one memory device 1. Such a memory device 1 can be a volatile memory module such as a RAM module of various types of technologies such as SDR SDRAMs ("Single Data Rate Synchronous Dynamic Random Access Memory", "Random Dynamic Synchronous Memory with 9 3022675 Random Access with Single Data Rate") or DDR SDRAM (" Double Data Rate Synchronous Dynamic Random Access Memory "," Dual Data Rate SDRAM "). According to one variant, the memory device 1 may consist of a configuration memory storing configuration data of a memory module such as its latency or the length of its packets ("burst length"). Such a configuration memory can thus be a mode register ("Mode Register") such as those present on the SDRAM memory modules or an EEPROM used as SPD ("Serial Presence Detect") on such SDRAM modules. The memory controller 2 may consist of a controller compatible with any type of protocol for managing read and write access to the memory device 1, such as a Serial Advanced Technology Attachment (SATA), USB ( "Universal 15 Serial Bus"), PATA ("Parallel ATA"), SDR SDRAM, DDR1, DDR2, DDR3, SD ("Secure Digital"), CF ("Compact Flash"), MMC ("MultiMedia Card") or MS ("Memory Stick"). This method differs from known methods in that the memory protection mechanism is implemented at a memory protection module 3 functionally separated from the memory devices 1 and the memory controllers 2. The memory protection module can be integrated in the same chip as the memory controllers 2 and separated functionally or integrated into a separate physical box.

This memory protection module is furthermore configured to be connected on the one hand to a master module 4 and on the other hand to at least one memory controller 2. The master module 4 may consist of any type of memory module. data processing means capable of requesting read or write access to the data stored in the memory devices 3022675 1. It can thus be a central processor CPU, a coprocessor or a DMA controller ("Direct Memory Access"). In order to be able to implement memory protection mechanisms, the memory protection module 3 can comprise, as represented in FIG. 2, an encoder 5 configured to process, according to the implemented memory protection mechanisms, the data whose writing has been In addition, the memory protection module 3 may comprise a decoder / voter 6 configured to process, according to the implemented memory protection mechanisms, the data read in the memory devices 1. The memory protection module 3 may also comprise a buffer 7 intended to temporarily store the data read in the memory devices 1. Finally, the memory protection module 3 comprises two interfaces 8a and 8b enabling it to communicate with the master module 4 and with the at least one memory controller 2 via a communication bus. The reading method can be implemented in a memory system shown in FIG. 1 and comprising in a first embodiment: such a memory device 1 configured to store data; such a memory controller 2 managing read and write access commands to said memory device 1; Such a memory protection module 3. The reading method can also be implemented in a memory system represented in FIG. 3 and comprising, in a second embodiment, several distinct memory devices 1 a, 1 b, 1 c. for redundantly storing the same data, said redundant memory devices. In a first variant represented in FIG. 3, the system according to the second embodiment may comprise a single memory controller 2 managing read access commands to the data stored in each of the redundant memory devices 1a, 1 b, lc. In a second variant shown in FIG. 4, the system according to the second embodiment may comprise a memory controller 5a, 2b, 2c associated with each redundant memory device 1a, 1b, 1c. During a command to read or write data in one or more memory devices, the memory protection module 3 transmits said command: to each of the memory controllers if the system comprises several memory controllers as represented in FIG. 4; to the single memory controller as many times as the system has memory devices, in the case of the systems represented in FIG. 1 and FIG.

To enable the protection of the data stored in at least one memory device 1 of such a system, said memory protection module 3 implements the following steps: a) obtaining said at least one stored data stored in said at least one a memory device 1 and transmitted by said at least one memory controller 2, b) detecting and / or correcting errors from said at least one stored data item, c) determining a corrected data item and / or an alert message if said at least one stored data has errors.

More specifically, an embodiment of a method for reading a given data item to be read stored in at least one memory device 1 in the form of at least one data item said data stored is described below in reference to Figure 5.

In a preliminary step a0), the master module 4 transmits a read access command to said read data stored as 3022675 of a data stored in said at least one memory device 1. This command is received by the memory protection module 3 placed between the master module 4 and the memory controller 2. The memory protection module 3 then transmits to the memory controller 2 or to each of the memory controllers 2a, 2b, 2c a control of the memory module 2. read access to said at least one corresponding stored data item. In addition, during a preliminary step al), the memory protection module 3 can also be configured to cyclically transmit to the at least one memory controller 2 an access control 10 for reading a data item to be read. . Said data to be read may for example be a configuration data stored in at least one configuration memory. In a first step a), the memory protection module 3 obtains the stored data stored in said at least one memory device 1 and transmitted by said at least one memory controller 2 in response to the access control. read sent previously. In the case of a memory system according to the first embodiment and as shown in FIG. 1, the memory protection module 3 obtains the stored data item stored in the memory device 1 and transmitted by the memory controller 2. In FIG. the case of a memory system according to the second embodiment and as represented in FIG. 3 and in FIG. 4, the memory protection module 3 obtains the stored data stored in each of the redundant memory devices 1 a, 1 b, lc. If the system comprises a single memory controller 2, said memory controller is configured to obtain and transmit the stored data stored in each of the redundant devices 1a, 1b, 1c to the memory protection module 3.

If the system comprises a plurality of memory controllers 2a, 2b, 2c each associated with a redundant memory device, each memory controller is configured to obtain and transmit to the memory protection module 3 the stored data stored in the redundant memory device. associated with it. In a second step b), the memory protection module 53 detects or corrects errors from said stored data obtained. In a first mode of implementation, the data stored in the memory devices can be coded data when they are written in memory by means of an error correction code by the encoder 5 of the memory protection module. 3. These error correcting codes may be Hamming codes, Reed Solomon codes, checksums, repetition codes or any other error correction code. The stored data obtained by the memory protection module 3 is then transmitted to the decoder 6 of the memory protection module 3 which corrects or detects any errors. In the case where the decoder corrects an error in the data obtained, the corrected data can be rewritten in memory at the memory address of the data read. The data presenting an error is thus replaced in memory by the corresponding corrected data. In a second embodiment, in the case of a memory system according to the second embodiment and as shown in FIG. 3 and FIG. 4, after having obtained the stored data stored in each of the redundant memory devices, 25 the memory protection module 3 compares the obtained data read in the different memory devices 1a, 1b, 1c in order to detect a possible error if the said data are not all identical. The memory protection module 3 makes a majority vote to determine the majority data among the stored data read in the memory devices. This data is in fact the one whose probability of corresponding to the data to be read whose reading has been ordered is the highest. As an example of the second embodiment, the system according to the invention may comprise three memory devices 1 a, 1 b, 1 c 5 as shown in FIG. 3 and FIG. 4. Suppose that the data 0x0100 has been written in each of the memory devices but an alteration of the memory device 1b has occurred, changing the stored data to 0x0000. The memory protection module 3 is capable of following a request to read said data to determine the presence of an error since the stored data stored in the memory devices 1a, 1b and 1c are not identical. The majority vote allows the memory protection module 3 to correct this error by determining that the majority data is 0x0100, which actually corresponds to the data to be read.

According to a variant, the majority vote can be made bit by bit in order to determine the majority value of each bit of the stored data read in the memory devices. By way of example, suppose that the data 0x0100 has been written in each of the memory devices but that an alteration of the memory device 1b has occurred, changing the data stored in 0x0111, and an alteration of the memory device 1c. either intervened, changing the stored data to 0x1000. Making a majority vote for each bit of the data enables the memory protection device 3 to correct all these alterations by determining that the most likely value of the data item to be read is 0x0100. The first and second modes of implementation can be combined to achieve a majority vote after an attempt to correct error by an error correction code, in the case of a system comprising several redundant memory devices.

Upon detection of an error, the memory protection module may control a new read access to said data in said at least one memory device. The data having an error from the first reading can be temporarily stored in the buffer memory 7 while waiting to obtain the result of this new read command. This can be of interest especially when the memory protection module 3 detects errors but can not correct them, for example when the error correction code implemented by the memory protection module does not make it possible to correct such numbers. errors. In the event that the alteration of the data has occurred outside the memory device 1, for example when it is transferred to a communication bus, such a second reading may enable the memory protection module 3 to obtain anyway the data to be read if the alteration does not reproduce at the second reading. Storage of the data from the first reading can make it possible to perform a fault diagnosis compared to the data obtained during a new reading. In a third step c) occurring following the detection of an error in the previous step b), the memory protection module 3 determines a corrected data item and / or an alert message. If the memory protection module 3 has corrected an error, the corrected data item i.e. the data decoded by the decoder 6 or the majority data determined at the time of the majority vote is retained as corrected data. An alert message can also be generated. If the memory protection module 3 has only detected an error, without being able to correct it, an alert message can be generated.

Such an alert message can provide information as to the error that has been detected or corrected, such as the address or range of address at which the error occurred, a processing date, configuration information of the affected memory device ... Such information can then be used by the system to analyze the state of the memory and to diagnose possible hardware failures.

In the case where the master module 4 has transmitted a read access command to said data to be read during the preliminary step a0), the corrected data retained and / or the generated alert message are transmitted to the module. master 4.

In the case where the memory protection module 3 has transmitted during a preliminary step al) a read access command to a data item to be read in a memory, for example a configuration data item stored in a configuration memory , the memory protection module 3 can control a writing of any corrected data retained in said at least one memory. The generated alert message can also be transmitted to the master module 4. In an optional variant, when the memory protection module 3 detects a recurring error when read access to data stored at a memory address of a memory device 1, said corrupt address, it transmits an alert message to the master module 4 so that the master module 4 controls subsequent write access to memory addresses of the memory device 1 separate from the corrupted memory address. The system thus avoids continuing to store data at corrupted memory addresses on which the data are regularly corrupted, following a hardware failure of a memory device for example. An error may be considered recurrent when the number of consecutive reads of the same memory box or memory block providing erroneous data exceeds a predetermined threshold. Such a method and system thus makes it possible to detect and correct some of the errors affecting one or more storage devices, without this detection and correction being functionally dependent on the memory controllers employed. This makes it possible to implement these memory protection mechanisms independently of the function used for the controllers and to adapt these mechanisms more easily to different memory architectures. 18

Claims (13)

REVENDICATIONS1. A method of reading a data item, said data item to be read, stored in at least one memory device (1) in the form of at least one piece of data, said stored data item, said at least one memory device (1) being connected to at least one memory controller (2) managing read and write access commands to said at least one memory device (1), said method comprising the following steps implemented by a memory protection module (3), said memory protection module (3) being functionally separated from memory devices (1) and memory controllers (2) and configured to be connected to said at least one memory controller (2): a) obtaining said at least one memory controller (2); stored data stored in said at least one memory device (1) and transmitted by said at least one memory controller (2); b) detecting and / or correcting errors from said at least one stored data obtained, c) determining a corrected data item and / or an alert message if said at least one piece of stored data has errors . 2. A method of reading a data according to claim 1, wherein the memory protection module (3) is connected to a master module (4) capable of controlling access reads and writes to said at least one memory device (1) and wherein the step a) of obtaining data comprises previously receiving a0) a read access command to said data to be read transmitted by the master module (4). 30 3. The method of reading a data item according to one of the preceding claims, wherein the step a) of obtaining data comprises previously transmitting al) to the memory controllers (2) of a command of read access to the data to be read. 4. Reading method according to one of the preceding claims, wherein the step b) of detecting and / or correcting errors implements error correcting codes. 5. Reading method according to the preceding claim, wherein the error correction codes are among Hamming codes, Reed Solomon codes, checksums and repetition codes. 6. A method of reading a data according to one of the preceding claims, said data to be read being stored redundantly in several separate memory devices (1a, 1b, 1c), said redundant memory devices, wherein: the step a) of obtaining data comprises obtaining the stored data stored in each of the redundant memory devices (1a, 1b, 1c), - the step b) of detecting and / or correcting errors includes the 20 comparison of the stored data obtained and the implementation of a majority vote. 7. Reading method according to one of claims 2 to 6, wherein the step b) of error detection comprises the control of a new read access to said data to be read in case of detection of a error. 8. Reading method according to one of claims 2 to 7, wherein: the step b) of error detection comprises the detection of at least one error during a read access to data stored at a time. address 30 memory of a memory device (1), said corrupted address, 3022675 and step c) of determining an alert message comprises transmitting an alert message to said master module (4) of so that the master module (4) controls subsequent write accesses to memory addresses of the memory device (1) separate from the corrupted memory address. A computer program product comprising code instructions for performing a read method according to any one of the preceding claims, when this program is executed by a processor. 10. Memory protection module (3) configured to detect and / or correct errors among data stored in at least one memory device (1), said at least one memory device (1) being connected to at least one controller memory device (2) managing read and write access commands to said at least one memory device (1), characterized in that it is functionally separated from the memory devices (1) and the memory controllers (2) and is configured to be connected on the one hand to a master module (4) capable of controlling read and write accesses to said at least one memory device (1) and, on the other hand, to said at least one memory controller (2), and in that it comprises means for carrying out the steps of the reading method according to any of claims 1 to 8. 11. Memory system comprising: at least one memory device (1) configured to store data, at least one memory controller (2) managing read and write access commands to said at least one memory device (1) At least one memory protection module (3) according to claim 10. 21 3022675 The system of claim 11, comprising a plurality of redundant memory devices (1a, 1b, 1c) configured to store the same data to be read and a single memory controller (2) handling read access commands to the data. stored in each of the redundant memory devices (I a, 1b, 1c), said memory controller (2) being configured to transmit the data stored in each of the redundant devices (1a, 1b, 1c) to the memory protection module (3). The system of claim 11, comprising a plurality of redundant memory devices (1a, 1b, 1c) configured to store the same data to be read and a plurality of memory controllers (2a, 2b, 2c), each memory controller (2a, 2b). , 2c) being associated with a redundant memory device (1a, 1b, 1c), managing read access commands to the data stored in the associated redundant memory device and being configured to transmit to the memory protection module (3 ) the data stored in the associated redundant memory device.