FR3017012B1 - Dispositif d'element sequentiel a balayage - Google Patents

Dispositif d'element sequentiel a balayage

Info

Publication number
FR3017012B1
FR3017012B1 FR1450725A FR1450725A FR3017012B1 FR 3017012 B1 FR3017012 B1 FR 3017012B1 FR 1450725 A FR1450725 A FR 1450725A FR 1450725 A FR1450725 A FR 1450725A FR 3017012 B1 FR3017012 B1 FR 3017012B1
Authority
FR
France
Prior art keywords
element device
sequential element
scanning sequential
scanning
sequential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1450725A
Other languages
English (en)
Other versions
FR3017012A1 (fr
Inventor
Valentin Gherman
Samuel Evain
Sebastien Sarrazin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1450725A priority Critical patent/FR3017012B1/fr
Priority to EP15701529.8A priority patent/EP3100354A1/fr
Priority to US15/112,975 priority patent/US20160336925A1/en
Priority to PCT/EP2015/051625 priority patent/WO2015113977A1/fr
Publication of FR3017012A1 publication Critical patent/FR3017012A1/fr
Application granted granted Critical
Publication of FR3017012B1 publication Critical patent/FR3017012B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3562—Bistable circuits of the master-slave type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Tests Of Electronic Circuits (AREA)
FR1450725A 2014-01-30 2014-01-30 Dispositif d'element sequentiel a balayage Expired - Fee Related FR3017012B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1450725A FR3017012B1 (fr) 2014-01-30 2014-01-30 Dispositif d'element sequentiel a balayage
EP15701529.8A EP3100354A1 (fr) 2014-01-30 2015-01-27 Dispositif d'element sequentiel a balayage
US15/112,975 US20160336925A1 (en) 2014-01-30 2015-01-27 Scan sequential element device
PCT/EP2015/051625 WO2015113977A1 (fr) 2014-01-30 2015-01-27 Dispositif d'element sequentiel a balayage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1450725A FR3017012B1 (fr) 2014-01-30 2014-01-30 Dispositif d'element sequentiel a balayage

Publications (2)

Publication Number Publication Date
FR3017012A1 FR3017012A1 (fr) 2015-07-31
FR3017012B1 true FR3017012B1 (fr) 2016-01-22

Family

ID=50976778

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1450725A Expired - Fee Related FR3017012B1 (fr) 2014-01-30 2014-01-30 Dispositif d'element sequentiel a balayage

Country Status (4)

Country Link
US (1) US20160336925A1 (fr)
EP (1) EP3100354A1 (fr)
FR (1) FR3017012B1 (fr)
WO (1) WO2015113977A1 (fr)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4580137A (en) * 1983-08-29 1986-04-01 International Business Machines Corporation LSSD-testable D-type edge-trigger-operable latch with overriding set/reset asynchronous control
US7246287B1 (en) * 2002-04-04 2007-07-17 Mips Technologies, Inc. Full scan solution for latched-based design
KR100446303B1 (ko) * 2002-07-31 2004-08-30 삼성전자주식회사 Ｍｔｃｍｏｓ용 클럭드 스캔 플립플롭
US8493119B2 (en) * 2010-12-13 2013-07-23 Apple Inc. Scannable flip-flop with hold time improvements
FR2990764B1 (fr) * 2012-05-21 2015-12-11 Commissariat Energie Atomique Dispositif de test et de monitoring de circuits numeriques

Also Published As

Publication number Publication date
FR3017012A1 (fr) 2015-07-31
EP3100354A1 (fr) 2016-12-07
US20160336925A1 (en) 2016-11-17
WO2015113977A1 (fr) 2015-08-06

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Legal Events

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Year of fee payment: 2

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Year of fee payment: 3

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Year of fee payment: 4

ST Notification of lapse

Effective date: 20180928