FR2987958B1 - Circuit asynchrone insensible aux delais - Google Patents

Circuit asynchrone insensible aux delais

Info

Publication number
FR2987958B1
FR2987958B1 FR1200670A FR1200670A FR2987958B1 FR 2987958 B1 FR2987958 B1 FR 2987958B1 FR 1200670 A FR1200670 A FR 1200670A FR 1200670 A FR1200670 A FR 1200670A FR 2987958 B1 FR2987958 B1 FR 2987958B1
Authority
FR
France
Prior art keywords
delay
asynchronous circuit
asynchronous
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1200670A
Other languages
English (en)
Other versions
FR2987958A1 (fr
Inventor
Marc Renaudin
Van Mau David Nguyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TIEMPO
Original Assignee
TIEMPO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TIEMPO filed Critical TIEMPO
Priority to FR1200670A priority Critical patent/FR2987958B1/fr
Priority to US13/785,770 priority patent/US8854075B2/en
Priority to EP13354010.4A priority patent/EP2637310B1/fr
Publication of FR2987958A1 publication Critical patent/FR2987958A1/fr
Application granted granted Critical
Publication of FR2987958B1 publication Critical patent/FR2987958B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
FR1200670A 2012-03-06 2012-03-06 Circuit asynchrone insensible aux delais Expired - Fee Related FR2987958B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1200670A FR2987958B1 (fr) 2012-03-06 2012-03-06 Circuit asynchrone insensible aux delais
US13/785,770 US8854075B2 (en) 2012-03-06 2013-03-05 Delay-insensitive asynchronous circuit
EP13354010.4A EP2637310B1 (fr) 2012-03-06 2013-03-06 Circuit asynchrone insensible aux délais

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1200670A FR2987958B1 (fr) 2012-03-06 2012-03-06 Circuit asynchrone insensible aux delais

Publications (2)

Publication Number Publication Date
FR2987958A1 FR2987958A1 (fr) 2013-09-13
FR2987958B1 true FR2987958B1 (fr) 2014-03-21

Family

ID=47019034

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1200670A Expired - Fee Related FR2987958B1 (fr) 2012-03-06 2012-03-06 Circuit asynchrone insensible aux delais

Country Status (1)

Country Link
FR (1) FR2987958B1 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4845633A (en) * 1985-12-02 1989-07-04 Apple Computer Inc. System for programming graphically a programmable, asynchronous logic cell and array
JP3521349B2 (ja) * 2000-11-27 2004-04-19 日本電信電話株式会社 ハンドシェーク逐次化回路、ハンドシェーク繰り返し装置、逐次データ生成装置、及びハンドシェーク方法
JP3488224B2 (ja) * 2001-11-16 2004-01-19 沖電気工業株式会社 遷移信号制御装置とそれを用いたｄｍａコントローラ及び遷移信号制御プロセッサ

Also Published As

Publication number Publication date
FR2987958A1 (fr) 2013-09-13

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Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 4

ST Notification of lapse

Effective date: 20161130

GC Lien (pledge) constituted

Effective date: 20240103