FR2967274B1 - METHOD FOR DETERMINING A "LEADER" EQUIPMENT IN AN ASYNCHRONOUS ENVIRONMENT COMPRISING A PLURALITY OF ELECTRONIC EQUIPMENT - Google Patents
METHOD FOR DETERMINING A "LEADER" EQUIPMENT IN AN ASYNCHRONOUS ENVIRONMENT COMPRISING A PLURALITY OF ELECTRONIC EQUIPMENTInfo
- Publication number
- FR2967274B1 FR2967274B1 FR1004348A FR1004348A FR2967274B1 FR 2967274 B1 FR2967274 B1 FR 2967274B1 FR 1004348 A FR1004348 A FR 1004348A FR 1004348 A FR1004348 A FR 1004348A FR 2967274 B1 FR2967274 B1 FR 2967274B1
- Authority
- FR
- France
- Prior art keywords
- equipment
- leader
- main
- items
- displays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000008520 organization Effects 0.000 abstract 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2023—Failover techniques
- G06F11/2028—Failover techniques eliminating a faulty processor or activating a spare
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2035—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant without idle spare hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2048—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share neither address space nor persistent storage
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer And Data Communications (AREA)
- Hardware Redundancy (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Small-Scale Networks (AREA)
Abstract
Le domaine général de l'invention concerne les procédé de sécurisation aux pannes d'un système électronique comportant une pluralité d'équipements reliés entre eux par un réseau de communication asynchrone, ledit système comportant au moins un équipement dit « leader principal», ledit « leader principal » assurant l'organisation des tâches effectuées par les autres équipements. Dans le procédé selon l'invention, chaque équipement possède une liste prédéterminée de « leaders de remplacement », le « leader de remplacement » étant activé en cas de panne du « leader principal ». Le procédé selon l'invention s'applique tout particulièrement aux systèmes de visualisations des cockpits d'aéronef ; les équipements sont alors des calculateurs de bord et/ou des afficheurs ou « Display Unit », le ou les « leaders » ont pour tâches principales d'assurer le respect des règles de gestion des différentes configurations/reconfigurations d'affichage sur les afficheurs.The general field of the invention relates to methods for securing against failures of an electronic system comprising a plurality of items of equipment interconnected by an asynchronous communication network, said system comprising at least one item of equipment called “main leader”, said “ principal leader ”ensuring the organization of the tasks carried out by the other equipment. In the method according to the invention, each item of equipment has a predetermined list of “replacement leaders”, the “replacement leader” being activated in the event of failure of the “main leader”. The method according to the invention applies most particularly to systems for viewing aircraft cockpits; the items of equipment are then on-board computers and / or displays or "Display Units", the main task of the "leader" is to ensure compliance with the management rules for the various display configurations / reconfigurations on the displays.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1004348A FR2967274B1 (en) | 2010-11-05 | 2010-11-05 | METHOD FOR DETERMINING A "LEADER" EQUIPMENT IN AN ASYNCHRONOUS ENVIRONMENT COMPRISING A PLURALITY OF ELECTRONIC EQUIPMENT |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1004348A FR2967274B1 (en) | 2010-11-05 | 2010-11-05 | METHOD FOR DETERMINING A "LEADER" EQUIPMENT IN AN ASYNCHRONOUS ENVIRONMENT COMPRISING A PLURALITY OF ELECTRONIC EQUIPMENT |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2967274A1 FR2967274A1 (en) | 2012-05-11 |
FR2967274B1 true FR2967274B1 (en) | 2012-12-07 |
Family
ID=43734835
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1004348A Active FR2967274B1 (en) | 2010-11-05 | 2010-11-05 | METHOD FOR DETERMINING A "LEADER" EQUIPMENT IN AN ASYNCHRONOUS ENVIRONMENT COMPRISING A PLURALITY OF ELECTRONIC EQUIPMENT |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2967274B1 (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6112140A (en) * | 1996-05-14 | 2000-08-29 | The Boeing Company | Flight management system providing for automatic control display unit backup utilizing structured data routing |
US7158985B1 (en) * | 2003-04-09 | 2007-01-02 | Cisco Technology, Inc. | Method and apparatus for efficient propagation of large datasets under failure conditions |
FR2882165B1 (en) * | 2005-02-11 | 2007-06-29 | Airbus France Sas | SYSTEM AND METHOD FOR ONBOARD FLIGHT TEST PROCESSING |
EP2100223B1 (en) * | 2006-12-05 | 2011-01-19 | QUALCOMM Incorporated | Apparatus and methods of a zero single point of failure load balancer |
-
2010
- 2010-11-05 FR FR1004348A patent/FR2967274B1/en active Active
Also Published As
Publication number | Publication date |
---|---|
FR2967274A1 (en) | 2012-05-11 |
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