FR2966952B1 - Procédé de fabrication d'un circuit intégré comportant un bloc analogique et un bloc numérique, et circuit intégré correspondant - Google Patents

Procédé de fabrication d'un circuit intégré comportant un bloc analogique et un bloc numérique, et circuit intégré correspondant

Info

Publication number
FR2966952B1
FR2966952B1 FR1059054A FR1059054A FR2966952B1 FR 2966952 B1 FR2966952 B1 FR 2966952B1 FR 1059054 A FR1059054 A FR 1059054A FR 1059054 A FR1059054 A FR 1059054A FR 2966952 B1 FR2966952 B1 FR 2966952B1
Authority
FR
France
Prior art keywords
integrated circuit
block
manufacturing
analogue
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1059054A
Other languages
English (en)
Other versions
FR2966952A1 (fr
Inventor
Guilhem Bouton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1059054A priority Critical patent/FR2966952B1/fr
Priority to US13/287,347 priority patent/US8914756B2/en
Publication of FR2966952A1 publication Critical patent/FR2966952A1/fr
Application granted granted Critical
Publication of FR2966952B1 publication Critical patent/FR2966952B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
FR1059054A 2010-11-03 2010-11-03 Procédé de fabrication d'un circuit intégré comportant un bloc analogique et un bloc numérique, et circuit intégré correspondant Expired - Fee Related FR2966952B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1059054A FR2966952B1 (fr) 2010-11-03 2010-11-03 Procédé de fabrication d'un circuit intégré comportant un bloc analogique et un bloc numérique, et circuit intégré correspondant
US13/287,347 US8914756B2 (en) 2010-11-03 2011-11-02 Process for fabricating an integrated circuit comprising an analog block and a digital block, and corresponding integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1059054A FR2966952B1 (fr) 2010-11-03 2010-11-03 Procédé de fabrication d'un circuit intégré comportant un bloc analogique et un bloc numérique, et circuit intégré correspondant

Publications (2)

Publication Number Publication Date
FR2966952A1 FR2966952A1 (fr) 2012-05-04
FR2966952B1 true FR2966952B1 (fr) 2012-11-16

Family

ID=44065554

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1059054A Expired - Fee Related FR2966952B1 (fr) 2010-11-03 2010-11-03 Procédé de fabrication d'un circuit intégré comportant un bloc analogique et un bloc numérique, et circuit intégré correspondant

Country Status (2)

Country Link
US (1) US8914756B2 (fr)
FR (1) FR2966952B1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6834380B2 (en) * 2000-08-03 2004-12-21 Qualcomm, Incorporated Automated EMC-driven layout and floor planning of electronic devices and systems
US7984408B2 (en) * 2006-04-21 2011-07-19 International Business Machines Corporation Structures incorporating semiconductor device structures with reduced junction capacitance and drain induced barrier lowering
US8516410B2 (en) * 2008-12-30 2013-08-20 International Business Machines Corporation Method of migrating electronic devices operating in current mode to a target technology
US8039384B2 (en) * 2010-03-09 2011-10-18 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset bond on trace interconnects on different height traces
US8409978B2 (en) * 2010-06-24 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset bond on trace interconnect structure on leadframe
US8492197B2 (en) * 2010-08-17 2013-07-23 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate

Also Published As

Publication number Publication date
US8914756B2 (en) 2014-12-16
FR2966952A1 (fr) 2012-05-04
US20120104632A1 (en) 2012-05-03

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20150731