FR2950754A1 - Correct circuit for boost switching supply power converter powering LCD in e.g. TV, has resistor that is in series connection with capacitor, where values of capacitor and another resistor are chosen based on expected variations of load - Google Patents

Abstract

The circuit has a transconductance amplifier (41) measuring difference between the information proportional to an output voltage (Vout) furnished by a set-up switching supply power converter and reference level (Vref). A resistor (R0) is provided between an output of the amplifier and a reference potential application terminal. The resistor is connected in parallel with a capacitor (C0) and in series connection with another capacitor (Ce), where the values of the latter capacitor and another resistor (Re) are chosen based on expected variations of load supplied by the converter.

Description

B9517 - 08-T0-355 1 DIMENSIONING OF A CONTROL CIRCUIT OF A CUTTING POWER SUPPLY

Field of the Invention The present invention generally relates to electronic circuits and, more particularly, to power converters or switching power supplies. The invention relates more precisely to the dimensioning of the components of the control circuits of such converters. The invention applies more particularly to step-up converters for supplying liquid crystal displays.

BACKGROUND OF THE PRIOR ART The power supply of a liquid crystal type flat screen requires the use of a DC-DC converter of the voltage booster type. Such a converter has the role of providing the energy required by the liquid crystal cell panel for display. The converter comprises a control circuit or servo (also called corrector) of the output voltage to a set value. Such a circuit takes information on the output voltage of the power converter and provides a control signal to the switching switch. DC-DC power converters are based on high-power cutting B9517 - 08-T0-355

2 frequency (of the order of one hundred kilohertz) of a continuous supply voltage. The sizing of the components of the corrector circuit conditions the accuracy of the regulation. In particular, in the application to liquid crystal displays (for example equipped with laptops, monitors or televisions), the connected load output is likely to vary significantly (depending on the characteristics of the image to display ). This load variation causes a variation of the output voltage which, if not corrected sufficiently quickly, causes a distortion of the display. It is therefore generally sought to increase the open loop cutoff frequency of the converter so as to accelerate the taking into account and correction of a variation of the output voltage. However, the faster the system response, the more likely it is to become unstable. The design of the control circuit components is made, at design time, according to the characteristics of the load (of the display panel). It would be desirable to be able to optimize the sizing of the components of a correction circuit for a switching converter. Summary An object of the present invention is to overcome all or part of the disadvantages of the usual dimensioning methods of the components of a corrector circuit for a power converter. Another object of an embodiment is a solution more particularly adapted to liquid crystal displays. Another object of another embodiment of the present invention is to seek a maximum open loop cutoff frequency while preserving the stability of the system.

B9517 - 08-T0-355

In order to achieve all or some of these and other objects, the present invention provides a method of dimensioning a correction circuit of a voltage-boosting power supply type power converter, comprising: a transconductance amplifier measuring a difference between an information proportional to an output voltage supplied by the converter and a reference level, this information being taken at the mid-point of a resistive divider bridge across which said output voltage is applied; a comparator of said deviation to a voltage ramp of the same frequency as the switching frequency; a flip-flop triggered by a signal at the switching frequency and reset by a change of state of the output of said comparator, said flip-flop providing a control signal of the converter switch; and between the output of the amplifier and an application terminal of a reference potential, a first resistor in parallel with a first capacitor and with a series association of a second capacitor with a second resistor, wherein the value of the first resistor is chosen as a function of the desired static error for the output voltage; the value of the first capacitor is chosen according to the desired cutoff frequency; and the values of the second resistor and the second capacitor are chosen according to the expected variations of a load supplied by the converter. According to an embodiment of the present invention, the values of the first and second resistors and the first and second capacitors are determined from the system of equations: B9517 - 08-T0-355 Vin = Vout. (1-i) , Vaut = 11 (1 û cc), R gm ~ Vref ù Rl Vout = VCe Rl + R2 RO VCe aVp Vin • a2 • Ts (1ù a) 2 • Ts • (Go to Vin) IL = ù ù RdsON RdsON 2 .L 2.L where.

R represents the nominal resistance of the load for which the converter is intended;

L represents the value of an inductor of the converter;

Vin represents the supply voltage of the converter;

RDSON represents the drain-source resistor in the on state of a chopper;

gm represents the transconductance of the amplifier; a represents the duty cycle;

Ts represents the cutting period;

IL represents the current in the inductive element; and 4 VCe capacitor.represente the voltage across the second There is also provided a switching converter sized by the implementation of the method above. BRIEF DESCRIPTION OF THE DRAWINGS These and other objects, features, and advantages will be set forth in detail in the following description of particular embodiments in a non-limitative manner with reference to the accompanying figures in which: FIG. very schematic of a screen of the type to which the present invention applies by way of example; FIG. 2 represents the electrical diagram of a switching converter equipped with a correction circuit according to one embodiment of the present invention; B9517 - 08-T0-355

FIG. 3 illustrates an example of the appearance of the output voltage over time; FIG. 4 illustrates in the form of blocks an exemplary implementation of the method of dimensioning the components 5 according to the invention; and FIG. 5 is an example of a Nyquist diagram obtained by implementing an embodiment of the present invention. Detailed Description The same elements have been designated by the same references in the various figures. For the sake of clarity, only the steps and elements useful for understanding the invention have been shown and will be described. In particular, computational and simulation computing tools making it possible to obtain the information desired for sizing the components have not been detailed, the invention being compatible with the usual simulation tools. Fig. 1 is a simplified block diagram of a liquid crystal display (LCD) of the type to which the present invention is applied by way of example. Such a screen comprises a slab or panel 10 forming a matrix network of liquid crystal cells (not detailed). The display panel 10 is controlled by line 11 and column 12 (line) amplifiers which receive control signals (links 111 and 121) and supply signals (links 113 and 123) of a circuit 13. circuit 13 includes, inter alia, a power converter 2 (DC / DC) whose role is to provide a voltage Vaut line amplifiers and column. The consumption of the screen 10 is highly dependent on the image to be displayed. However, the image changes several times a second. Therefore, the load formed by the panel on the converter 2 varies greatly. This variation requires that the converter be fast in terms of reaction to a variation of the load. Therefore, the control circuit B9517 - 08-T0-355

6 of the converter must be fast, that is to say have a high cutoff frequency. FIG. 2 represents the electrical diagram of an example of a power converter 2, of the boost converter type, generally used in the application of FIG. 1. The invention will be described later in connection with a Single Ended Primary Inductor Converter (SEPIC) but also applies to a coupled inductance converter (Flyback or Forward).

The converter 2 comprises, between terminals 31 and 32 for applying a continuous supply voltage Vin (for example from a battery 33 or an AC-DC transformer connected to the electrical distribution network), a Inductive element 21 in series with a switching switch 22. The switch 22 is often a MOS transistor, but it can also meet bipolar switches. For a boost converter, the midpoint 23 between the inductor 21 and the switch 22 is also connected to the reference terminal 32 of the DC supply (generally the ground) by a freewheeling diode 24 in series with a capacitor 25. The electrodes of the capacitor 25 are connected to output terminals 33 and 34, providing a regulated DC voltage Vout to a load Q (the terminals 32 and 34 are in practice combined). In the example described, the load is constituted by the circuits 11 and 12 supplying the panel. The operation of a step-up switching converter is usual. When the switch 22 is closed, energy is accumulated in the inductive element 21.

This energy is restored to the output capacitor 25 via the freewheeling diode 24 during the opening periods of the switch 22. The switching frequency of the switch 22 defines the switching frequency of the DC voltage Wine. To regulate the voltage Vout, information relating to this voltage is taken for B9517 - 08-T0-355

7 to be treated by a control circuit 4 or correction whose role is to adapt the conduction periods of the switch 22. The circuit 4 has two input terminals 51 and 52 respectively connected to terminals 33 and 34. The circuit 4 comprises elements for comparing the output voltage with respect to a reference level (corresponding to a desired nominal output voltage) and elements for generating a control signal intended for the switch 22. This signal The control circuit is generally a pulse train of fixed frequency whose duty cycle is modified as a function of the desired conduction periods for the switch 22. A transconductance amplifier 41 compares a voltage VB proportional to the voltage Vout to a reference voltage. Vref. The voltage VB is taken at the midpoint 53 of a resistive divider bridge formed of two resistors R2 and R1 in series between the terminals 51 and 52. The voltage VB is applied to the inverting input of the amplifier 41 while the reference voltage Vref, obtained for example by an integrated regulator, is applied to the non-inverting input. A capacitor C2 in series with a resistor Rf connects the terminal 51 to the inverting input 53 of the amplifier 41. The elements C2 and Rf are used for the soft start of the converter by virtually reducing the value of the resistance R2 during starting the converter. The time constant of the RC cell (Rf-C2) is high and therefore does not (or negligibly) interfere with load variations. The output 54 of the amplifier 41 provides information relating to the variation of the voltage Vout (the difference between this voltage and the desired nominal value). This output 54 is connected directly to a non-inverting input of a comparator 42 (in practice, an operational amplifier) responsible for defining the cyclic closing ratio of the switch 22. The output of the comparator 42 is connected to B9517 - 08- T0-355

8 the reset input R of an RS-type flip-flop 45 whose set S input receives a periodic trigger signal or clock signal (block 46, CLOCK) whose frequency sets the switching frequency . The direct output Q of the flip-flop 45 provides the control signal of the switch 22. This signal is applied, generally via an amplifier 48 or, for a transformer converter, via an element galvanic isolation. The inverting input of the comparator 42 receives the result of an addition (block 43) of a sawtooth signal supplied by a ramp generator 44 (RAMP) and the potential of the node 43. The frequency of the ramp generator 44 is identical to the frequency of the clock signal applied to the set terminal S of the flip-flop 45 and each start of the ramp is synchronized with each edge of the clock signal triggering the setting of the flip-flop. The amplitude of the ramp is relatively small and is below the reference level Vref. Its role is to enable the generation of the control pulse train of the switch 22.

At each edge of the clock signal, the output of the flip-flop 45 goes high and causes the switch 22 to open. When the difference in level between the voltage Vaut and the reference voltage exceeds the current value. of the ramp plus the potential of the node 43 (which represents the product of the current in the inductor by the on-state resistance of the switch 22), the output of the comparator 42 switches. This causes resetting of the flip-flop 45 which causes the switch 22 to open. This operation is reproduced at each new switching period. The output signal of the amplifier 41 is filtered to stabilize the closed-loop system. This filter comprises a resistor RO and a capacitor CO in parallel between the output terminal 54 of the amplifier 41 and the ground 52.

B9517 - 08-T0-355

In addition, a resistor Re and a capacitor Ce in series connect the terminal 54 to ground. FIG. 3 is a timing diagram illustrating an example of the appearance of the voltage Vout over three image frames. It is assumed that an intermediate image frame or frame II between two periods I and III requires a larger current than during periods I and III. It follows that at times t1 and t2 switching of the image period, there is a sudden change in the voltage Vout due to a strong current draw at time tl and a sharp decrease in this call at time t2. In static mode (between two image switches), the voltage Vout varies slightly from one frame to another. This variation due to the intrinsic hysteresis of the comparator 42 is small (generally less than 0.1 volts) compared to the nominal voltage Vout (from a few volts to a few tens of volts). The higher the cut-off frequency of the circuit 4, the shorter the time intervals T1 and T2 necessary to recover the level considered nominal, and the faster the image is established. However, the higher this open loop cut-off frequency, the higher the voltage Vout has transient peaks of amplitude AVout high during a load variation. This problem is particularly present in applications where the load is likely to vary abruptly, which is particularly the case of an LCD screen where the energy requirement can vary considerably from one image to another (at the extreme for the transition from a white image to a black image). Sudden variations of the voltage Vout can cause a load-side malfunction, for example variations in brightness of the image. The various components (resistors and capacitors) associated with the corrector 4 have the role of satisfying the desired characteristics for the converter among which an acceptable static precision, a good stability B9517 - 08-T0-355

10 (no closed-loop oscillation) the highest open-loop cut-off frequency and high attenuation at the switching frequency of the switch to avoid disturbing the measurement.

The sizing of these components is performed, using simulation methods, during the design of the power supply circuit according to the screen (the load) for which it is intended. FIG. 4 illustrates, by a simplified flowchart, the successive steps of a method of dimensioning the components of a correction circuit as illustrated in FIG. 2. A first step (block 61, C2, Rf) consists in determining the values to be give the capacitor C2 and the resistor Rf to ensure a correct start of the converter. The values C2 and Rf are determined in the usual way. Then (block 62, R1, R2), the values to be given to the resistors R1 and R2 of the divider bridge to determine the value of the voltage Vout. Knowing the value of the reference voltage Vref used by the circuit 4, the values R1 and R2 are determined from the relation Vout = (R1 + R2 / R1) Vref. Preferably, these values take into account the fact that the consumption of the control circuit must be minimized. Typically, values are chosen such that the current flowing in the resistors R1 and R2 is less than a few hundred microamperes (preferably less than 100 microamperes). Once the values R1, R2, C2 and Rf are set, the values to be given to the resistances RO and Re and the capacitors CO and Ce must be determined. Until now, this dimensioning was carried out by calculating a cut-off frequency for the whole system (converter + screen), by successively applying the following formulas: 2950754 B9517 - 08-T0-355 11 Vin min 2 '• I Oep ù (Wine min ù "Vin min [Ft.L.1,21 Vout ~ frhp z 10 (R1R2 + RfRl + RfR2) Fc 27L Vout 0,7RdsON 0,8C 1,2 R1 • (R2 + Rf) 2 , 2 Vinmin '1.3 gm 10 2.' n.Re • Fco 1.2 1.2 Ioutmax Vout L Vinmin Re C2 = 1.106 • Ce • (R1 + R2) R1 • R2 + Rf • R1 + Rf • R2 where frhpz represents the so-called zero interpolarity frequency, Iocp represents the short-circuit acceptable limit current, Ft represents the switching frequency, L represents the value of the inductance 21, Vinmin represents the minimum supply voltage of the converter. Fc represents the open-loop breaking frequency of the system; RdsON represents the on-state drain-source resistor of the transistor M0S constituting the switch 22; C represents the value of the capacitor 25, gm represents the transconductance of the amplifier 41; and Ioutmax represents the maximum output current (called by the load). The resistance RO is chosen according to the desired static error on the output voltage. A control circuit sized according to the above formulas is not optimal because of the many approximations which have led to these formulas which are deducted from an average over a few switching periods.

According to the embodiment of FIG. 4, once the values of the components R1, R2, Rf and C2 have been set, the

determination of the values to be given to the components RO, CO, Re and Ce is carried out as follows.

We begin by determining (block 63, ROmin) the minimum value to be given to the resistance RO. This value sets the cutoff frequency. This determination amounts to fixing

the acceptable excursion AVout (figure 3) for the voltage Vout.

This ROmin value is chosen to obtain a minimum static error. This equilibrium point is represented by the following equations:

Wine = Vout. (1-a), Vout = Il (1 ù a), R gmVref - RI Vout - \ = VCe Rl + R2 ~ RO VCe aVp Wine • a2 • Ts (1- a) 2 • Ts • (Go - Wine) IL = - - - RONSON RDSON 2.L 2.L where.

R is the nominal resistance of a load for which the converter is intended;

a represents the duty cycle;

gm represents the transconductance of the amplifier 41;

Ts represents the cutting period;

IL represents the current in the inductive element 21; L represents the value of inductance 21;

VCe represents the voltage across the capacitor Ce; and

RdsON represents the on-state resistance of switch 22.

The value a depends on the input and output voltages of the converter. The transconductance gain gm is set by the B9517 - 08-T0-355

The voltage VCe depends on the resolution of the equation system above. Then (block 64, GminFs (C0), Fcmax (C0)), we evaluate the maximum cutoff frequency that can be obtained for a value of the fixed capacitance CO and the static gain GFs minimum GminFs (the maximum attenuation) at the frequency Fs. We try to minimize the static gain. This determination is made by arbitrarily fixing successive CO values (for example 0, 1 picofarad, 2 picofarads, etc.) and plotting the response in the Nyquist plane.Figure 5 illustrates an example of representation in the Niquist plane of the system for arbitrary values In the classical way, if the response curve n for a cut-off frequency from 0 to infinity leaves the critical point (-1, 0) on its left, the system is stable. determines a minimum radius rmin representing the critical distance from the point (-1, 0) and plots the curves by simulation for different values The determination method then consists in studying the influence of a variation of the load Q (block 65) to ensure that the voltage variation Vaut is acceptable The use of simulation methods and the study of open-loop and closed-loop systems is in itself known and will not be more The m The embodiment of the invention is within the abilities of those skilled in the art from the functional indications given above.

Claims (3)

REVENDICATIONS1. A correction circuit for a voltage-boosting power supply type power converter, comprising: a transconductance amplifier (41) measuring a difference between an information proportional to an output voltage (Vout) provided by the converter and a reference level (Vref); a comparator (42) of said deviation to a voltage ramp of the same frequency as the switching frequency (Fs); a flip-flop (45) triggered by a signal at the switching frequency and reset by a change of state of the output of said comparator, said flip-flop providing a control signal of the converter switch; and between the output of the amplifier and an application terminal of a reference potential, a first resistor (RO) in parallel with a first capacitor (CO) and with a series connection of a second capacitor (Ce) with a second resistor (Re), wherein: the value of the first resistor is chosen according to the desired static error for the output voltage; the value of the first capacitor is chosen according to the desired cutoff frequency; and the values of the second resistor and the second capacitor are chosen according to the expected variations of a load supplied by the converter. 2. Circuit according to claim 1, wherein the values of the first and second resistors and first and second capacitors are determined from the system of equations: Vin = Vout. (1-a), Vout `I1 (1 - a), R 2950754 B9517-08-TO-355 RdsON RdsON 2.L 2.L where. R represents the nominal resistance of the load to which the converter is intended; L represents the value of an inductor (21) of the converter; Vin represents the supply voltage of the converter; ROSON represents the drain-source on-state resistor of a chopper switch (22); gm represents the transconductance of the amplifier (41); a represents the duty cycle; Ts represents the cutting period; IL represents the current in the inductive element; and VCe represents the voltage across the second capacitor (Ce). 3. Switching converter comprising a circuit 20 according to claim 1 or 2. gm (Vref - R1R TZ2 Vout VCe VCe aVp Vin • a2 Ts (1 a) 2 Ts (Vout - Vin) IL = -,