FR2929726B1 - Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants. - Google Patents

Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants. Download PDF

Info

Publication number
FR2929726B1
FR2929726B1 FR0852189A FR0852189A FR2929726B1 FR 2929726 B1 FR2929726 B1 FR 2929726B1 FR 0852189 A FR0852189 A FR 0852189A FR 0852189 A FR0852189 A FR 0852189A FR 2929726 B1 FR2929726 B1 FR 2929726B1
Authority
FR
France
Prior art keywords
bits
additioner
binary
computer program
program product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0852189A
Other languages
English (en)
Other versions
FR2929726A1 (fr
Inventor
Daniel Torno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daniel Tomo SARL
Original Assignee
Daniel Tomo SARL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daniel Tomo SARL filed Critical Daniel Tomo SARL
Priority to FR0852189A priority Critical patent/FR2929726B1/fr
Priority to US12/936,337 priority patent/US8788563B2/en
Priority to PCT/EP2009/053976 priority patent/WO2009121943A1/fr
Publication of FR2929726A1 publication Critical patent/FR2929726A1/fr
Application granted granted Critical
Publication of FR2929726B1 publication Critical patent/FR2929726B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/509—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/509—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
    • G06F7/5095—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators word-serial, i.e. with an accumulator-register

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Logic Circuits (AREA)
  • Complex Calculations (AREA)

Abstract

L'invention concerne un procédé d'addition permettant d'additionner une pluralité de nombres binaires d'entrée, de N bits chacun. Le procédé comprend au moins une itération, d'indice i+1 avec i >= 0, d'une étape d'accumulation permettant de générer un signal d'estimation U<i+1> sur N bits et un premier R<i+1> (ou second H<i+1> ) signal de correction sur N bits, à partir d'un nombre binaire de la pluralité de nombres binaires d'entrée, d'un signal d'estimation U' et d'un premier R<i> (ou second H<i>) signal de correction sur N bits issus d'une itération précédente i.En d'autres termes, un tel procédé d'addition permet de sommer un nombre binaire supplémentaire à un résultat représenté sous une forme binaire redondante de type « U/R » (ou « U/H »), ce résultat résultant d'une initialisation ou d'une sommation précédente, puis de générer un résultat également sous une forme binaire redondante de type « U/R » (ou « U/H »). Plus précisément, la présente invention permet de réaliser cette sommation autant de fois qu'il y a de nombres binaires à additionner.
FR0852189A 2008-04-02 2008-04-02 Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants. Active FR2929726B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR0852189A FR2929726B1 (fr) 2008-04-02 2008-04-02 Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants.
US12/936,337 US8788563B2 (en) 2008-04-02 2009-04-02 Method of addition with multiple operands, corresponding adder and computer program product
PCT/EP2009/053976 WO2009121943A1 (fr) 2008-04-02 2009-04-02 Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0852189A FR2929726B1 (fr) 2008-04-02 2008-04-02 Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants.

Publications (2)

Publication Number Publication Date
FR2929726A1 FR2929726A1 (fr) 2009-10-09
FR2929726B1 true FR2929726B1 (fr) 2020-11-06

Family

ID=39885070

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0852189A Active FR2929726B1 (fr) 2008-04-02 2008-04-02 Procede d'addition a operandes multiples, additionneur et produit programme d'ordinateur correspondants.

Country Status (3)

Country Link
US (1) US8788563B2 (fr)
FR (1) FR2929726B1 (fr)
WO (1) WO2009121943A1 (fr)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6567835B1 (en) * 1999-08-17 2003-05-20 Intrinsity, Inc. Method and apparatus for a 5:2 carry-save-adder (CSA)
US6578063B1 (en) * 2000-06-01 2003-06-10 International Business Machines Corporation 5-to-2 binary adder
GB2396708B (en) * 2002-12-05 2006-06-21 Micron Technology Inc Hybrid arithmetic logic unit
US7899860B2 (en) * 2005-07-26 2011-03-01 Stmicroelectronics S.R.L. Method and system for high-speed floating-point operations and related computer program product
FR2890763B1 (fr) * 2005-09-12 2007-11-09 R L Daniel Torno Sarl Sa Additionneur n bits et procede d'addition correspondant
ES2339180T3 (es) * 2006-04-21 2010-05-17 Heuliez Dispositivo de enclavamiento de un techo descapotable y vehiculo equipado de dicho sistema.
FR2900252B1 (fr) * 2006-04-21 2008-09-05 R L Daniel Torno Sarl Sa Additionneur n bits et procede d'addition correspondant.

Also Published As

Publication number Publication date
US20110106869A1 (en) 2011-05-05
US8788563B2 (en) 2014-07-22
WO2009121943A1 (fr) 2009-10-08
FR2929726A1 (fr) 2009-10-09

Similar Documents

Publication Publication Date Title
Cronn et al. Multiplex sequencing of plant chloroplast genomes using Solexa sequencing-by-synthesis technology
Vos et al. Development and analysis of a 20K SNP array for potato (Solanum tuberosum): an insight into the breeding history
Glaubitz et al. TASSEL-GBS: a high capacity genotyping by sequencing analysis pipeline
Stockinger et al. The largest subunit of RNA polymerase II as a new marker gene to study assemblages of arbuscular mycorrhizal fungi in the field
Jacquemyn et al. Habitat-driven variation in mycorrhizal communities in the terrestrial orchid genus Dactylorhiza
Wang et al. Genome-wide mining, characterization and development of microsatellite markers in Gossypium species
Okuno et al. Next-generation sequencing analysis of lager brewing yeast strains reveals the evolutionary history of interspecies hybridization
Metzger et al. Evolutionary dynamics of regulatory changes underlying gene expression divergence among Saccharomyces species
Frith A new repeat-masking method enables specific detection of homologous sequences
Yang et al. Target enrichment sequencing of 307 germplasm accessions identified ancestry of ancient and modern hybrids and signatures of adaptation and selection in sugarcane (Saccharum spp.), a ‘sweet’crop with ‘bitter’genomes
Bottmer et al. Sparse regression for large data sets with outliers
Kainer et al. Accuracy of genomic prediction for foliar terpene traits in Eucalyptus polybractea
Steige et al. Genomic legacies of the progenitors and the evolutionary consequences of allopolyploidy
Dong et al. The amount of RNA editing sites in liverwort organellar genes is correlated with GC content and nuclear PPR protein diversity
Dhungel et al. Molecular systematics of the subfamily Limenitidinae (Lepidoptera: Nymphalidae)
Fu et al. Locus‐specific view of flax domestication history
Mastretta-Yanes et al. Gene duplication, population genomics, and species-level differentiation within a tropical mountain shrub
St. Onge et al. Coalescent-based analysis distinguishes between allo-and autopolyploid origin in Shepherd's purse (Capsella bursa-pastoris)
Thiéry et al. Inter-and intrasporal nuclear ribosomal gene sequence variation within one isolate of arbuscular mycorrhizal fungus, Diversispora sp.
CN107909216B (zh) 一种零件实际生产周期预测方法
Sriswasdi et al. Global deceleration of gene evolution following recent genome hybridizations in fungi
CN106755300A (zh) 一种识别猕猴桃杂交亲本对子代基因组贡献比例的方法
He et al. Cis-regulatory evolution spotlights species differences in the adaptive potential of gene expression plasticity
Seitz et al. Improving ancient DNA genome assembly
Perumal et al. Nuclear and chloroplast genome diversity revealed by low-coverage whole-genome shotgun sequence in 44 Brassica oleracea breeding lines

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 9

PLFP Fee payment

Year of fee payment: 10

PLFP Fee payment

Year of fee payment: 11

TP Transmission of property

Owner name: DANIEL TORNO, FR

Effective date: 20180824

PLFP Fee payment

Year of fee payment: 12

PLFP Fee payment

Year of fee payment: 13

PLFP Fee payment

Year of fee payment: 14

CA Change of address

Effective date: 20210601

PLFP Fee payment

Year of fee payment: 15

PLFP Fee payment

Year of fee payment: 16

PLFP Fee payment

Year of fee payment: 17