FR2922037B1 - METHOD OF SECURING DATA IN MEMORY LIVING - Google Patents

METHOD OF SECURING DATA IN MEMORY LIVING

Info

Publication number
FR2922037B1
FR2922037B1 FR0707003A FR0707003A FR2922037B1 FR 2922037 B1 FR2922037 B1 FR 2922037B1 FR 0707003 A FR0707003 A FR 0707003A FR 0707003 A FR0707003 A FR 0707003A FR 2922037 B1 FR2922037 B1 FR 2922037B1
Authority
FR
France
Prior art keywords
securing data
living
memory
memory living
securing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0707003A
Other languages
French (fr)
Other versions
FR2922037A1 (en
Inventor
Patrick Dervin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR0707003A priority Critical patent/FR2922037B1/en
Publication of FR2922037A1 publication Critical patent/FR2922037A1/en
Application granted granted Critical
Publication of FR2922037B1 publication Critical patent/FR2922037B1/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032—Simple parity
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
FR0707003A 2007-10-05 2007-10-05 METHOD OF SECURING DATA IN MEMORY LIVING Expired - Fee Related FR2922037B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR0707003A FR2922037B1 (en) 2007-10-05 2007-10-05 METHOD OF SECURING DATA IN MEMORY LIVING

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0707003A FR2922037B1 (en) 2007-10-05 2007-10-05 METHOD OF SECURING DATA IN MEMORY LIVING

Publications (2)

Publication Number Publication Date
FR2922037A1 FR2922037A1 (en) 2009-04-10
FR2922037B1 true FR2922037B1 (en) 2011-07-15

Family

ID=39277023

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0707003A Expired - Fee Related FR2922037B1 (en) 2007-10-05 2007-10-05 METHOD OF SECURING DATA IN MEMORY LIVING

Country Status (1)

Country Link
FR (1) FR2922037B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3104754B1 (en) * 2019-12-17 2021-12-24 Thales Sa ELECTRONIC SYSTEM COMPRISING A DEVICE FOR ESTIMATING DEFECTS IN AN ELECTRONIC MEMORY SUBJECT TO HIGH ALTITUDE FLIGHT CONDITIONS

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3668644A (en) * 1970-02-09 1972-06-06 Burroughs Corp Failsafe memory system
GB8815239D0 (en) * 1988-06-27 1988-08-03 Wisdom Systems Ltd Memory error protection system
US5611042A (en) * 1995-10-10 1997-03-11 Lordi; Angela L. Data error detection and correction for a shared SRAM
JP4667093B2 (en) * 2005-03-17 2011-04-06 富士通株式会社 Dual storage device and control method of dual storage device

Also Published As

Publication number Publication date
FR2922037A1 (en) 2009-04-10

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