FR2911415B1 - Systeme a microcontroleurs multiples autonomes et procede de commande de celui-ci - Google Patents
Systeme a microcontroleurs multiples autonomes et procede de commande de celui-ciInfo
- Publication number
- FR2911415B1 FR2911415B1 FR0752727A FR0752727A FR2911415B1 FR 2911415 B1 FR2911415 B1 FR 2911415B1 FR 0752727 A FR0752727 A FR 0752727A FR 0752727 A FR0752727 A FR 0752727A FR 2911415 B1 FR2911415 B1 FR 2911415B1
- Authority
- FR
- France
- Prior art keywords
- controlling
- same
- multiple independent
- microcontroller system
- independent microcontroller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW095113415A TW200725393A (en) | 2005-12-23 | 2006-04-14 | Self-control multi-microcontroller system and method |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2911415A1 FR2911415A1 (fr) | 2008-07-18 |
FR2911415B1 true FR2911415B1 (fr) | 2013-12-27 |
Family
ID=38758803
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0752727A Active FR2911415B1 (fr) | 2006-04-14 | 2007-01-17 | Systeme a microcontroleurs multiples autonomes et procede de commande de celui-ci |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2007287126A (ko) |
KR (1) | KR100946561B1 (ko) |
FR (1) | FR2911415B1 (ko) |
TW (1) | TW200725393A (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101833476B (zh) * | 2010-05-28 | 2013-08-14 | 西安交通大学 | 基于cmp的推测多线程机制下的独立栈函数调用方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5881063A (en) * | 1996-04-08 | 1999-03-09 | Ford Motor Company | Half-message based multiplex communication interface circuit which uses a main microcontroller to detect a match in addresses and generate a qualified signal |
US6085307A (en) * | 1996-11-27 | 2000-07-04 | Vlsi Technology, Inc. | Multiple native instruction set master/slave processor arrangement and method thereof |
US6341344B1 (en) | 1998-03-20 | 2002-01-22 | Texas Instruments Incorporated | Apparatus and method for manipulating data for aligning the stack memory |
-
2006
- 2006-04-14 TW TW095113415A patent/TW200725393A/zh unknown
- 2006-11-30 KR KR1020060119680A patent/KR100946561B1/ko active IP Right Grant
- 2006-12-04 JP JP2006326773A patent/JP2007287126A/ja active Pending
-
2007
- 2007-01-17 FR FR0752727A patent/FR2911415B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
TWI312941B (ko) | 2009-08-01 |
FR2911415A1 (fr) | 2008-07-18 |
KR20070102370A (ko) | 2007-10-18 |
JP2007287126A (ja) | 2007-11-01 |
TW200725393A (en) | 2007-07-01 |
KR100946561B1 (ko) | 2010-03-11 |
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Legal Events
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