FR2897964B1 - Procede de calcul numerique incluant la division euclidienne - Google Patents

Procede de calcul numerique incluant la division euclidienne

Info

Publication number
FR2897964B1
FR2897964B1 FR0601782A FR0601782A FR2897964B1 FR 2897964 B1 FR2897964 B1 FR 2897964B1 FR 0601782 A FR0601782 A FR 0601782A FR 0601782 A FR0601782 A FR 0601782A FR 2897964 B1 FR2897964 B1 FR 2897964B1
Authority
FR
France
Prior art keywords
method including
calculation method
digital calculation
euclidian division
euclidian
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0601782A
Other languages
English (en)
Other versions
FR2897964A1 (fr
Inventor
Vincent Dupaquis
Michel Douguet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rambus Inc
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Priority to FR0601782A priority Critical patent/FR2897964B1/fr
Priority to US11/442,776 priority patent/US7672990B2/en
Publication of FR2897964A1 publication Critical patent/FR2897964A1/fr
Application granted granted Critical
Publication of FR2897964B1 publication Critical patent/FR2897964B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/721—Modular inversion, reciprocal or quotient calculation
FR0601782A 2006-02-28 2006-02-28 Procede de calcul numerique incluant la division euclidienne Active FR2897964B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0601782A FR2897964B1 (fr) 2006-02-28 2006-02-28 Procede de calcul numerique incluant la division euclidienne
US11/442,776 US7672990B2 (en) 2006-02-28 2006-05-30 Digital computation method involving euclidean division

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0601782A FR2897964B1 (fr) 2006-02-28 2006-02-28 Procede de calcul numerique incluant la division euclidienne

Publications (2)

Publication Number Publication Date
FR2897964A1 FR2897964A1 (fr) 2007-08-31
FR2897964B1 true FR2897964B1 (fr) 2017-01-13

Family

ID=37596289

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0601782A Active FR2897964B1 (fr) 2006-02-28 2006-02-28 Procede de calcul numerique incluant la division euclidienne

Country Status (2)

Country Link
US (1) US7672990B2 (fr)
FR (1) FR2897964B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7738657B2 (en) * 2006-08-31 2010-06-15 Intel Corporation System and method for multi-precision division
US7797612B2 (en) * 2006-12-29 2010-09-14 Intel Corporation Storage accelerator
US8290151B2 (en) * 2007-10-12 2012-10-16 Infineon Technologies Ag Device and method for determining an inverse of a value related to a modulus
US8060551B2 (en) * 2007-12-30 2011-11-15 Agere Systems Inc. Method and apparatus for integer division
US9645794B2 (en) * 2014-09-23 2017-05-09 Texas Instruments Incorporated Homogeneous atomic pattern for double, add, and subtract operations for digital authentication using elliptic curve cryptography
US9753694B2 (en) 2015-04-21 2017-09-05 Qualcomm Incorporated Division and root computation with fast result formatting
CN109450625B (zh) * 2018-11-12 2022-01-04 青岛大学 大规模多项式扩展欧几里得算法的安全外包方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0431629A3 (en) * 1989-12-08 1993-07-21 Sony Corporation Mutual division circuit
JP3232602B2 (ja) * 1991-09-06 2001-11-26 ソニー株式会社 ユークリッドの互除回路
US5442578A (en) * 1991-12-12 1995-08-15 Sony Corporation Calculating circuit for error correction
CA2267721C (fr) * 1998-03-26 2002-07-30 Nippon Telegraph And Telephone Corporation Methode rapide de chiffrement, de dechiffrement et d'authentification
US5951677A (en) * 1998-05-29 1999-09-14 Texas Instruments Incorporated Efficient hardware implementation of euclidean array processing in reed-solomon decoding
WO2002082717A1 (fr) * 2001-04-05 2002-10-17 Kent Ridge Digital Labs Procedes et appareils permettant de construire des cryptosystemes a courbe elliptique efficaces
DE10222212A1 (de) * 2002-05-16 2003-12-04 Giesecke & Devrient Gmbh Ausspähungsgeschützte modulare Inversion
FR2847402B1 (fr) * 2002-11-15 2005-02-18 Gemplus Card Int Procede de division entiere securise contre les attaques a canaux caches
US20040117423A1 (en) * 2002-12-11 2004-06-17 Xiaohua Shi Signed integer long division apparatus and methods for use with processors
FR2848753B1 (fr) * 2002-12-11 2005-02-18 Gemplus Card Int Procede de division entiere ou de reduction modulaire securise contre les attaques a canaux caches
FR2859030B1 (fr) * 2003-08-21 2005-11-04 Gemplus Card Int Procede de realisation d'une multiplication modulaire et procede de realisation d'une multiplication euclidienne sur des nombres de 2n bits

Also Published As

Publication number Publication date
US20070244956A1 (en) 2007-10-18
FR2897964A1 (fr) 2007-08-31
US7672990B2 (en) 2010-03-02

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