FR2866131A1 - Audio signals converting system, has single clock associated to receiver for conversion of asynchronous sampling frequencies, converter of analog to digital type or digital to analog type, and microcontroller - Google Patents

Abstract

The system includes a single clock (6) associated to a receiver (2) for conversion of asynchronous sampling frequencies. The system also comprises of a converter (4) of digital to analog type or analog to digital type, and a microcontroller (5).

Description

SYNCHRONIZATION OF ASYNCHRONOUS SYSTEMS

  In the following description, the abbreviations used will have the following meaning: SSA: Synchronization of Asynchronous Systems DAC: Digital to Analog Converter ADC: Analog to Digital Converter PLL: Phase Locked Loop (phase locked loop) ASRC: Asynchronous Sample Rate Converter MCU: Microcontroller Unit DSP: Digital Signal Processor (Digital Processing Processor) DVD: Digital Versatile Disc SACD: Super Audio CD. Successor of the audio CD developed by Sony and Philips MP3: Coding of data reduction developed by the MPEG group In the following description, the figures will represent the following elements: 2866131 2 Figure 1 Schematic diagram of a digital-to-analog converter with SSA Figure 2. Schematic diagram of a synchronous storage device with SSA Figure 3 Schematic diagram of a digital-to-analog converter without SSA Asynchronous System Synchronization (SSA) technology is a principle of reducing the number of clocks in a digital system, allowing applications in many areas. The key application domain envisaged by the invention is the digital-to-analog (DAC) or analog-to-digital (ADC) conversion of audio signals, as well as digital audio amplification. This principle can also be applied to any system comprising a digital / analog or analog / digital conversion of the signal, for example in the sensor field or in the video domain.

  Problem addressed General context In the field of digital audio, many signal formats are available and not all sampling rates are interlinked by an integer multiplication factor. When a system has several digital audio sources with different sampling rates and it is a matter of converting these sources into the analog domain, there are several ways to proceed: - The system processes each sampling frequency distinctly and High quality phase-locked loops (PLLs) must be used to correctly convert digital signals to analog.

  - The system converts the input sample rate to another known and fixed audio sampling frequency using an asynchronous sampling rate converter (ASRC). This approach makes it possible to pass PLL of quality but does not reduce the complexity of the circuit.

  If the system includes a microcontroller (MCU) and / or a signal processing processor (DSP), the clock count increases by one or two units, which increases costs, generates electromagnetic pollution that is difficult to control, and can generate intermodulation signals in the spectrum of the analog signals.

  Market Needs The use of signal processing processors has become common today because of the available capabilities that do not exist in the analog domain. Similarly, the CD is no longer the only digital audio format used by the public: the DVD is implanted, the Super Audio CD (SACD) seeks to replace the CD, MP3 encoded engravings are common to name only these new formats. Today there are more than 10 different formats that can all be found for example in one system: the car radio.

  As a result, the invention described will allow increasingly complex systems to operate under the best conditions, with an acceptable cost and complexity.

State of the prior art

  General description of the prior art

  There are publications on how to implement a sampling rate converter, but not on the hardware implications of such a component in a complete system, from the point of view of disturbances as well as the complexity of the system.

  Solution Provided A system for easily converting audio signals having a heterogeneous sampling rate, without generating electromagnetic pollution and / or intermodulation signals related to the implementation of a plurality of clocks. The audio signals are intended to be converted from a digital format to an analog format and / or from an analog format to a digital format. The system is characterized in that it comprises at least one unique clock (6) associated with an asynchronous sampling frequency conversion software module (2, 10), a converter (4) of analog-digital or digital-type. analog, a microcontroller (5).

  Presentation of the solution For the figures 1, 2 and 3 which follow in this document, the arrows represent the different types of signals in the schematic diagrams according to the following code: Audio signals: arrows 20 Control signals: arrows 21 Signals clock: dashed arrows Figure 1 shows the schematic diagram of the synchronization of asynchronous systems in the case of a digital-to-analog converter. The numerical references shown in FIG. 1 correspond to the following elements: Audio signals: arrows 20 Control signals: arrows 21 Clock signals: dashed arrows Inner, Input2, Input3, Input4: 20 Multiplexer: 1 Receiver: 2 DSP with ASRC software: 3 DAC: 4 MCU: 5 Clock: 6 Keyboard: 7 Display: 8 Figure 2 shows a second block diagram for a storage device - for example hard disk, CD player, MP3 player - with synchronization. The numerical references shown in FIG. 2 correspond to the following elements: Audio signals: arrows 2866131 5 Control signals: arrows 21 Clock signals: DSP dotted arrows with ASRC software and decompression: 16 DAC: 4 MCU: 5 Clock: 6 Keyboard: 7 Screen: 8 Storage Device: 9 Differences with the Prior Art The main difference between current systems and the proposed solution is to use only one reference clock in the block diagram. The speed of this clock is not necessarily related to an audio sampling frequency, thanks to the use of the asynchronous sampling rate converter.

  In the two examples represented in FIGS. 1 and 2, the sampling frequency converter is implemented in software for the following reasons: - reduction of the number of components in the system, - inadequacy of the current hardware ASRCs to work outside the frequencies of audio sampling.

  Currently, sample rate converters are used to switch from one audio sampling rate to another audio sampling rate, which is a special case of our solution that we do not exclude.

  The purpose of the synchronization of asynchronous systems presented in this document is not to prefer a sample rate conversion solution over another, but to simplify as much as possible systems that tend to become more complex.

  For example, there is shown in Figure 3 a block diagram for a 2866131 6 conventional digital to analog converter with ASRC. The numerical references shown in FIG. 3 correspond to the following elements: Audio signals: arrows 20 Control signals: arrows 21 Clock signals: dotted arrows Inlet, Input2, Input3, Input4: 20 Multiplexer: 1 Receiver: 2 CURR hardware: 13 DSP: 14 DAC: 4 MCU: 5 Clock 1: 11 Clock 2: 12 Clock 3: 15 Keyboard: 7 Screen: 8 Examples of application Digital / analog conversion: this is the case study 20 of the document and the SSA principle naturally applies to it; see Figure 1.

  Analog / digital conversion: The same SSA principle can be applied for this type of conversion and it becomes an important signal quality factor when the converter has to synchronize with a frequency outside the system. Digital amplification: whatever the type of modulation used (PWM, PDM, hybrid) the SSA principle applies as for a digital-to-analog converter. Audio storage device: see figure 2 Audio / video storage device: the same case as the audio storage device alone, the synchronization can be done on video signals for example.

Claims (1)

7 CLAIM   A system for easily converting audio signals having a heterogeneous sampling rate, without generating electromagnetic pollution and / or intermodulation signals related to the implementation of a plurality of clocks; said audio signals being intended to be converted from a digital format to an analog format and / or from an analog format to a digital format; said system being characterized in that it encamps at least a single clock (6) associated with an asynchronous sampling frequency conversion software module (2, 10), an analog-digital or digital converter (4) -Analogic, a microcontroller (5).