FR2865086B1 - DEVICE AND METHOD FOR CONVERTING A FIRST MESSAGE TO A SECOND MESSAGE - Google Patents
DEVICE AND METHOD FOR CONVERTING A FIRST MESSAGE TO A SECOND MESSAGEInfo
- Publication number
- FR2865086B1 FR2865086B1 FR0500259A FR0500259A FR2865086B1 FR 2865086 B1 FR2865086 B1 FR 2865086B1 FR 0500259 A FR0500259 A FR 0500259A FR 0500259 A FR0500259 A FR 0500259A FR 2865086 B1 FR2865086 B1 FR 2865086B1
- Authority
- FR
- France
- Prior art keywords
- message
- converting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L9/3066—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy involving algebraic varieties, e.g. elliptic or hyper-elliptic curves
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/004—Countermeasures against attacks on cryptographic mechanisms for fault attacks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
- H04L9/302—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Storage Device Security (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004001659A DE102004001659B4 (en) | 2004-01-12 | 2004-01-12 | Apparatus and method for converting a first message into a second message |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2865086A1 FR2865086A1 (en) | 2005-07-15 |
FR2865086B1 true FR2865086B1 (en) | 2006-08-04 |
Family
ID=34683956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0500259A Expired - Fee Related FR2865086B1 (en) | 2004-01-12 | 2005-01-11 | DEVICE AND METHOD FOR CONVERTING A FIRST MESSAGE TO A SECOND MESSAGE |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE102004001659B4 (en) |
FR (1) | FR2865086B1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005038228A1 (en) * | 2005-08-12 | 2007-02-15 | Giesecke & Devrient Gmbh | Cryptographic method for e.g. smart card, involves determining test result that assumes result of affected method-execution while determining result such that result is incorrect when rest result points to affected method-execution |
CN112613882B (en) * | 2020-12-29 | 2023-06-02 | 成都知道创宇信息技术有限公司 | Distributed signature system and management method |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2819663B1 (en) * | 2001-01-18 | 2003-04-11 | Gemplus Card Int | DEVICE AND METHOD FOR EXECUTING A CRYPTOGRAPHIC ALGORITHM |
JP2002261751A (en) * | 2001-03-02 | 2002-09-13 | Hitachi Ltd | Code-processing method |
FR2829331B1 (en) * | 2001-09-04 | 2004-09-10 | St Microelectronics Sa | METHOD FOR SECURING A SECRET QUANTITY |
-
2004
- 2004-01-12 DE DE102004001659A patent/DE102004001659B4/en not_active Expired - Fee Related
-
2005
- 2005-01-11 FR FR0500259A patent/FR2865086B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR2865086A1 (en) | 2005-07-15 |
DE102004001659A1 (en) | 2005-08-04 |
DE102004001659B4 (en) | 2007-10-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 12 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 16 |
|
ST | Notification of lapse |
Effective date: 20210905 |