FR2857178B1 - Entrelaceur et dispositif de decodage de signaux numeriques comportant un tel entrelaceur - Google Patents

Entrelaceur et dispositif de decodage de signaux numeriques comportant un tel entrelaceur

Info

Publication number
FR2857178B1
FR2857178B1 FR0308238A FR0308238A FR2857178B1 FR 2857178 B1 FR2857178 B1 FR 2857178B1 FR 0308238 A FR0308238 A FR 0308238A FR 0308238 A FR0308238 A FR 0308238A FR 2857178 B1 FR2857178 B1 FR 2857178B1
Authority
FR
France
Prior art keywords
interlacer
digital signals
decoding digital
decoding
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0308238A
Other languages
English (en)
Other versions
FR2857178A1 (fr
Inventor
Pascal Urard
Laurent Paumier
Etienne Lantreibecq
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0308238A priority Critical patent/FR2857178B1/fr
Priority to US10/880,334 priority patent/US7308618B2/en
Publication of FR2857178A1 publication Critical patent/FR2857178A1/fr
Application granted granted Critical
Publication of FR2857178B1 publication Critical patent/FR2857178B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2782Interleaver implementations, which reduce the amount of required interleaving memory
    • H03M13/2785Interleaver using in-place interleaving, i.e. writing to and reading from the memory is performed at the same memory location
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6566Implementations concerning memory access contentions

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
FR0308238A 2003-07-04 2003-07-04 Entrelaceur et dispositif de decodage de signaux numeriques comportant un tel entrelaceur Expired - Fee Related FR2857178B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0308238A FR2857178B1 (fr) 2003-07-04 2003-07-04 Entrelaceur et dispositif de decodage de signaux numeriques comportant un tel entrelaceur
US10/880,334 US7308618B2 (en) 2003-07-04 2004-06-29 Interleaver and device for decoding digital signals comprising such an interleaver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0308238A FR2857178B1 (fr) 2003-07-04 2003-07-04 Entrelaceur et dispositif de decodage de signaux numeriques comportant un tel entrelaceur

Publications (2)

Publication Number Publication Date
FR2857178A1 FR2857178A1 (fr) 2005-01-07
FR2857178B1 true FR2857178B1 (fr) 2005-09-30

Family

ID=33522796

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0308238A Expired - Fee Related FR2857178B1 (fr) 2003-07-04 2003-07-04 Entrelaceur et dispositif de decodage de signaux numeriques comportant un tel entrelaceur

Country Status (2)

Country Link
US (1) US7308618B2 (fr)
FR (1) FR2857178B1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100699491B1 (ko) * 2005-07-19 2007-03-26 삼성전자주식회사 인터리빙 방법 및 그 장치
TWI269535B (en) * 2005-09-13 2006-12-21 Sunplus Technology Co Ltd Convolutional interleaving and de-interleaving circuit and method
FR2955001A1 (fr) * 2010-01-06 2011-07-08 St Microelectronics Grenoble 2 Procede et dispositif d'entrelacement en ligne et en colonne pour blocs de taille variable
US9665483B2 (en) * 2013-09-30 2017-05-30 Alcatel Lucent Method and apparatus for bit-interleaving

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0138749B1 (ko) * 1992-01-23 1998-05-15 강진구 디인터리브방법 및 그 장치
FR2737363B1 (fr) * 1995-07-27 1997-09-05 France Telecom Entrelacement/desentrelacement d'elements de donnees
EP0856949B1 (fr) * 1997-01-31 2005-03-30 Alcatel Procédé et dispositifs d'entrelacement/désentrelacement pour données numériques, et système de communication
KR100237745B1 (ko) * 1997-05-23 2000-01-15 김영환 회전형 인터리버/디인터리버의 메모리 주소 발생장치 및 그 방법
KR100248396B1 (ko) * 1997-10-24 2000-03-15 정선종 병렬 길쌈 부호화기를 사용한 채널 부호기 설계방법
US6507629B1 (en) * 1998-04-07 2003-01-14 Sony Corporation Address generator, interleave unit, deinterleave unit, and transmission unit
JP3239872B2 (ja) * 1999-01-14 2001-12-17 日本電気株式会社 インタリーバ、インタリーブ方法、デインタリーバ、デインタリーブ方法、発信装置及び受信装置
US7170849B1 (en) * 2001-03-19 2007-01-30 Cisco Systems Wireless Networking (Australia) Pty Limited Interleaver, deinterleaver, interleaving method, and deinterleaving method for OFDM data

Also Published As

Publication number Publication date
US7308618B2 (en) 2007-12-11
US20050050428A1 (en) 2005-03-03
FR2857178A1 (fr) 2005-01-07

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090331