FR2819088A1 - RF power summer/divider having first stage two channel Wilkinson coupler and second stage identical coupler sets forming pairs/non pairs and star configuration connected - Google Patents

Abstract

The summer/divider mechanism has two stage in cascade (18,19). The first stage is a two channel Wilkinson coupler, and the second channel two identical couplers carrying m/2 channels or (m-1)/2 channels dependent on whether there are pairs or no pairs. The channels are connected in a star configuration (23 to 24, 27 to 28). The free line ends are connected to equilibrium resistances.

Description

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 The present invention relates to an RF power splitting device.

 A summing-dividing device is a device comprising a single pole on one side and a set of n poles on the other side, these poles being inputs or outputs depending on the direction of use of the device. If the single pole is used as an input, one collects on each of the n other poles, which are then outputs, the 1 / n-th part of the input signal, Conversely, if the n poles are used as that inputs, we collect on the single pole, which is the output of the device, the geometric sum of the n input signals.

 The input signals in question can be narrowband or wideband and they can be low or high power, the circuits of the device being designed accordingly.

 The type of summing-dividing device, operating in radio frequencies (RF), to which the invention relates, is produced according to planar circuit technology, on printed circuit, for example in "microstrip" or "suspended microstrip" technology. The input and output poles of this device, as well as its internal connections must therefore be coplanar. In addition, this device must have maximum isolation in RF (that is to say at frequencies generally between a few MHz and several GHz) between its n input or output channels, as the case may be.

 The invention relates more particularly to a device whose number of channels is different from 2n (with n> l). In fact, it is known to achieve satisfactorily (optimal performance, large bandwidth and perfect symmetry of the circuits) a 2 "channel device using Wilkinson type couplers with two associated channels in cascade.

 Many devices performing the functions of summing or dividing RF signals exist, but they are limited either in their performance or in their architecture.

 The best known are devices of the Wilkinson type or derivatives. Depending on the number of routes, we encounter difficulties, even

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 impossibilities, to perform the function in the same plane, as explained below with reference to Figures 1 to 3.

 FIG. 1 shows a two-way summator (or divider) 1. This summator has a triangle structure, the base of which is connected to two terminals (access) J1, J2 and the vertex of which is connected to the (output) terminal J3, the base of this triangle comprises a balancing resistor R, and the other two sides each have a Z impedance (line impedance). Such a structure is perfectly symmetrical with respect to the channels J l and J2 and can be produced in planar technology because it has no crossing of circuits.

 There is shown in form 2 a three-way summator (or divider) 2 which has three (access) terminals J1 to J3 and one (output) terminal J4. the terminals J1 to J3 are each connected on the one hand by a balancing resistor R at a common point 3, and on the other hand by an impedance, respectively Z1 to Z3, at the terminal J4. Such a three-way structure (or more) necessarily involves the crossing of two links (link to J3 with one of the links of Z1 or Z3). It cannot therefore be carried out in planar technology.

One could consider a cable technology to solve the problem of crossing links, but such a solution is hardly possible beyond an operating frequency of a hundred MHz, because then connections would become difficult to achieve, and reduced bandwidth (the connecting cables should have characteristic impedances different from the standard values in order to obtain a good adaptation of impedances and such cables are not available as standard).

 A possible solution to avoid the problem of crossing links is shown in Figure 3. The circuit 4 of Figure 3 has, on one side, three terminals J1 to J3, and on the other side a terminal J4. The terminal J2 is connected to each of the terminals J1 and J3 by a balancing resistor R, and the terminals J1 to J3 are connected to the terminal J4 each time by an impedance respectively Z1 to Z3. Such a system is not symmetrical because there is no resistance between the terminals Jl and J3 (as there are between J1 and J2 on the one hand, and between

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J2 et J3 d'autre part), et l'isolement entre les voies J l et J3 est fortement dégradé par rapport à celui entre les voies J1 et J2, ainsi que par rapport à celui entre J2 et J3.

J2 and J3 on the other hand), and the isolation between the channels J l and J3 is greatly degraded compared to that between the channels J1 and J2, as well as compared to that between J2 and J3.

 Another known device, called de Gysel, with a ring structure, has the same drawback as that of Wilkinson. If we manage to widen its bandwidth without too much difficulty, the problem remains the crossing of lines. Another known device, derived from that of Gysel, eliminates crossovers, but is very limited in bandwidth.

 Except for 2-channel devices, which can be made up of cascaded Wilkinson circuits with 2 channels each, there is no satisfactory solution for producing m-channel devices (m 2r with n 1) having a large passband and insulation. correct between channels (at least 18 to 20 dB) and can be performed in planar technology.

 The subject of the present invention is a summing / dividing device comprising on one side m channels (with in particular m 2 "with n> 1) and on the other a single channel, this device having both a large bandwidth, correct isolation between channels, and which can be achieved in planar technology and which can operate in a wide range of frequencies, for example from a few MHz to several GHz.

 The subject of the present invention is a power summator / divider with m channels (m> 2), characterized in that it comprises two stages in cascade, the first being of the Wilkinson coupler type with two channels, and the second comprising two couplers, each of these two couplers comprising m / 2 channels if m is even, or (m-1) / 2 channels if m is odd, these channels being each time with star configuration lines, the free ends of these lines being interconnected by ((m / 2) -1) equal balancing resistors between them if m is even, and by ((m-3) / 2) equal balancing resistors between them, if m is odd, and if, m is even, these two couplers are connected to their base by a balancing resistance, or, if m is odd, these two couplers are connected to their base by two equalizing resistors between them and in series, whose point constitutes the central point of the m paths, this

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 common point being, moreover, connected each time by a line at the ends of the base of the first floor.

According to another characteristic of the invemlon, the power summator / divider is characterized in that the device for odd m, the two lines connecting the ends of the base of the first stage to the common point have an impedance double that of the lines of each coupler, and that said two balancing resistors have a value equal to that of the balancing resistors of each coupler, this value being a function of the impedance at the input and at the output of each coupler.

The present invention will be better understood on reading the detailed description of several embodiments, taken by way of nonlimiting examples and illustrated by the appended drawing, in which: - Figures 1 to 3, already described above, relate to devices of the prior art, - Figures 4 to 6 are diagrams of devices in accordance with the invention, for different numbers of multiple channels, and - Figures 7 and 8 are block diagrams of generalization of the device of the invention for an even number and an odd number, respectively, of multiple channels.

 - The invention is described below schematically, with components shown in discrete form, but it is understood that the concrete realization of the impedances and resistances can be done using different technologies, in particular depending on the operating frequencies envisaged. For low frequencies (for example less than 100 MHz), the impedances consist of circuits with localized constants (inductors and capacitors), while for higher frequencies, planar technologies are used (microstrip lines, lines with slot, coplanar guides, ...). In the latter case, each of the different line segments representing an impedance can be produced either in the form of a single line section having the desired impedance, or in the form of a series of

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 sub-sections of different impedances, all of these sub-sections having the desired impedance, this in order to improve the performance of the device, in particular to widen its operating bandwidth.

description, c'est-à-dire qu'ils ont plusieurs entrées et une sortie unique, mais il est bien entendu que ces mêmes circuits peuvent être utilisés en tant que diviseurs (à une seule entrée et plusieurs sorties). Ils sont réalisés sur un circuit imprimé, en technologie planaire (microstnp ou microstrip suspendu, par exemple). Une telle technologie permet d'obtenir une architecture (un tracé du circuit imprimé) à symétrie quasi parfaite entre toutes les liaisons inter-voies (symétrie par rapport à la médiatrice de l'alignement des entrées J1 à Jn). A ce propos, il faut noter que toute dissymétrie au niveau des entrées est difficilement compensable par les circuits se trouvant en aval. De plus, avec le dispositif de l'invention, les pistes de liaison ou de transformation ne se coupent pas, et les entrées, ainsi que les pistes sont dans le même plan (ce qui peut faciliter l'intégration de ce dispositif dans un appareil, tel qu'un amplificateur, généralement également réalisé en technologie planaire). The circuits described below with reference to FIGS. 4 to 8 will be considered as summers to simplify the

description, i.e. they have several inputs and a single output, but it is understood that these same circuits can be used as dividers (with a single input and several outputs). They are made on a printed circuit, in planar technology (microstnp or suspended microstrip, for example). Such technology makes it possible to obtain an architecture (a layout of the printed circuit) with almost perfect symmetry between all the inter-channel links (symmetry with respect to the perpendicular bisector of the alignment of the inputs J1 to Jn). In this regard, it should be noted that any asymmetry in the inputs is difficult to compensate for by the circuits located downstream. In addition, with the device of the invention, the connecting or transformation tracks do not intersect, and the inputs, as well as the tracks are in the same plane (which can facilitate the integration of this device into a device. , such as an amplifier, generally also produced in planar technology).

 The summing device 5 represented in FIG. 4 essentially consists of two stages 6 and 7, stage 6 being relative to the outlet, and stage 7 to the entrances. This device has three input terminals J1 to J3 and one output terminal J4. Each of the inputs J1 to J3 is connected by an impedance transformer, Tl to T3 respectively to a corresponding input point P1 to P3 of the second stage 7.

 The output J4 is connected by an impedance transformer T4 to an output point P4 relative to the first stage 6. These impedance transformers Tl to T4 in addition to their obvious role of adapting the device 5 to the circuits located upstream of its inputs and downstream of its output, make it possible to widen the bandwidth of the device 5.

 The first stage 6 is of the Wilkinson coupler type. It has two lines 8.9 of equal impedance (Z1) connecting P4 to two

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points intermédiaires P 5, P6 respectivement. Ces points P 5 et P6 sont reliés entre eux par une résistance d'équilibrage 10.

intermediate points P 5, P6 respectively. These points P 5 and P6 are linked together by a balancing resistor 10.

 The second stage 7 has four lines 11 to 14. Lines 11 and 12 connect point P5 to points Pl and P2 respectively, and lines 13 and 14 connect point P6 to points P2 and P3. Lines 11 and 14 have the same impedance Z2, as do lines 12 and 13 (Z3).

A balancing resistor 15 connects the points P1 and P2, and a balancing resistor 16 connects the points P 2 and P3.

 Resistors 15 and 16 are equal to each other. Their value depends on impedances 11 and 14.

à J1 ou J3), il faut avoir : z 3 = 2. Z2. soit : i3 = i2/2 (il, i2 et i3 étant les courants dans les lignes d'impédance zl, z2, z3). So that this device 5 is not only perfectly symmetrical and balanced, but also so that in its use as a divider the signal appearing in P2 is identical to that appearing in Pl or P3 (that is to say so that it is similarly in J2 compared

at D1 or D3), you must have: z 3 = 2. Z2. either: i3 = i2 / 2 (il, i2 and i3 being the currents in the impedance lines zl, z2, z3).

The phase shifts due to lines 11 and 14 must be identical to those due to lines 12 and 13. We then obtain: i2. z2 = 2. i3. Z3.

 Under such conditions, the identities of signals are obtained in P1, P2, P3 or else in J2 and J3.

 The balancing resistors 15 and 16 also provide insulation between the channels J1 and J2 on the one hand, and between the channels J2 and J3 on the other hand. Similarly, the balancing resistor 10 provides isolation between the points P 1 and P3 (or J1 and J3); The isolations obtained are of the order of 20 dB for a device with wide bandwidth (greater than 1 octave).

 The device 5 described above does not have any intersection of lines, and can therefore be produced in planar technology.

 If we wanted to make a device with four channels of the same type (all inputs or all outputs) on one side and a single channel (output or input, respectively) on the other side, we might as well realize the device of the invention following the rule of

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 generalization exposed below with reference to FIGS. 7 and 8, that cascade two stages of Wilkinson two-way couplers.

 FIG. 5 shows the device of the invention for five channels of the same nature on one side (entry or exit). As in the case of Figure 4, the device 1 7 of Figure 5 consists of two stages 18,19. The five inputs J1 to J5 are each connected by an impedance transformer T1 to T5 to a corresponding input point, P 1 to P 5 respectively, and the output J6 is connected by an impedance transformer T6 to a point of exit P6.

 The point P6 is connected by lines 20, 21 of equal impedance zl to intermediate points P7, P8, these points being connected to each other by a balancing resistor 22. The point P7 is connected by lines 23 to 25 to the points Pl to P3 is connected by lines 23 to 25 to points Pl to P3 respectively, while point P 8 is connected by lines 26 to 28 to points P 3 to P5 respectively. Balancing resistors 29 to 32 respectively connect the points Pl-P2, P2-P3, P3-P4 and P4-P5.

Elements 20 to 22 constitute the first stage 18, and elements 23 to 32 constitute the second stage 19. Lines 23, 24, 27 and 28 all have an impedance equal to z2, while lines 25 and 26 have an impedance equal to z3. Let i2 be the currents in the lines of impedance z2 and i3 those in the lines of impedance z3. Let i2 be the currents in the lines of impedance z2 and i3 those in the lines of impedance z3. As in the case of Figure 4, we must have:
Z3 = 2. z2 and i3 = i2 / 2.

 If the phase shifts due to the lines of impedance z2 are equal to those due to the lines of impedance z3, we have: i 2. z2 = 2. i3. Z3.

 The points Pl to P5 are respectively connected two by two by insulation resistors 29 to 32. The resistors 29 and 30 have a value equal to R2, and the resistors 31 and 32 have a value equal to R3.

 The values of the resistances R2 and R3 are a function of the impedances in P7 (or P8) on the one hand, and in Pl (or P2, P3, P4, P5) on the other hand.

 At point P3, we obtain (in the case of a divider arrangement) the sum of the two signals in lines 25 and 26. In this case, all

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les signaux aux points P 1 à P5 sont identiques, de même qu'aux bornes J l à J5.

the signals at points P 1 to P5 are identical, as well as at terminals J l to J5.

de l'étage 19 que par le fait qu'il comporte SIX bornes J 1 à J6, six transformateurs T1 à T6, ce qui fait qu'il a six points correspondants Pl à P6, et qu'au lieu d'un point central (qui était P3 en figure 5), il en a deux, P3 et P4, et donc les lignes centrales (qui étaient les lignes 25 et 26 en figure 5) ne sont pas reliées ensemble à un point milieu, mais respectivement à P3 et P4, ces points P3 et P4 étant reliés par une résistance d'équilibrage (47). Les lignes reliant les points intermédiaires P8, P9 aux points Pl à P3 et P4 à P6 respectivement, sont référencées 39 à 44. Les résistances d'équilibrage entre les points Pl à P6 sont respectivement référencées 45 à 49. Du fait qu'il n'y a pas de'point central réel (tel que le point P3 en figure 5), mais un point central virtuel (centre de la résistance 47) et que les points P3 et P4 les plus proches de ce centre virtuel sont isolés entre eux par la résistance 47, les impédances des lignes 39 à44 sont toutes égales à z2. Il en résulte également que les résistances 45,46, 48 et 49 sont égales entre elles (égales à R2). Seule la résistance 47 a une valeur différente. The device 33 of Figure 6 comprises, on one side, six channels of the same kind. It also consists of two stages 34, 35. Stage 34 is identical to stages 9 or 18, and consists of two lines 36,37 and a balancing resistor 38. Stage 35 does not differ

of stage 19 only by the fact that it has SIX terminals J 1 to J6, six transformers T1 to T6, which means that it has six corresponding points Pl to P6, and that instead of a central point (which was P3 in figure 5), there are two, P3 and P4, and therefore the central lines (which were lines 25 and 26 in figure 5) are not connected together at a midpoint, but respectively at P3 and P4, these points P3 and P4 being connected by a balancing resistor (47). The lines connecting the intermediate points P8, P9 to the points Pl to P3 and P4 to P6 respectively, are referenced 39 to 44. The balancing resistances between the points Pl to P6 are respectively referenced 45 to 49. Because there is no there is no real central point (such as point P3 in figure 5), but a virtual central point (center of resistance 47) and that the points P3 and P4 closest to this virtual center are isolated from each other by resistor 47, the impedances of lines 39 to 44 are all equal to z2. It also follows that the resistances 45, 46, 48 and 49 are equal to each other (equal to R2). Only resistor 47 has a different value.

 The values of RI, R2 and R3 depend respectively on the impedances between P7 and P8 (or P7 and P9) for RI on the one hand, and P8 (or P9) and Pl to P6 on the other hand for R2 and R3.

 In the device 33, the first stage 34 is of the Wilkinson two-way type. The second stage 35 consists of two couplers with three channels each (different from the device 5 of FIG. 4) separated by the resistors 38 and 47, each of these couplers comprising three lines in star configuration and two balancing resistors.

 It is possible, from these examples with 3.5 and 6 channels, to generalize the structure of the device of the invention for a number m of channels, m being greater than 2 and possibly being even or odd. In the

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 Figures 7 and 8 described below, the impedance transformers have not been shown.

 In FIG. 7, the case for m even has been schematically represented. This general assembly 50 comprises, like all the devices of the invention (for m> 2) two stages 51, 52. The first stage 51 is always of the Wilkinson type. The second stage 52 comprises two identical couplers 53.54 with m / 2 channels each connected to the ends of the resistor R1 of the first stage. These m / 2 channels are in star configuration lines (as in Figure 6), and each of these couplers has at its base ((m / 2) -1) equal balancing resistors between them, and their two resistors d balancing closest to each other (similar to resistors 46 and 48 in FIG. 6) are connected together by a resistor 55.

 Figure 8 relates to the case where m is odd (m3). The device 56 which is represented there also comprises two stages 57,58. The first stage 57 is identical to the stage 51 of FIG. 7. The second stage 58 comprises two identical couplers with (m-1) / 2 channels each. Each of these two couplers has a configuration of star impedance lines z2 (similar to the configuration 23.24 or 27.28 in Figure 5) with at its base (m-3) / 2 balancing resistors (such as resistors 29 and 32 and of value R2. In addition, two lines 61,62 (similar to lines 25,26 in FIG. 5) of impedance Z3 connect the ends of resistance RI (similar to resistance 22) to central point 63 (similar to point P3 in Figure 5), and two balancing resistors 64.65 (of value R3) connect the central balancing resistors (similar to resistors 30 and 31 in Figure 5) at point 63 .

 The device described above with reference to FIGS. 4 to 8, can be used both as a summator and as a divider. In the first case, it can, for example, in a transmitter, perform the summation of the output signals of m amplifiers arranged in parallel. In the second case, it can, from a single input signal, excite in phase and with the same level m amplifiers arranged in parallel.

Claims (2)

 CLAIMS 1-M-channel summator / power divider (m> 2), characterized in that it has two cascaded stages (6.7 or 18.19 or 34.35 or 51.52 or 57.58), the first being of the Wilkinson coupler type with two channels, and the second comprising two identical couplers (53-54,59-60), each of these two couplers comprising m / 2 channels if m is even, or (ml) / 2 channels if m is odd, these channels being each time with star configuration lines (11-24,23-24, 27-28, 39-40-41,42-43-44), the free ends of these lines being connected to each other by ((m / 2) -1) equal balancing resistors (45-46, 48-49) if m is even, and by ((m-3) / 2) balancing resistors equal to each other (29-32), if m is odd, and if, m is even, these two couplers are connected to their base by a balancing resistor (47,55), or, if m is odd, these two couplers are connected to their base by two equal balancing resistors with each other and in se rie (15-16,30-31, 64-65), whose common point (P2 in figure 4, P3 in figure 5, or 63) constitutes the central point of the m tracks, this common point being, moreover, connected each time by a line (12-13,25-26, 61-62) at the ends of the base of the first stage (P5-P6 in figure 4, P7-P8 in figure 5, or ends of Rl in figure 8) .  2-Device according to claim l, characterized in that, for odd m, the two lines (12-13,25, 26,61-62) connecting the ends of the base of the first stage to the common point have an impedance (Z3 ) double that (Z2) of the lines of each coupler, and that said two balancing resistors (15-16,30-31, 64-65) have a value (R3) equal to that (R2) of the resistors balancing of each coupler, this value being a function of the impedance at the input and at the output of each coupler.