FR2785474A1 - Synchronous or asynchronous analogue to digital converter, has comparators connected to interrupters and differential amplifiers - Google Patents

Abstract

The analogue to digital (A/D) converter for n-bit resolution, where n = 4, comprises n comparators (1, 5, 8, 11), n-1 interrupters (2, 6, 9), n-1 differential amplifiers (3, 7, 10) of gain 2, and a power supply (4) for the reference voltage, where the input voltage Vin is less than half the reference voltage Vref. The converter can be operated in synchronous mode by adding a sampling blocking circuit at its input. The input analogue signal is compared to half the reference voltage, which is the maximum value of the input signal Vin. A direct comparison by the comparator (1) of the signal Vin to Vref/2 delivers the high-value bit (BIT3). The interrupter (2) is open or closed depending on the value, which determines the output of the differential amplifier (3), 2Vin or 2(Vin-Vref/2). The output of the differential amplifier (3) is also compared to Vref/2, and the process is continued to the low-value bit (BITO). The converter can be added to a digital circuit at the output of comparator. An INDEPENDENT claim is also included for an analogue/digital converter comprising one comparator, one differential amplifier, two interrupters, and two sampling-blocking circuits, connected for operation in synchronous mode.

Description

 The present invention relates to an asynchronous analog / digital converter that is fast, high precision and compact.

 Currently available analog-to-digital converters are either fast and low resolution, or accurate but very slow. The different methods used to simultaneously obtain these two qualities (accuracy and speed) always result in a greater complexity and bulk, very often impossible to achieve.

 Moreover all these analog / digital converters are synchronous, that is to say they operate with a sampling frequency set by the user, which does not help reduce their consumption.

 The analog / digital converter according to the invention overcomes all these problems by combining speed and accuracy without increasing the complexity of the circuit, while being asynchronous. Indeed, for an n-bit converter, it requires only n comparators, n-1 analog differential amplifiers and n-1 switches. No other element is necessary except for one (and only one) reference voltage, the numerical values being directly available at the output of the n comparators.

Its operation is as follows: the analog wine signal to be converted is compared to half of the reference voltage (the maximum wine value) vref / 2 using the comparator ler. If wine <vref / 2 the output of it goes to 0
(value of its negative power supply), which opens the first switch, thus grounding the input-of the first differential amplifier while its input + is permanently connected to wine, which is therefore found at the output of the differential amplifier. If vin> vref / 2 the comparator output goes to 1 (positive power supply value), thus closing the switch by connecting the input - of the differential amplifier to vref / 2. In both cases the output of the comparator gives the exact value of the bit n (most significant bit) and the signal from the output of the differential amplifier (assumed unity gain) is an n-1 bit signal which normally be compared with vref / 2 ** 2 according to the same technique as before to extract the bit n-1. This is avoided by giving the differential amplifier (and therefore each differential amplifier) a gain equal to 2, which makes it possible to use the same voltage vref / 2. The process is thus repeated until the least significant bit (BIT 0) with the same reference voltage vref / 2.

 All these operations being performed purely analogically, the analog / digital converter according to the invention is very fast and its speed is limited only by the bandwidth of the different analog elements used. Performed in an appropriate technology it can achieve conversion speeds of several tens of MHz or even a few hundred MHz and even more. Moreover, with present and future microelectronic technologies, one can easily obtain accuracies of the order of 20 bits and more while maintaining conversion rates mentioned above. It is clear that this converter is totally asynchronous, that is to say that the conversion takes place only if the analog wine signal has varied by a value greater than its resolution (equal to vref / 2 ** n) .

This avoids the use of internal or external sampling and sampling circuits, and contributes to the reduction of the consumption of the system where it is implanted.

 According to particular embodiments: a sample-and-hold circuit can be added to the input of the analog / digital converter according to the invention in order to make it synchronous.

in order to have an as simple as possible analog / digital converter, it is possible to use the same circuit block (comparator, switch, differential amplifier) to successively obtain the n bits beginning with the most significant bit. The operation is synchronous, with a conversion rate n times lower than that obtained in synchronism with the n blocks in full.

A digital serial / parallel conversion circuit can be added to the output of the analog / digital converter described above.

The accompanying drawings illustrate the invention:
FIG. 1 represents a 4-bit converter according to the invention.

FIG. 2 represents a variant of this same 4-bit converter.

With reference to these drawings, the circuit comprises 4 comparators (1), (5), (8) and (11); 3 switches (2), (6), (9); 3 differential amplifiers (3), (7), (10); and a voltage source (4). The analog signal to be converted is applied to the center + of the differential amplifier (3) and compared to the value vref / 2 of the voltage source (4) by the comparator (1) which outputs the most significant bit ( BIT3).

The differential amplifier (3) outputs either 2 * wine or 2 * (vin-vref / 2) according to the value of BIT3 (which opens or closes the switch (2)). The output of (3) is in turn applied to the + input of (7) and compared in the same way to
(4) thanks to (5) whose output is bit 2 (BIT2). Likewise, the output of (7) is compared to (4) by (8) which outputs bit 1 (BIT1). Finally, the bit 0 (LSB = BITO) is provided by the comparator (11) after comparing the output of (10) with (4).

In the embodiment according to Figure 2, a single comparator (1), a single differential amplifier (3) and two switches (2) and (12) are used. On the other hand, 2 sample-and-hold devices (13) and (14) are necessary. The first (13) samples and holds the analog signal to be converted at the selected sampling frequency fe. During this hold period, the sample-and-hold device (14) samples and holds the signal from the differential amplifier (3) n times (for an n-bit converter). Finally, the switch (12) controlled by a synchronous clock and complementary to that which controls (14) re-injects the signal sampled by (14) to the + input (3). Thus, during the entire maintenance period of (13) the n bits (for an n-bit converter) of the signal sampled by fe will be output in series from the comparator (1), the most significant bit first and the least significant bit. Lastly. It is clear that the two clocks (15) and (17) clocking the two sample-and-hold devices (13) and (14) and the one (16) which controls the switch (12) must absolutely be disjointed
(never at the active level at the same time).

 According to a variant not shown a digital serial / parallel conversion circuit (shift register) can be added to the output of the analog / digital converter described above to obtain a parallel output of the numerical values thus obtained.

 The analog / digital converter according to the invention is particularly intended for broadband applications, high precision and low consumption on the one hand, and systems on chip (microelectronics integration) on the other hand.

Claims (3)

 precision and small footprint, and fully asynchronous characterized in that it comprises, for a resolution of n bits, n comparators ((1), (5), (8) and (11) for the 4-bit version); n-1 switches ((2), (6) and (9) for the 4-bit version); n-1 gain differential amplifiers 2 ((3), (7) and (10) for the 4-bit version); and a reference voltage source (4) of value equal to half of the maximum value of the analog signal to be converted.  1) High speed analog / digital converter 2) A / D converter according to claim 1 characterized in that a sample-and-hold circuit is added to its input to obtain a synchronous operation. 3) Analogue / digital converter according to claim 1 characterized in that it comprises a single comparator  (1), a single differential gain amplifier 2 (3), two switches (2) and (12) and two sample-and-hold devices  (13) and (14), to obtain an arbitrarily high precision at the cost of a proportional reduction in speed, and operating synchronously with a low and constant clutter.  An analog-to-digital converter according to claim 3 characterized by adding a serial / parallel digital conversion circuit to the output of the comparator (1).