FR2767223B1 - INTERCONNECTION METHOD THROUGH SEMICONDUCTOR MATERIAL, AND DEVICE OBTAINED - Google Patents

INTERCONNECTION METHOD THROUGH SEMICONDUCTOR MATERIAL, AND DEVICE OBTAINED

Info

Publication number
FR2767223B1
FR2767223B1 FR9710082A FR9710082A FR2767223B1 FR 2767223 B1 FR2767223 B1 FR 2767223B1 FR 9710082 A FR9710082 A FR 9710082A FR 9710082 A FR9710082 A FR 9710082A FR 2767223 B1 FR2767223 B1 FR 2767223B1
Authority
FR
France
Prior art keywords
semiconductor material
device obtained
interconnection method
interconnection
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9710082A
Other languages
French (fr)
Other versions
FR2767223A1 (en
Inventor
Francois Baleras
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR9710082A priority Critical patent/FR2767223B1/en
Priority to PCT/FR1998/001752 priority patent/WO1999008318A1/en
Publication of FR2767223A1 publication Critical patent/FR2767223A1/en
Application granted granted Critical
Publication of FR2767223B1 publication Critical patent/FR2767223B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR9710082A 1997-08-06 1997-08-06 INTERCONNECTION METHOD THROUGH SEMICONDUCTOR MATERIAL, AND DEVICE OBTAINED Expired - Fee Related FR2767223B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9710082A FR2767223B1 (en) 1997-08-06 1997-08-06 INTERCONNECTION METHOD THROUGH SEMICONDUCTOR MATERIAL, AND DEVICE OBTAINED
PCT/FR1998/001752 WO1999008318A1 (en) 1997-08-06 1998-08-06 Method for producing an interconnection path through a semiconductor material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9710082A FR2767223B1 (en) 1997-08-06 1997-08-06 INTERCONNECTION METHOD THROUGH SEMICONDUCTOR MATERIAL, AND DEVICE OBTAINED

Publications (2)

Publication Number Publication Date
FR2767223A1 FR2767223A1 (en) 1999-02-12
FR2767223B1 true FR2767223B1 (en) 1999-09-17

Family

ID=9510089

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9710082A Expired - Fee Related FR2767223B1 (en) 1997-08-06 1997-08-06 INTERCONNECTION METHOD THROUGH SEMICONDUCTOR MATERIAL, AND DEVICE OBTAINED

Country Status (2)

Country Link
FR (1) FR2767223B1 (en)
WO (1) WO1999008318A1 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7662670B2 (en) 2002-10-30 2010-02-16 Sanyo Electric Co., Ltd. Manufacturing method of semiconductor device
US7719102B2 (en) 2002-06-18 2010-05-18 Sanyo Electric Co., Ltd. Semiconductor device
US7795115B2 (en) 2005-12-28 2010-09-14 Sanyo Electric Co., Ltd. Method of manufacturing semiconductor device
US7919875B2 (en) 2003-08-06 2011-04-05 Sanyo Electric Co., Ltd. Semiconductor device with recess portion over pad electrode
US8105856B2 (en) 2002-04-23 2012-01-31 Semiconductor Components Industries, Llc Method of manufacturing semiconductor device with wiring on side surface thereof

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10056281B4 (en) * 2000-11-14 2006-04-20 Infineon Technologies Ag Electronic component with a semiconductor chip
DE10120408B4 (en) 2001-04-25 2006-02-02 Infineon Technologies Ag Electronic component with a semiconductor chip, electronic assembly of stacked semiconductor chips and method for their production
AU2002323388A1 (en) * 2001-08-24 2003-03-10 Mcnc Research & Development Institute Through-via vertical interconnects, through-via heat sinks and associated fabrication methods
FR2829626A1 (en) * 2001-12-26 2003-03-14 Commissariat Energie Atomique Structure incorporates relief carrying electrical connection formed as shaped layer of first conductive material coated with second conductive material of low resistivity
JP2003289073A (en) 2002-01-22 2003-10-10 Canon Inc Semiconductor device and method of manufacturing semiconductor device
DE10319538B4 (en) 2003-04-30 2008-01-17 Qimonda Ag Semiconductor device and method for producing a semiconductor device
EP1478021B1 (en) * 2003-05-15 2008-07-16 Sanyo Electric Co., Ltd. Semiconductor device and manufacturing method thereof
WO2004109770A2 (en) * 2003-06-05 2004-12-16 Oticon A/S Through wafer via process and amplifier with through wafer via
US7538032B2 (en) * 2005-06-23 2009-05-26 Teledyne Scientific & Imaging, Llc Low temperature method for fabricating high-aspect ratio vias and devices fabricated by said method
US7989915B2 (en) 2006-07-11 2011-08-02 Teledyne Licensing, Llc Vertical electrical device
US7829462B2 (en) 2007-05-03 2010-11-09 Teledyne Licensing, Llc Through-wafer vias
US8187972B2 (en) 2008-07-01 2012-05-29 Teledyne Scientific & Imaging, Llc Through-substrate vias with polymer fill and method of fabricating same
US8088667B2 (en) 2008-11-05 2012-01-03 Teledyne Scientific & Imaging, Llc Method of fabricating vertical capacitors in through-substrate vias

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59222954A (en) * 1983-06-01 1984-12-14 Hitachi Ltd Laminated semiconductor integrated circuit and manufacture therrof
FR2637151A1 (en) * 1988-09-29 1990-03-30 Commissariat Energie Atomique METHOD OF MAKING ELECTRICAL CONNECTIONS THROUGH A SUBSTRATE
US5482894A (en) * 1994-08-23 1996-01-09 Texas Instruments Incorporated Method of fabricating a self-aligned contact using organic dielectric materials
US5541567A (en) * 1994-10-17 1996-07-30 International Business Machines Corporation Coaxial vias in an electronic substrate
WO1996013062A1 (en) * 1994-10-19 1996-05-02 Ceram Incorporated Apparatus and method of manufacturing stacked wafer array

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8105856B2 (en) 2002-04-23 2012-01-31 Semiconductor Components Industries, Llc Method of manufacturing semiconductor device with wiring on side surface thereof
US7719102B2 (en) 2002-06-18 2010-05-18 Sanyo Electric Co., Ltd. Semiconductor device
US7662670B2 (en) 2002-10-30 2010-02-16 Sanyo Electric Co., Ltd. Manufacturing method of semiconductor device
US7919875B2 (en) 2003-08-06 2011-04-05 Sanyo Electric Co., Ltd. Semiconductor device with recess portion over pad electrode
US7795115B2 (en) 2005-12-28 2010-09-14 Sanyo Electric Co., Ltd. Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
FR2767223A1 (en) 1999-02-12
WO1999008318A1 (en) 1999-02-18

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Legal Events

Date Code Title Description
CL Concession to grant licenses
ST Notification of lapse