FR2725095A1 - Switching device for ATM system - Google Patents

Abstract

The device includes use of cells which have a header containing two identifiers for a control and virtual circuit and a data field containing a number of binary words. The input cells are produced by an optical network connected to at least one terminal with data in one cell having a common destination. A marker memory (62) contains data in at least one line with a number of segments. Each line is associated with a distinct terminal. Each segment has a first field containing a line address (ADL) for a first memory (61) and a second field containing a binary word row (ROL) for the address. A reader (64) reads the identifiers in the header of the input cell and addressing (63) is performed for a given binary word in the input cell.

Description

 Binary word switching device contained in cells of the composite ATM type, and ATM access node comprising such a device.

 The field of the invention is that of asynchronous transfer mode (ATM) data transport in the form of cells.

 More specifically, the invention relates to a bitword switching device contained in particular ATM cells, namely composite ATM cells. The invention also relates to an ATM access node comprising such a bit word switching device.

 Today there are mainly two types of network: synchronous mode reals (historically designed and developed first) and asynchronous mode networks (ATM mode).

 In ATM mode, resources are organized into data units called cells. These cells, which possess a fixed and short structure, follow each other without absolute tension. The identification of the communication channel is indeed pocce by the cell itself, in a header. Therefore, a source can emit cells at its own rate, without direct reference to the communication network to which it is connected. It is then possible, in principle, to transmit any bit rate in a channel, and therefore in particular to offer broadband service (Broad Band Service in English).

 In synchronous mode, several channels are grouped on multiples organized in recurring frames. Each frame is divided into time intervals, the recurrence of a given time interval allowing the transmission of data from the same synchronous channel.

 Generally, asynchronous networks do not allow end-to-end switching to all user terminals. Networks in asynchronous mode must therefore be connected to a distribution network in synchronous mode.

 For this purpose, adaptation gateways for connecting a synchronous mode network to an asynchronous mode network (that is, transforming frames into cells, and vice versa) have been designed. But these bridges are often complex and have fairly low yields.

 A new generation of asynchronous networks, allowing end-to-end switching, is provided to avoid connection to a synchronous mode distribution network. In other words, in the future networks in asynchronous mode, each user terminal is connected to an optical network terminal in which the information generated by the user terminal is directly formats in cells.

 However, this "pure ATM" technique (end-to-end) is not always perfectly appropriate, notably because of excessive cellization delays vis-à-vis the crossing time standards (Q 551 of the CENT). ). For example, if the user terminal has a low data transmission rate, the cellization delay (i.e., the cell fill time) in the optical reed terminal is very high; which is not acceptable. It is therefore appropriate in some cases to adapt the "pure" ATM technique.

 An alternative to the "pure ATM" technique consists in connecting several user terminals to the same optical network terminal. Each of the so-called composite cells generated by such a shared optical network terminal then comprises binary words (usually bytes) from different user terminals.

 With such an alternative, the binary words contained in the same composite cell can have different destinations. It is therefore appropriate, in a downstream switching section, to group these binary words differently, according to their destination.

 The general principle of such a bitword switching device appeared in EP 0609137. However, unlike the invention discussed in the present application, this document of the state of the art does not disclose under any circumstances a technical embodiment of such a bit word switching device.

 The object of the invention is therefore to provide a device for talising and switching binary words contained in composite ATM cells.

This goal, as well as others that will appear later, are achieved according to
The invention by means of a switching device, to output cells, of binary words contained in input cells, each of said cells being of the composite ATM type and consisting of a part of a header, containing in particular two identifiers of a virtual path and a circuit respectively, and on the other hand an information field, containing a plurality of binary words, said input cells being generated by at least one optical network terminal to which at least one user terminal is connected, the set of binary words contained in the information field of the same input cell coming from at least one user terminal, the set binary words contained in the information field of the same output cell having a common destination, said device comprising ::
a first memory for forming said output cells, each line of which
is intended to receive the binary words of one of said output cells;
a second marking memory containing switching information
stored as at least one line consisting of a plurality of dc
slices, each line being associated with a separate optical network terminal,
each of said slices comprising on the one hand a first field, containing
a line address of the first memory, and secondly a second field,
containing a bit word rank in the line whose address is contained in
said first field;
means for reading said identifiers of the header of an input cell
received; ;
addressing means, for a given binary word of said input cell
stored:
* of the line or lines of the second memory, depending on the
read identifiers, so that said addressed line of the second
the memory with which the optical network terminal is associated, from which
is derived from said received input cell;
* one of the slices of the said addressed line of the second memory, e "
a function of the rank of said given bit word in said received input cell;
means for writing, in the first memory, a given binary word of
said input cell received at said line address and said bit word rank
contained in the first and second fields of said slice addressed for said
given binary word;
reading means of said first memory line by line, so as to
obtain said output cells.

 The invention thus offers a solution to a new problem, namely to switch binary words (for example, bytes) inside cells according to the destination of these binary words. In other words, it is not a question here of switching cells but binary words contained in cells.

 Advantageously, said device comprises a binary word number counter, making it possible to supply said rank of the given binary word in the received input cell, said binary word number counter being initialized each time a new input cell is received.

 Preferentially, each of said user terminals is connected to said optical network terminal by an n × 64 kbit / s channel, with n variable according to said user terminal.

 Advantageously, said first output cell forming memory consists of two sub-memories used alternatively in write mode and in read mode: when said means for writing a given binary word write in one of said sub-memories memories, said line-by-line reading means read the other of said sub-memories.

 Thus, while cells are being assembled in one memory, previously assembled cells are evacuated from the other sub-rack.

In an advantageous embodiment of the invention, the binary words originating from the one or more user terminals being, before being distributed in the said input cells, organized in frames each consisting of N time slots, each interval of time capable of carrying a binary word, each user terminal being associated with at least one of said time slots,
each input cell carrying the number of the frame from which the binary words contained in its information field originate,
said device comprising means for detecting milking changes, by reading and comparing the frame numbers carried by the input cells successively received,
and the writing and reading modes of said sub-memories being alternated when said detection means detect a change of frame.

 Preferably, said binary words are bytes, for example of one or more successive frames of 125 gs.

The invention also relates to an access node in ATM mode, of the type comprising in particular a cell switching network, with n inputs and m outputs, for switching an incoming cell of any one of said inputs to one any of said m outputs,
said access node comprising a bit word switching device according to the invention, said bit word switching device being placed between said cell switching network and said one or more optical network terminals, so that the composite cells which output from said bitword switching device and arrive in said cell switching network contain binary words all having the same destination.

 Thus, the outputs of the byte switching device are connected to at least some of the inputs of the cell switching network. The other inputs (if any) from the cell switching network may receive conventional ATM connections or outputs from another bit-word switching device.

It should be noted that the outputs of the cell switching network can support connected to several types of connection, and in particular composite ATM connections, synchronous connections (PCM for example) via gateways (of the type
IWU for example), or conventional ATM connections (if some of the cell switch network entries themselves receive conventional ATM connections).

Other features and advantages of the invention will appear on reading the following description of a preferred embodiment of the invention, given by way of indicative and nonlimiting example, and the appended drawings, in which:
Figure 1 shows a block diagram of an example of interconnection
networks via an ATM access node according to
the invention;
Figure 2 schematically represents an example of distribution of words
bits of a frame in a composite cell;
FIG. 3 shows an exemplary embodiment of the access node
of Figure 1 ;;
Figures 4 and 5 show each, in the direction respectively
down and up, an example of a connection string between a
asynchronous distribution network and a synchronous network, through a
access node of the type shown in Figure 3; and
FIG. 6 shows an exemplary embodiment of the device for
byte switching appearing in Figure 5.

 As illustrated in FIG. 1, the function of an access node 1 in ATM mode is to interconnect a distribution network 2 to various local networks 3 to 6, such as, for example, a synchronous network (Transmic 3, Numeris 4) or an asynchronous network (ATM standard 5, ATM composite 6). The access node 1 is therefore a connection node of user terminals 7 through a distribution network 2.

The invention relates to the case where the distribution network 2 is of the type
In the example shown in FIG. 1, the user terminals 7 are connected to optical network terminals 8 (or ONUs, for Optical Network Units in English), themselves connected to the access node 1 by a passive optical network 9 (Passive Optical
Network in Anglo-Saxon).

Optical network terminals can be connected:
either to a single user terminal 7; in this case, the network terminal
8 is for example placed in the user and the link is called "up to
the house "(Fiber to the Home in Anglosaxon),
either at several user terminals 7; in this case, the network terminal
optical 8 is for example placed in a building and the connection is said
"up to the building" (Fiber to the Building in Anglo-Saxon).

 Each optical network terminal 8 transmits cells on the passive optical network 9, to the access node 1.

 In the downstream direction, that is to say towards the optical network terminals 8, the access node transmits standard or composite ATM cells that are broadcast to all the optical network terminals 8.

In the uplink direction, that is to say towards the access node, the optical network terminals 8, whether they are connected to one or more user terminals 7, emit standard or composite ATM cells,
An ATM cell (standard or composite) here consists of a 5-byte header and an information field of 48 bytes. The header includes two identifiers, namely:
a Virtual Path Identifier (VPI) for Virtual Path Identifier
Anglo-Saxon); and
a virtual circuit identifier (VCI) for Virtual Circuit Identifier
in Anglo-Saxon).

 Thus, each cell contains in its header a VP / VC pair characterizing the asynchronous connection on which it is conveyed.

 In a standard ATM cell, the octets of the information field can not come from or go to a single user terminal. In an ATM cell c, the bytes of the information field can come from or go to several user terminals. FIG. 2 shows an example of composite cell 21, with its ente 22 and its information field 23.

 Each user terminal is for example connected to the optical network terminal by a channel at n x 64 kbit / s, and thus generates n bytes every 125 lls.

 Each user terminal thus provides, with a period of 125 lls, the equivalent of a frame divided into N time slots and in which only n time slots (with n SN) contain a byte generated by the terminal of user.

 A technique for constructing composite cells in an optical network terminal consists, for example, of grouping in the information field of a composite cell the bytes received from the different user terminals during the duration of a frame (for example 125 pus ).

In order to increase the filling rate of the information field, the duration taken into account can be long, for example several successive frames (for example px
125 Rs, with p = 1, 2 or 4). We then speak of multiframes of order p.

In the example of Figure 2, there is shown a composite cell 21 genéec all 125 g frames by an optical network terminal which are connected 4 user terminals. The information field 23 of this composite cell 21 contains in particular:
2 bytes 24 from a first user terminal through a first channel at 2 x 64 kbitls;
6 bytes 25 from a second user terminal through a second channel at 6x64kbitls;
1 byte 26 from a third user terminal across a
third channel at 1 x 64 bits;
3 bytes 27 from a fourth user terminal across a
fourth channel at 3 x 64 kbit / s.

 In general, the position of the bytes from the different user terminals is established by signaling between the access node and these user terminals.

 In order to ensure the respect of the "frame sequentiality" of the bytes coming from different user terminals, each cell carries the number of the frame during which the bytes of the nx 64 kbitls channels coming from the different user terminals are placed in its field of information.

 This frame number is for example placed in the first byte 28 of the information field 23 (see FIG. 2). In this case, the 7 most significant bits of this first byte 28 may contain the modulo frame number 128, the least significant bit being a parity bit of the previous 7 bits.

FIG. 3 shows an exemplary embodiment of an access node 1 of the type discussed above in relation with FIG. 1. In this example, the access node notably comprises:
a cell switching network 31, associated with means 35 of
control and auxiliary means 36 signaling;
a PCM / ATM gateway 32 (of the IWU type for example);
network interfaces 33; and
optical line terminations 34.

 Optical Line Terminations (or OLTs for Optical Line Tcrminal in Anglosaxon) play an interface role between the passive optical networks 9 and the "distribution-network-side" endetries of the cell switching network 31.

The network interfaces 33 adapt the inputs / outputs "local network side" of the cell switching network 31 to different types of links, namely, for example, a PCM link 37 (Pulsed and Encoded Multiplexing) via the gateway.
MIC / ATM 32, a standard ATM link 38, and a composite ATM link 39.

The cell switching network 31 makes it possible to switch a cell from any one of its inputs / outputs "on the distribution network side" to any one of its inputs / outputs "local network side". This switching is done according to the
VPI and VCI contained in the cell header.

We now present, in the downward direction (see FIG. 4) and then in the upstream direction (see FIG. 5), an example of a connection chain between an asynchronous dis-ributioei network 2 and a synchronous local area network 3, through a node. 1 of the type shown in Figure 3. In each direction, there is shown the path followed by a byte and the information on the switching taking place in the gateway
MIC / ATM 32, Optical Line Termination (OLT) 34, and Optical Network Terminal (ONU) 8.

 In the downstream direction (see FIG. 4), the byte considered is firstly identified, in the synchronous local network, by the number k of the PCM channel which carries it in a frame and by the number x of the interval time occupied by this byte in the frame of the MIC channel number k.

In the PCM / ATM gateway 32, the byte in question is extracted from the PCM frame and placed at row b of the information field of a cell characterized by a pair (VP = kj; VC = m). This switching is shown schematically in the referenced window
AT.

 According to the indication of the VP, the cell containing the byte in question is directed from ltentrée / output k "local network side" to the input / output i "side distribution network" of the cell switching network 31.

Then the cell containing the byte considered passes through the descending part 35 of the OLT (i) associated with the input / output i, before being broadcast to all the ONUs connected to it.
OLT (i).

 In the ONU (m), with which the subscriber terminal abo (t) is connected to which the byte in question is intended, the byte in question is extracted from the cell (VP = k, i; VC = m) and placed in the number x time interval of the frame associated with the subscriber terminal concerned abo (t). This switching is shown schematically in the window referenced B.

 In the uplink direction (cf FIG. 5), the byte considered is a byte generated by a subscriber terminal abo (t) and conveyed up to the ONU (m) in a time interval number n of a frame . This byte is therefore first identified by the number m of the ONT and the number n of the time interval that it occupies in the frame from the subscriber terruinal abo (t) that generated it.

 In the ONT (m), the considered byte is placed at the rank b of the information field of a composite cell characterized by a pair (VP = m; VC = a). This commination is schematically represented in the window referenced C. It should be noted that the other bytes placed in the information field of this composite cell (VP = m; VC = a) come from the other user terminals connected to the UN (m). Consequently, these other bytes may or may not have different destinations from that of the byte in question. Thus, if the byte in question is intended for the MIC channel number k, some of the other bytes are for example intended for a PCM channel number. 1, with 1 ek, or to an asynchronous path of a standard or composite ATM LAN.

 This composite cell (input cell) arrives in the upstream portion 36 of the OLT (i) to which the ONT (m) is connected. This rising portion 36 comprises a device 37 according to the invention for switching octets contained in composite ATM cells.

 In this device 37, the byte considered, as well as other bytes having the same destination, are grouped together in a same new composite cell (output cell) characterized by a pair (VP = i, j; VC = r). The byte considered occupies for example k rank c of the information field of this new composite cell. This switching is shown schematically in the window referenced D.

 According to the indication of the VP, the new composite cell containing the byte in question is directed from the input / output i "distribution-side" to the input (outputj "local network side" of the cell switching network 31.

 Then, in the PCM / ATM gateway 32, the byte in question is extracted from the new composite cell (VP = i, j, VC = r) and placed in the number-x time slot of a frame conveyed by the channel. MIC number k, in the synchronous local area network. This commutation is shown schematically in the window referenced E.

FIG. 6 shows an exemplary embodiment of the byte switching device 37 appearing in FIG. 5. In this particular embodiment, the device 37 comprises:
a first memory 61 for forming the output cells;
a second marking memory 62 containing information of
switching;
a counter 65 of byte number;
means 64 for reading the identifiers of the in-t2tt of a cell
received entry;
addressing means 63, for a given byte of the input cell
received, of a line and a slice of the second memory 62, according to
VP and VC identifiers read ;;
means (not shown) for writing, in the first memory 61,
a given byte of the received input cell;
means (not shown) for reading the first memory 61.

 Each line of the first output cell forming memory 61 is for receiving the bytes of a separate output cell.

 The switching information is stored in the second marking memory 62 in the form of lines each consisting of a plurality of slices.

Each line is associated with a separate optical network terminal (ONU) 8 Each of the slots comprises on the one hand a first field, containing an ADLMI line address of the first memory 61, and on the other hand a second field, containing a byte rank
ROLMI in the line whose address is contained in the first field.

For a given byte of the received input cell, the addressing means 63 therefore address:
a line of the second memory 62, so that this addressed line of
the second memory 62 is the one to which the ONT is associated, whence
comes from the input cell received;
a slice (and consequently a couple (ADLML, ROLMs) of the line
addressed from the second memory 62, according to the rank ROC of the byte
given in the input cell received.

 Indeed, there is a predetermined relationship between the ROC rank of the bytes in the input composite cells and the user terminals from which these bytes originate. In other words, the position of a byte in a cell is directly a function of the user terminal from which it comes.

 The principle of byte switching performed by the device of the invention is as follows: each byte of an arrival cell is placed in a line of the first memory 61 and at a row ROLMI of this line which are function the destination of the byte (the destination itself being deduced from the knowledge of the UN usaguet terminal from which the octet originates).

 The switching information, that is to say the pairs (ADLM1, ROLM1), are chosen so that on the same line of the first memory 61 are placed only bytes having a common destination.

 One can also cleverly choose the number of bytes of each line of the first memory 61 equal to the number N of bytes that can be placed in the information field of a cell (for example, N = 47, if the field d information can contain 48 bytes and if one byte is reserved for the frame number). Thus, the reading of a line then directly provides all the bytes to be placed in the information field of the same output cell.

 In the particular embodiment shown in FIG. 6, the addressing means 63 consist of a label register 68 and a label compression memory 69.

 The operation of the particular embodiment of the device 37 of the invention shown in Figure 6 is now explained in more detail.

 a) The byte number counter 65 is initialized by a cell synchronization signal 66 upon receipt of a new composite ATM input cell 67.

b) The bytes of the header of the input cell 67, containing the indicators
VP / VC, are identified by the value of the counter 65. The VPlVC indicators are then read and loaded into the label register 68.

c) The label register 68 addresses the label compression memory 69 which makes it possible to pass from the 2 n values allowed by the VP / VC indicators (with n <23, for example) to the No line address values that comprise the second memory 62 marking. The number Ne corresponds to the maximum number of different ATM connections that can be established on the user side (i.e., the maximum number of ONUs that can be connected to the byte switching device 37). One can also take the binary Neb number of the form Neb = 2P immediately superior to Ne. The number
Does not depend on the ATM link bit rate entering the device 37. Thus, for example, for an ATM link bit rate: D = 622.08 Mbit / s, a frame rate: T = 125 Rs, and a size of cell: C = 53 bytes = 424 bits, we have: Ne = (DT) / C = 183, and
Neb = 256. In the case of a multiframe of order p> 1, the values of T and Ne are multiplied by p.

 d) The label compression memory 69 delivers a value X which addresses a line LM2, a of the second marking memory 62 (which comprises at least N lines).

 e) As the input cell 67 enters the switching device 37, the byte number counter 65 identifies the successive bytes of its information field, taking CNO values = 6 to 48 (the CNO values = 1 to 5 corresponding to the header, and the CNO value = 6 corresponding to the frame number). The CNO value of the byte number counter 65 indicates the ROC rank of each successive byte in the received input cell.

f) At the arrival of the byte Z of the input cell 67, which is placed in a current byte register 612, the content (CNO = Z) of the byte number counter 65 reads the number slot Z in the address line X of the second marking memory 62 (line characterizing the VP / VC indicators of the input cell 67). This Z-number slice contains:
in a first field, an ADLMI line address of the first
memory 61, and
in a second field, a rank of ROLMI byte, in the line of which
the address ADLMI is contained in the first field.

 g) The Z byte is written in the first memory 61, in the line and byte rank indicated in the Z number slot of the address line X of the second memory 62.

 h) When all the input cells having the same frame number have been received, the first memory 61 can be read line by line. Since each line corresponds to a separate output cell, byte switching is actually performed.

 Each line of the first memory 61 is for example sent, after reading, to an output cell forming and transmitting circuit, which places this line of bytes in the information field of a cell. The frame number associated with the bytes of this line is also written in the information field. Finally, a new one in adequacy is associated with the information field.

 As shown in FIG. 6, the first memory 61 may consist of two sub-memories 610, 611 used alternately in write mode and in read mode: while the writing means write in a sub-memory in order to assembling output cells, the line-by-line reading means read the other sub-memory to evacuate the previously assembled output cells.

 The writing and reading modes of the sub-memories 610, 611 are for example alternated with each change of frame. The switching device 37 comprises means for detecting frame changes, by reading and comparing the frame numbers conveyed by the input cells (number generally placed in the first octet of the information field). Indeed, when the frame number read in an incoming cell is different from the number read in the previous arrival cells, it is that all the cells carrying bytes from the previous frame have been received.

Each sub-memory 610, 611 has a number of lines equal, at most, to the number Ns of output cells that the outgoing ATM link can trareeerter during a frame duration. The number Ns depends on the outgoing ATM link bit rate, as
Does not depend on the rate of the incoming ATM link (see explanation above).

 The device 37 described above is intended to be placed in the rising portion 36 of an optical line termination (OLT) 34 of an access node 1 in ATMo mode 11 is however clear that it can easily be adapted to many other applications, without departing from the scope of the invention. In general, the device of the invention can be implemented in all cases where it is a question of switching bytes contained in composite ATM cells.

Claims (7)

 obtain said output cells.  means for reading said first memory (61) line by line, so as to  addressed for said given bit word;  binary (ROL) contained in the first and second fields of said slice (Z)  said input cell received at said line address (ADL) and said word rank  means for writing, in the first memory (61), a given binary word of  rank function of said given bit word in said received input cell;  * one of the slices (Z) of the addressed line of the second memory (62), in  is derived from said received input cell;  the memory with which the optical network terminal is associated, from which  read identifiers, so that said addressed line of the second  * of one or more lines (X) of the second memory (62), depending on the  received:  addressing means (63) for a given binary word of said input cell  received entry;  means (64) for reading said identifiers of the header of a cell  in the line whose address is contained in said first field;  (61), and secondly a second field, containing a bit word rank (ROL)  first field, containing a line address (ADL) of the first memory  (UN (m), 8), each of these bands comprising on the one hand a  plurality of slices, each line being associated with an optical network terminal  switching stored in the form of at least one line consisting of  a second marking memory (62) containing information of  line is intended to receive the binary words of one of said sotie cells;  a first memory (61) for forming said output cells, each of which  A device for switching, to output cells, binary words contained in input cells, each of said cells being of the composite ATM type and consisting on the one hand of a header (22) , in particular containing two identifiers of a virtual path and circuit respectively, and on the other hand an information field (23) containing a plurality of binary words, said input cells being generated by at least an optical network terminal (ONU (m), 8) to which at least one user terminal (7, abo (t)) is connected, the set of binary words contained in the information field of a same cell input from at least one user terminal, the set of binary words contained in the information field of the same output cell having a common destination, characterized in that it comprises: 2. Device according to claim 1, characterized in that it comprises a binary word number counter (65), for providing said rank of the given binary word in the received input cell, said binary word number counter being initialized each time a new input cell is received. 3. Device according to any one of claims 1 and 2, characterized in that each of said user terminals (7, abo (t)) is connected to said optical network terminal (ONU (m), 8) by a channel at nx 64 kbit / s, with n variable according to said user terminal. 4. Device according to any one of claims 1 to 3, characterized in that said first memory (61) for forming the output cells consists of two sub-memories (610, 611) alternately used in write mode and in reading mode. when said writing means of a given binary word write in one of said sub-memories, said line-by-line reading means read the other of said sub-memories. 5. Device according to claim 4, the binary words originating from said user terminal (s) 7, abo (t)) being, before being distributed in said input cells, organized in frames each consisting of N time slots. each time slot being able to carry a binary word, each user terminal being associated with at least one of said time slots,  each input cell carrying the number of the frame from which the binary words contained in its information field originate,  characterized in that it comprises means (613) for detecting frame changes, by reading and comparing the frame numbers carried by the input cells successively received,  and in that the write and read modes of said sub-memories are alternated when said detection means (613) detects a frame change. 6. Device according to any one of claims 1 to 5, characterized in that said binary words are bytes. 7. An ATM access node (1), of the type comprising in particular a cell switching network (31), with n inputs and m outputs, for switching = one an incoming cell of any one of said n inputs to any one of these m kinds'  characterized in that it comprises a bit word switching device (37) according to any one of claims 1 to 6, said bit word switching device being placed between said cell switching network (31) and k or said optical network terminals (ONU (m), 8), so that the composite cells that exit said bit-word switching device and arrive in said cell switching network contain binary words all having the same destination.