FR2719947A1 - Automatic test routine for batteries used for standby power - Google Patents

Abstract

A simulated cut in the supply voltage (Vsect) is carried out every seven days in order to test the operation of an accumulator which is intended to provide a backup supply. At the same time as the supply voltage cut is effected, a load is switched on to the terminals of the accumulator (9). The charge of the accumulator is then measured by comparison with a reference. Faults are recorded and displayed (LED-1 & LED-2). At the end of eleven weeks and six days the charge on the accumulator is monitored for 24 hours. If no power cut is detected in this time, the accumulator is discharged for one hour and any faults recorded. Any faults detected may be transmitted to a remote station.

Description

The present invention relates to an automatic method for maintaining an accumulator used in floating operation
The invention also relates to an automatic device for maintaining an accumulator used in floating mode implementing the method.

 It applies in particular to security devices.

 In the context of the present invention, the term "floating operation" should be understood to mean an operation of the accumulator according to which it is traversed by a permanent charge-holding current.

 The term "accumulator" should be understood in its broadest acceptance: it includes in particular electric batteries and all organs of this type providing electric energy and electrically rechargeable.

In the current technique for safety equipment, it is common to use accumulators ensuring their operation in the event of a failure of the mains supply. There are numerous alarms, lighting, back-up power and
The accumulators making up the emergency power source. although intended to be used in bonding operation still require periodic maintenance. This maintenance consists irually in discharging the accumulator followed by a full charge of the latter. Most often, these maintenance are carried out only during actual use or by forced operation by the user.

 In all cases, the means used do not allow a truly periodic maintenance and, unless tedious control, do not indicate the capacity of the accumulators to respond to their functions.

 The present invention aims to respond to this problem, by carrying out effectively periodic preventive maintenance and not entailing the impossibility of using the device during the recharging time of the accumulator.

 It also makes it possible to ensure, before maintenance, that the battery has been charged correctly and, if necessary, to postpone the maintenance date.

 Finally, it makes it possible to verify that the accumulator meets the needs of the use and, if necessary, informs the user, by feedback to a central point and individually on each device, of the poor state of the accumulator.

The subject of the invention is therefore a method of maintaining at least one accumulator used in floating operation by supplying said accumulator with the aid of a permanent maintenance current derived from a main electrical energy source. , characterized in that it comprises at least the following steps
- the generation of a first repetitive signal defining time intervals of a first duration,
- carrying out a first series of operations consisting, at the end of each of these time intervals of a first duration, in
- the simulation of a cut off of said voltage source
main, for a fixed period equal to a first
value,
- the detection of said simulated interruption of the voltage source
main,
- switching a load across the accumulator, on
detection of said simulated outage,
- load measurement by comparison with a value of
reference,
- and the recording of any load faults when the value
measured differs from a predetermined deviation;
the generation of second and third repetitive signals defining time intervals of a second duration and of a third duration, the second duration being greater than said first duration, said third duration being greater than the second duration and the difference between the third and second durations defining a time interval of a fourth duration;
- carrying out a second series of operations consisting, at the end of each of these time intervals of said second duration, in
- monitoring the battery charge during said
time interval equal to the fourth duration,
- and the recording of cut-off detections from said source of
main electrical energy for a period of time
greater than a second determined value;
- carrying out a third series of operations consisting, at the end of each of these time intervals of said third duration, if no detection of interruption of said main source, in
- switching a load across the accumulator
for a period of time equal to a third value
predetermined,
- measurement of charoe by comparison with a value of
reference, during said period of time equal to the second
predetermined value,
- recording of load faults when the measured value
differs from a predetermined deviation,
- monitoring the decommutation of the load of the terminals
the accumulator during the cycle time period at said
third predetermined value
- and the recording of this decommutation.

 The invention also relates to a device for implementing this process, characterized in that said main source of electrical energy is a voltage source connected to the mains, in that said accumulator is supplied with current by the intermediate of a current regulator and in that means for simulating the interruption of the main electric power source are interposed, in cascade, between said current receiver and a main electric power source.

 The invention finally relates to the application of such a device to a security device.

The invention will be better understood and other characteristics and advantages will appear on reading the description which follows with reference to the appended figures, and among which
- Figure 1 is a block diagram schematically illustrating an exemplary embodiment of an automatic device for maintaining an accumulator used in floating mode, according to a preferred embodiment of the invention;
- Figure 2 explains the architecture of clock and management circuits used in the device of Figure 1;
- Figure 3 is a timing diagram illustrating various clock and time base signals generated by the circuits of Figure 2;
- Figures 4 to S illustrate in detail the electrical circuits making up the main modules of the device according to the invention.

 We will first describe an automatic device for maintaining an accumulator used in floating mode, according to a preferred embodiment of the invention. This description will serve as a support for explaining the method according to the invention.

 Figure 1 is a block diagram of the circuits making up the device of the invention. In the illustrated example, which can in no way be considered as limiting the scope of the invention, the main component is the module referenced 2, which will be called in the following "management module and time bases ". Its various functions will be detailed and explained below. This module is advantageously produced according to the so-called "ASIC" technology (from the Anglo-Saxon "Application Specific Integrated Circuit"), that is to say from an integrated circuit personalized to the needs of the user. This module, in reality, as suggested, has two subsets with distinct functions. The first subset consists of time bases, generating clock signals whose characteristics will be detailed below. The second subset includes several circuits necessary for managing the ispositt according to the specificities of the invention.

 The DC voltage supply V d is conventionally obtained by a module 1 comprising, in particular. a transformer transformer 10 and a rectifier bridge 11. The primary transformer 10 is supplied from the AC mains Vsect. This voltage is lowered and rectified by the diode bridge 1 1 or any other rectifying means. The power supply module can naturally include other conventional members such as fuses, filter capacitors, etc., well known to those skilled in the art and which need not be detailed.

In normal mode, the accumulator 9 is supplied with a permanent charge holding current using a module A, charge regulator. The voltage at the terminals of the accumulator is equal to Vbat According to one of the characteristics of the invention, an additional module 3 is arranged between the DC voltage supply module 1 and the charge regulator 4. This module 3, controlled by a signal Vsim, generated by module 2, of management and time bases, has the function of simulating a disappearance of the mains voltage Vsect A real disappearance of the mains voltage Vsect results in the fall of the voltage
Vd, a simulated disappearance will result in the fallout of the voltage V'd. On the other hand, in normal mode the voltage V'd, at the output of the power supply disappearance simulation module is very substantially equal to the input voltage, ie Vd.

 In parallel on the accumulator, and more precisely between the positive pole and the ground in the example illustrated in FIG. 1, a load 5 is placed in cascade with a module 7, charge switch.

 Two other modules are near a module 6, network power cut detector, and a module S. logic switch, the respective operations of which will be detailed below. The other functions, in the embodiment described in FIG. 1. are integrated in the "management" part of module 1.

 FIG. 2 illustrates the general architecture of this module and its division into two series of functionally distinct circuits.

 As indicated above, the first subset 20 is essentially constituted by clocks or time bases and, more precisely, according to the preferred embodiment of the invention, by five series of clocks or time. A conventional quartz circuit (not shown) generates a reference clock signal H, for example a clock signal of frequency 32 kHz. The purpose of these five clock circuits is to generate clock signal trains of precise characteristics, necessary for the proper functioning of the various circuits making up the device according to the invention. To fix ideas, without this being limiting in anything that is the scope of the invention, we will assume in what follows that oné.atl3n d periodic maintenance of the accumulator must be performed every 12 weeks.

 The circuits constituting these clocks and time bases are conventional and do not need to be detailed further. They can be made on the basis of meters and dividers. They were therefore not explicitly represented.

A first clock generates, by division and from the clock signal
H, a clock signal H6 of frequency 64 Hz. This signal, distributed to all the sequential circuits constituting the module 2. and in particular to the management circuits 21 which will be explained below, serves as a time reference.

 A second clock divides this signal H6 X so as to generate a clock signal H2 of frequency 2 Hz.

 A third clock further divides this signal H2 so as to generate repetitive pulses 116 to 16 seconds.

 A fourth clock divides the signal 116 so as to generate pulses I6J and I7J, at 6 days and 7 days, respectively.

 Finally, a fifth clock divides the I7J signal so as to generate two additional pulses, Il lS6J and I12sX at 11 weeks and 6 days, and 12 weeks, respectively.

 For specific needs, functions of the technology precisely employed, other clock and time base signals are generated but are not essential for a good understanding of the intention.

 In the foregoing, the term “clock signals” should be understood to mean periodic signals with a cyclic ratio 1/2, taking logical values "0" and "1". The upper part of FIG. 3 illustrates such a signal, for example the signal 112. The pulses are recurrent signals, of durations equal to 1764 seconds in the example illustrated. The lower part of FIG. 3 illustrates such a pulse, for example the pulse I16 which is repeated every 16 seconds. The pulses are synchronized on the rising edges of the clock signals or the pulses from which they are derived.

The clock and time base circuits 21 include an eRnçz reset input The reset signal Snit (FIG. 1) transmitted to this eRAz input can be generated simply by a push button, with manual action,
K1 (Figure 1) or by similar means electronic switch, etc. It is this action which will determine the beginning of the counts and, thereby, the initialization of the 12 weeks after which the periodic maintenance operation will be performed automatically.

 The circuits 20 also include an ems input intended to receive an inhibition signal Sn3I which acts on the last clock (generation of the signals Il lS6J and I12S) in the manner which will be explained below.

 The circuits of the management sub-assembly 21 are in turn divided into seven main sub-modules which are illustrated diagrammatically in FIG. 4.

In this FIG. 4, only the connections essential for a good understanding of the invention have been shown. In particular, most of the clock signals and pulses have not been shown, to simplify the figure. The sub-modules are produced using combinational logic gates or conventional sequential elements: counters, registers, flip-flops, etc.

 A first sub-module, referenced 210, has the function of determining whether the accumulator 9 has been correctly charged during the 24 hours preceding a discharge operation thereof. To do this, this circuit receives in particular the IIIS6J clock pulses, that is to say the pulse delivered at 11 weeks and 6 days.

 A second sub-module 211 is intended to initiate the discharge of the accumulator 9 by switching and effective paralleling of the load 5 on this accumulator 9. The charge is controlled by a third sub-module 212.

 A fourth sub-module 213 comprises a counter which can record up to twice a fault in the charging of the accumulator 9 during the 24 hours preceding the discharge. If the number of faults exceeds two, this submodule takes the decision to discharge the accumulator 9, even if the charge is not respected, which means that the term "floating operation" is no longer appropriate.

 A fifth sub-module, referenced 214, launches the charge and discharge control of the accumulator 9 in the case where a signal 5sect is in the logic state "1" and a signal Stel in the logic state " 1 "more than three seconds. The signal Ssect is derived from the voltage V'd (Figure 1). I1 means that the mains voltage Vsect is present. The 5tel signal is a remote control signal from outside the module 2.

 A sixth sub-module, referenced 215, records the possible charging and discharging faults of the accumulator 9. I1 generates the signals SL1, SL2 and 5out 'at output if the signal 5sect is present. The signals SL1 and SL2 feed light-emitting diodes LED1 and LED, (Figure 1), respectively, which serve as indicators. Conventional combinatorial logic means use the clock signals 112 to make these -ox ants flash.

 A Seff signal allows these three signals to drop. This signal can be generated simply by a push-button K2 (figure 1), with manual action, or by any other conventional means: electronic switch, etc.

 A seventh module, consisting simply of a logic gate "OR" combines output signals from modules 211 and 212, Ssim1 and Ssim2 respectively, as well as the signal Sjmt into a single output signal Ssim, "OR" logic of these three signals.

If we refer again to FIG. 1, the module 3, as shown in more detail in FIG. 5, comprises a first transistor
PNP T30 whose emitter-collector circuit is arranged in series between the output of the DC power supply module 1 and the regulator module 4. The emitter of transistor T30 is at potential Vd, while its collector is at potential V ' d.

A second PNP transistor T31 is arranged in parallel on the emitter-base circuit of the first transistor T30, the base being connected to ground by a resistor R33. The base of the second transistor P \ 1'P T31 is connected to its emitter by a resistor R31 and a circuit comprising, in series a resistor R32 and the collector-emitter circuit of an NPN transistor T32, connects the base of the transistor T31 to ground . The base of transistor T32 is attacked by a signal Ssim. When the latter signal is in logic state "0", the various components of the module 3 which has just been described in detail are determined so that the transistor T30 is saturated. This transistor is crossed by the charge current of the accumulator 9, that is to say by the charge holding current. The transistor T3O being saturated, the voltage V'd is substantially equal to the voltage N ..

 On the other hand, when the signal Ssim is at logic "1", the same components are determined so that the transistor T30 is blocked. This action simulates the disappearance of the mains voltage, because the voltage V'd drops. The signal Ssim is generated by the management circuits 21, and more precisely by one or the other of the sub-modules 211 or 212. Ssim1 or Ssimz, or also by the signal Si "it (logic" OR "function): output of sub-module 216 (logic" Olf "gate).

 We thus obtain a simulation of the disappearance of the mains voltage. This simulation is taken into account by the module 6 mains interruption detector. The signal Sises (voltage V'd) is also transmitted to the management circuits 21, more precisely to the circuits 914 and 215.

 Naturally, the circuits which have just been described constitute only one example among other possible circuits which can be implemented to perform the function of sector disappearance simulation.

FIG. 6 illustrates, for its by an exemplary embodiment of circuits usable for producing the module 4, for regulating the charging current of the accumulator 9. It comprises a circuit comprising, in series, a PNP transistor
T40, a lamp L and a diode D4. This circuit is arranged between the module 3 for simulating the disappearance of the mains voltage (potential Nnd) and the positive pole of the accumulator 9 (potential Vèat). The base of this transistor T40 is polarized by a potentiometric bridge of resistors: R40 and R41. The common point is connected to the base. The other end of the resistor R40 is connected to the potential V'd and the other end of the resistor R41 to a potential determined by a signal SCOmp In normal mode, the transistor T40 is saturated, the load current then passes through the lamp L and diode D1 (polarized in the forward direction). Diode D4 is a non-return diode. The filament type lamp L serves as a regulating charge for the accumulator 9, in a conventional manner. It also serves as a display member, or charging light, indicating that the accumulator is actually crossed by a charge holding current. The signal SCOn, p keeps the transistor T40 saturated as long as the load 5 is in good condition. In the case of a faulty load, the transistor T40 is blocked, its base being drawn at the potential V'd by the resistance Ro. At the same time, the indicator L goes off, which thus signals the malfunction of the load.

 However, blocking the transistor T40 does not suspend the charge of the accumulator 9. In fact, a PN transistor T42, in series with a charoe resistor R3, is put in parallel on the circuit [transistor Tx0-lamp Ldiode D]. The base of this transistor T42 is controlled by the collector potential of a third transistor T41, also of NPN type. The collector thereof is connected, via a resistor R43, to the potential V 'd. Its transmitter is connected to ground.

A resistor R42 is arranged between the point common to the lamp L and to the diode D1, on the one hand, and the base of the transistor T4 ,, on the other hand. The blocking of the transistor T40 causes the conduction of the transistor T42, via the transistor T41, which blocks, allowing the resistor R43 to drain the base current of the transistor T12. The charging current of the accumulator 9 now flows through the circuit [R., - T12]
Module 6, as noted. used to detect a cut in the supply voltage \ 75nit. In reality. this module 6 detects the fallout of the voltage Vend. An example of a circuit that can be used to make this module is illustrated in Figure 7.

 It comprises a first transistor N'PN T60 receiving on its base the signal Ssect (that is to say V'd). The collector of this transistor is on the base by a feedback resistance R60 and drives the base of a second N transistor T61 via a resistor R61. The emitters of these two transistors are directly connected to ground. The collector of transistor T61 directly attacks the base of an additional transistor T62, of PNP type. The emitter of this transistor T62 is supplied by the voltage Vbat. In the collector circuit, there is a resistor R62 in series with a "RC" type differentiator circuit, ie a resistor R63 in parallel with a capacitor C60, connected to ground. The common point between the two resistors is looped back to the collector of the first transistor T60. This also receives the Stol signal.

The components constituting this circuit are determined so that it functions as a "RS" type flip-flop, with the particularity that this flip-flop has two inputs "S ''and" R "(" Set "and" Reset " according to Anglo-Saxon terminology, that is to say set to "logical 1" and logical "0", respectively) in common and an authorization input ("Enable", according to Anglo-Saxon terminology). follows, for reasons of simplicity, we will call this flip-flop circuit "RS"
The authorization input receives the signal Ssect (V'd). The flip-flop "RS" is blocked when this signal is "high", whatever the state of the signals transmitted to the inputs "Set" and "Reset" The output of the flip-flop is at logic 'O'. When the signal \ ''d drops again, a command pulse S Om is generated, the output of the flip-flop goes to logic state "1" and waits for a "Reset" or "Enable" signal to go to logic state "O"
The "Reset" signal can be generated either by the line carrying the Stel signal, or by the voltage drop of the accumulator. Indeed, the supply voltage of module 6 is supplied by the accumulator or Nàt.

 The transition to the logic "1" state of the flip-flop causes the switching of the load 5 on the accumulator 9. This switching is carried out by means of the module 7, charging switch.

 It can simply be constituted by an S7PN transistor whose emitter is connected to ground and the collector is connected to the load 5. The base is controlled by the signal SCOm generated by the module 6.

 The steps of the method according to the invention will now be explained.

In autonomous mode of operation, the sequence of a sequence is as follows
A first series of steps concerns the verification of the state of charge. It takes place every seven days. in the example illustrated, this in particular using the clock signal I, J.

The circuits of module 2, and in particular the clocks and time bases of circuits 20, are initialized. To do this, a signal Si t produced by the pusher
K1 is transmitted to the eRp input, z The clocks and time bases start their counting cycles, dividing the frequency H produced by the crystal (figure 2), and generate the various signals and clock pulses which have been recalled previously , in relation to the description of Figure 2.

 After a period of 7 days, the sub-module 213, receiving the pulse I7J, transmits it (I117) to the sub-module 212 which generates a Siml signal simulating the interruption of the mains supply. In response to this signal, the flip-flop 212 generates a 5sima signal. The logic "OR" module 216 then delivers a signal Ssim which is transmitted to the module 5, as explained. The drop in voltage V'd causes the flip-flop "RS" of the module 6 for detecting a mains voltage failure to go to logic state "I" and, consequently, the delivery of a control pulse SCOm and switching the load 5, by the action of the load switching module 7.

 The collector-emitter voltage of the switching transistor, an essential component of this module 7, varies as a function of the collector current. We will thus be able to proceed to a step of comparing this voltage with a reference, which makes it possible to indirectly measure the current passing through the load. This step is carried out using the sub-module 212 which receives the signal Scomp. This sub-module can compare, in a conventional manner, the amplitude of the signal SCOmp with a reference value and determine if the load 5 is in good condition.

 In the event that the latter is in default, a signal SdefaUtlZ generated by the sub-module 212 is transmitted to the sub-module 215 which records a fault. This fault is displayed by the SL1 and SOUt signals, if the 5sect signal is present.

 After these steps of analyzing the state of the load, the signal Ssim returns to the logic "0" state and the device operates again in normal mode.

 The charge check takes place every seven days in the same way.

 Still in the example described, after 11 weeks and 6 days, the sub-module 210 monitors the charge of the battery 9 for a period of 24 hours. To do this, it receives the signal scdn from the module 6 sector interruption detector. This monitoring is initialized by the arrival of the I1lS6J pulse. A transition to logic "0" at signal S due for more than 16 seconds is detected by the sub-module 210 and recorded by the sub-module 213. To this end. the clock signal 116 is used. A signal 5default2 is generated by the sub-module 210.

The module 210 includes counters for calculating. from the clock signals received said 24 hour period. At the end of this 24-hour monitoring period, if a fault has been recorded by the module 213, it reposition the clock generating the 111S6J pulse to the value 11 weeks by delivering a Ciis signal transmitted to this clock. This action effectively prohibits the discharge of the accumulator 9 which must take place at 12 weeks.

 During two of these consecutive periods, the sub-module 210 can record a fault during each of these periods, that is to say interruptions of the network supply. During the third of these same periods, if a fault appears, the recording will be inhibited and the fault ignored. To this end, a signal S3def is generated by the sub-module 213 and transmitted to the sub-module 210.

In the event that no fault has been recorded during the aforementioned period, the submodule 213 initiates a step of discharging the accumulator 9, via the submodule 211 to which it is connected. To do this, it generates a control signal S213. The latter positions, for one hour, the signal Ssiml at logic "1". In turn, the module 216 (logic "OR" gate) delivers a signal 5sirs to the logic "I", which simulates a cut in the mains voltage, but above all actuates the module 3.

 It follows that the module 6, mains cut-off detector, delivers the switching command signal Scom. The module 7 then switches and places the charge 5 in parallel on the accumulator 9, which initiates a discharge cycle the duration of which is one hour.

During the one hour period, the sub-module 215 monitors the state of the output of the flip-flop "RS" of module 6. In the case where this flip-flop goes to logic "0" during this hour, the sub-module 215 records this passage and generates SL2 and Sout signals indicative of this state. The light-emitting diode LED2 is then energized. This means that the accumulator 9 no longer has sufficient capacity to fulfill the function for which it is intended. The 5out signal can advantageously be transmitted to a remote monitoring point, via an input terminal, 1 bTELEC output (Figure 1)
The charge and discharge control cycle can also be started from external information. To do this, an additional module 8 has been provided, called a switch module in the figure.

 Figure S illustrates a possible embodiment of the circuits making up such a module. It includes a first NSS Tso transistor. The base of this transistor is connected to ground by a first resistor Rsl and receives, via a second resistor R80, the signal SOUt passing through the output terminal, output bLEc.

The collector of this transistor is charged by a third resistor R82 and the basic circuit of a PNP transistor T81 whose emitter is connected to a bias voltage, for example +5 V, and the collector delivers the transmitted Stel signal, in particular in sub-module 214 (FIG. 3). This generates on its output a signal
S214 initialization of the submodule 213, if the sector is present (signal SseCt)
When a signal 5out of a determined value is applied, for example + 9V, the transistor T80 becomes saturated and causes the saturation of the transistor Ts1.

The signal 5tel transmitted to the sub-module 214 goes to logic "1". This sub-module 214 transmits, after having received the signal 5tel for more than 3 seconds, this information to the sub-module 213 which causes the charge and discharge of the accumulator 9 to be controlled.

 Finally, after carrying out the maintenance operation, that is to say under normal conditions after 12 weeks, the clocks and time bases of the sub-assembly 20 are reset. A reset signal SR12S is generated by the sub-module 215 and transmitted to the sub-assembly 21.

 It can be seen from the description which lives of being made of it, that the method and the device according to the invention fulfill the aims which it had set itself.

 The fact that, in a preferred embodiment, the device is designed essentially on the basis of an integrated circuit of the so-called "ASIC" type makes it possible to integrate the functions of remote reporting of the result of the charge and discharge control accumulators 9.

 In addition, the load control system is a reliable and economical means of detecting whether an element is defective, in particular if several elements are placed in parallel.

 Finally, the fact of shifting the time of discharge of the accumulators, if they have not been charged, has the advantage of avoiding false information and a subsequent verification to confine the results provided by the automatic system.

 It should be clear that the invention is not limited only to the examples of embodiments precisely described, in particular in relation to FIGS. 1 to 7.

 In particular, the types of circuits used emerge from a simple technological choice within the reach of SIetier Man. Although particularly advantageous for carrying out most of the fns Dns useful or necessary for the device according to the invention, the "ASIC" composing the module 7 could be replaced by discrete circuits or on the contrary by another type of integrated circuit.

 The time intervals considered and the resulting clock signals naturally depend on the precise type of accumulators used and / or on the standards governing these applications. They have only been given to fix ideas and can in no way limit the scope of the assessment.

 Finally, for reasons related in particular to standards governing security devices, the number and exact arrangement of the LEDs or display devices can be adapted and differ from what has been described, in a concrete embodiment, without going outside. of the scope of the invention.

Claims (14)

 1. Method for maintaining at least one accumulator (9) used in floating mode by supplying said accumulator (9) with the aid of a permanent maintenance current derived from a main electrical energy source (I), characterized in that it comprises at least the following steps  - the generation of a first repetitive signal (I7J) defining time intervals of a first duration,  - carrying out a first series of operations consisting, at the end of each of these time intervals of a first duration, in  - the simulation of a cut off of said voltage source  main (1), for a fixed period equal to a first  value,  - the detection of said simulated interruption of the voltage source  main (1),  - switching of a load (5) across the accumulator  (9), upon detection of said simulated outage,  - the measurement of the load (5) by comparison with a value of  reference,  - and the recording of load faults (5) when the value  measured differs from a predetermined deviation;  the generation of second (111s6J) and third (I12S) repetitive signals defining time intervals of a second duration and of a third duration, the second duration being greater than said first duration, said third duration being greater than the second duration and the difference between the third and second durations defining a time interval of a fourth duration;  - carrying out a second series of operations consisting, at the end of each of these time intervals of said second duration, in  - monitoring the charge of the accumulator (9) during said  time interval equal to the fourth duration,  - and recording of cutoff detections from said source  main electrical energy (1) for a period of time  greater than a second determined value;  - carrying out a third series of operations consisting, at the end of each of these time intervals of said third duration, if no detection of interruption of said main source (1),  - switching of a load (5) across the accumulator  (9) for a period of time equal to a third value  predetermined,  - the measurement of the load (5) by comparison with a value of  reference, during said period of time equal to the second  predetermined value,  - recording of load faults (5) when the value  measured differs from a predetermined deviation,  - monitoring the decommutation of the load (5) of the terminals  from the accumulator (9) during the cycle time period to said  third predetermined value,  - and the recording of this decommutation.  2. Method according to claim 1, characterized in that, at the end of said second series of operations, when the detection of interruption of said main source of electrical energy (1) recorded exists during said fourth duration, said third series of operations is inhibited and said second repetitive signal (I11S6J) is repositioned to a value defining a time interval equal to said third duration minus said first duration.  3. Method according to claim 2, characterized in that, when the recorded cut-off detections of said main electrical energy source (1) exist during a number of said fourth durations greater than a determined value, the recording of these detections cutoff is inhibited and said third series of operations performed.  4. Method according to any one of claims 1 to 3 characterized in that said first duration is equal to one week, said second duration is equal to eleven weeks and six days and the third duration is equal to twelve weeks; and in that said second determined value is equal to sixteen seconds and said third determined value is equal to one hour.  5. Method according to any one of claims 1 to 4, characterized in that said fault recording consists in the activation of at least one display member (LED1, LED2).  6. Method according to any one of claims 1 to 5, characterized in that said recording comprises the generation of a signal (Sout) transmitted to a remote monitoring point.  7. Method according to any one of claims 1 to 5, characterized in that the initialization of said steps of the method is carried out by the emission of a signal from a remote monitoring point.  8. Device for implementing the method according to any one of claims 1 to 7, characterized in that said main source of electrical energy (1) is a voltage source connected to the mains (Vsect), in that said accumulator (9) is supplied with current by means of a current regulator (4) and in that means (3) for simulating the interruption of the main electrical energy source (I) are interposed, in cascade, between said current regulator (4) and the main source of electrical energy (1).  9. Device according to claim 8, characterized in that it comprises means (6) for detecting cuts in the mains voltage by means of the measurement of the output voltage (V'd) of the means (3) cutoff simulation, these means delivering (6) control signals (SCOm) on detection of said mains voltage cuts.  10. Device according to claim 9, characterized in that it comprises means (7) for switching a load (5) making it possible to connect this load (5) in parallel to said accumulator (9) and in that these load switching means (7) (5) are activated by said means (6) for detecting mains voltage cuts.  11. Device according to claim 10, characterized in that it comprises at least clock and time base circuits (20) delivering said repetitive signals (I7J, ls6J, 112s)  12. Device according to claim 10, characterized in that it further comprises management circuits (21) comprising means (Sinit) for initializing said series of operations, means (210) for detecting mains voltage cuts , means (213) for counting said cuts, means (212) for monitoring the state of the load (5) by comparison with a reference, means (215) for recording and displaying the detected faults of the capacity of said accumulator (9) generating fault display and alarm signals (SLIP SL2, Sub) means (211, 216) of discharge control of said accumulator (9) generating a discharge control signal (Ssjm); these means being under the control of said repetitive clock signals.  13. Device according to any one of claims 8 to 12, characterized in that it further comprises means (eTELEC, 8) for remote controlling said series of operations from a remote station.  14. Security device characterized in that it comprises a device according to any one of claims 8 to 13.