FR2718288B1 - Circuit comprising NAND logic circuitry and method for defining logic combinations in such a circuit. - Google Patents

Circuit comprising NAND logic circuitry and method for defining logic combinations in such a circuit.

Info

Publication number
FR2718288B1
FR2718288B1 FR9403833A FR9403833A FR2718288B1 FR 2718288 B1 FR2718288 B1 FR 2718288B1 FR 9403833 A FR9403833 A FR 9403833A FR 9403833 A FR9403833 A FR 9403833A FR 2718288 B1 FR2718288 B1 FR 2718288B1
Authority
FR
France
Prior art keywords
circuit
defining
combinations
logic
nand
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9403833A
Other languages
French (fr)
Other versions
FR2718288A1 (en
Inventor
De Ferron Gerard Silvestre
Jean-Marie Bernard Gaultier
Jacqueline Dechaux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9403833A priority Critical patent/FR2718288B1/en
Publication of FR2718288A1 publication Critical patent/FR2718288A1/en
Application granted granted Critical
Publication of FR2718288B1 publication Critical patent/FR2718288B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
FR9403833A 1994-03-31 1994-03-31 Circuit comprising NAND logic circuitry and method for defining logic combinations in such a circuit. Expired - Fee Related FR2718288B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9403833A FR2718288B1 (en) 1994-03-31 1994-03-31 Circuit comprising NAND logic circuitry and method for defining logic combinations in such a circuit.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9403833A FR2718288B1 (en) 1994-03-31 1994-03-31 Circuit comprising NAND logic circuitry and method for defining logic combinations in such a circuit.

Publications (2)

Publication Number Publication Date
FR2718288A1 FR2718288A1 (en) 1995-10-06
FR2718288B1 true FR2718288B1 (en) 1996-06-07

Family

ID=9461639

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9403833A Expired - Fee Related FR2718288B1 (en) 1994-03-31 1994-03-31 Circuit comprising NAND logic circuitry and method for defining logic combinations in such a circuit.

Country Status (1)

Country Link
FR (1) FR2718288B1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5843905B2 (en) * 1979-07-31 1983-09-29 富士通株式会社 Manufacturing method of semiconductor integrated circuit
US4476478A (en) * 1980-04-24 1984-10-09 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor read only memory and method of making the same
JPS6027230A (en) * 1983-07-25 1985-02-12 Nippon Telegr & Teleph Corp <Ntt> Programmable logical array circuit
JPH084110B2 (en) * 1985-03-30 1996-01-17 株式会社日立製作所 Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
FR2718288A1 (en) 1995-10-06

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20061130