FR2712710B1 - Procédé de description de chronogramme et dispositif permettant la mise en Óoeuvre du procédé. - Google Patents

Procédé de description de chronogramme et dispositif permettant la mise en Óoeuvre du procédé.

Info

Publication number
FR2712710B1
FR2712710B1 FR9313827A FR9313827A FR2712710B1 FR 2712710 B1 FR2712710 B1 FR 2712710B1 FR 9313827 A FR9313827 A FR 9313827A FR 9313827 A FR9313827 A FR 9313827A FR 2712710 B1 FR2712710 B1 FR 2712710B1
Authority
FR
France
Prior art keywords
describing
implemented
timing diagram
device allowing
allowing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR9313827A
Other languages
English (en)
Other versions
FR2712710A1 (fr
Inventor
Goff Bernard Le
Jean-Eric Pin
Antoine Christian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Priority to FR9313827A priority Critical patent/FR2712710B1/fr
Publication of FR2712710A1 publication Critical patent/FR2712710A1/fr
Application granted granted Critical
Publication of FR2712710B1 publication Critical patent/FR2712710B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/3312—Timing analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Digital Computer Display Output (AREA)
FR9313827A 1993-11-19 1993-11-19 Procédé de description de chronogramme et dispositif permettant la mise en Óoeuvre du procédé. Expired - Lifetime FR2712710B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9313827A FR2712710B1 (fr) 1993-11-19 1993-11-19 Procédé de description de chronogramme et dispositif permettant la mise en Óoeuvre du procédé.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9313827A FR2712710B1 (fr) 1993-11-19 1993-11-19 Procédé de description de chronogramme et dispositif permettant la mise en Óoeuvre du procédé.

Publications (2)

Publication Number Publication Date
FR2712710A1 FR2712710A1 (fr) 1995-05-24
FR2712710B1 true FR2712710B1 (fr) 1995-12-22

Family

ID=9453020

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9313827A Expired - Lifetime FR2712710B1 (fr) 1993-11-19 1993-11-19 Procédé de description de chronogramme et dispositif permettant la mise en Óoeuvre du procédé.

Country Status (1)

Country Link
FR (1) FR2712710B1 (fr)

Also Published As

Publication number Publication date
FR2712710A1 (fr) 1995-05-24

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