FR2706700B1 - Device and method for processing two input signals. - Google Patents
Device and method for processing two input signals.Info
- Publication number
- FR2706700B1 FR2706700B1 FR9407211A FR9407211A FR2706700B1 FR 2706700 B1 FR2706700 B1 FR 2706700B1 FR 9407211 A FR9407211 A FR 9407211A FR 9407211 A FR9407211 A FR 9407211A FR 2706700 B1 FR2706700 B1 FR 2706700B1
- Authority
- FR
- France
- Prior art keywords
- processing
- input signals
- signals
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/10—Combined modulation, e.g. rate modulation and amplitude modulation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9312377A GB9312377D0 (en) | 1993-06-16 | 1993-06-16 | Signal processing |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2706700A1 FR2706700A1 (en) | 1994-12-23 |
FR2706700B1 true FR2706700B1 (en) | 1996-07-12 |
Family
ID=10737234
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9407211A Expired - Lifetime FR2706700B1 (en) | 1993-06-16 | 1994-06-09 | Device and method for processing two input signals. |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE4420302A1 (en) |
FR (1) | FR2706700B1 (en) |
GB (2) | GB9312377D0 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE29619746U1 (en) * | 1996-11-13 | 1997-01-09 | Hella Kg Hueck & Co | Circuit arrangement for generating a pulse width modulated signal |
DE19733382A1 (en) * | 1997-08-01 | 1999-02-04 | Fahrzeugklimaregelung Gmbh | Circuit generating PWM energising signals for clocked power end stage |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5922441A (en) * | 1982-07-28 | 1984-02-04 | Hitachi Ltd | Pulse width modulation circuit and digital output type integrating circuit using it |
DE3372419D1 (en) * | 1983-03-11 | 1987-08-13 | Fuss Fritz Kg | Circuitry for the transmission of voltage signals |
US4775841A (en) * | 1986-06-03 | 1988-10-04 | Trofimenkoff F N | Voltage to frequency conversion circuit with a pulse width to period ratio proportional to input voltage |
GB2247123B (en) * | 1987-10-28 | 1992-07-01 | Burr Brown Corp | Duty cycle modulator circuit |
JPH0632477B2 (en) * | 1988-01-25 | 1994-04-27 | 松下電器産業株式会社 | Signal transmission method |
-
1993
- 1993-06-16 GB GB9312377A patent/GB9312377D0/en active Pending
-
1994
- 1994-05-23 GB GB9410194A patent/GB2279193B/en not_active Expired - Fee Related
- 1994-06-09 FR FR9407211A patent/FR2706700B1/en not_active Expired - Lifetime
- 1994-06-10 DE DE19944420302 patent/DE4420302A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
FR2706700A1 (en) | 1994-12-23 |
DE4420302A1 (en) | 1994-12-22 |
GB2279193B (en) | 1997-12-17 |
GB2279193A (en) | 1994-12-21 |
GB9410194D0 (en) | 1994-07-06 |
GB9312377D0 (en) | 1993-07-28 |
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