FR2694674A1 - Test method for adequate functioning of compressed bit rate video coder-decoder - using test signal of digital image giving non-zero transform coeffts. to examine all norms, and monitoring with line spy or decoder - Google Patents

Abstract

The test method involves treating a digital image in blocks, each comprising luminance and chrominance signal samples, by applying non-zero discrete cosine transformation (DCT) coeffts. in the two dimensions to each block, or to the differences between blocks. The video coder is forced to use successively all the norms of bit rate compression concerned with compression management, including all vector movements, quantum steps, and bit rate reduction norms. The test signal may be inserted into a video signal, and the coder output is observed by a line spy which verifies that the number of bits created by the coding is correct, and analyses the coded data in deferred time. Alternatively the frame suppression line is used, and a decoder checks that the digital sum of the decoded signal is correct. ADVANTAGE - Guarantees quality of transmission at reduced bit rate, checks norms, gives objective assessment of picture.

Description

Method for testing an encoder / decoder
bitrate compression video, and device
for its implementation.

 The invention relates to the field of image compression and more particularly relates to a method for testing the proper functioning and compliance with the standard of a bit rate compression video coder / decoder and a device for its implementation. in action.

 Monitoring the quality of links is a constant concern of network operators.

 It is known to use test lines in the blanking intervals to allow the operator to monitor the quality of the links by checking whether the conventional quality criteria defined by the standards (noise, linearity for analog signals, error rates for digital links) are satisfied.

 However, these criteria are insufficient when the image is transmitted by means of a speed reduction coder / decoder because the coder / decoder then becomes a determining element of the quality of the transmitted image. Indeed, the principle of the bitrate reduction carried out by the coder in order to transmit the image results in a degradation of the latter, and this degradation depends on the image at the input of the coder. The quality of the image transmission can only be assessed subjectively; however, there is no objective method for determining the quality of an image.

 The classic procedure for estimating the quality of an encoder / decoder therefore consists in collecting the judgment of various people on a certain number of critical images. This cumbersome procedure is only implemented during the development of the standard. In fact, only full compliance with the standard is a quality criterion of an encoder / decoder.

 In order to ensure the quality of an encoder / decoder, the invention therefore relates to a method for testing its operation and its compliance with the bit rate reduction standard used.

According to the invention, a method for testing the proper functioning and compliance with the standard of a bit rate compression video coder / decoder, processing a digital image, by blocks composed of the luminance and chrominance samples, this processing being applied directly to these blocks or to block differences, in which case a motion vector is transmitted to indicate the displacement between the two constituent blocks of this difference (one of these blocks being known to the coder and the decoder), this processing consisting in addition to applying to each block or block difference, a discrete cosine transformation making it possible to pass into the frequency plane, then to quantify and code the transformed coefficients of each block, is characterized in that it consists
to apply to the input of the coder a test signal corresponding to a digital image or part of a image, chosen so as to show non-zero coefficients distributed in the two directions of the frequency plane over the whole of the transformed block
- to force the encoder to use successively to encode the test signal all the possibilities provided for by the bit rate compression standard concerned and the choice of which is solely up to the freedom of the encoder (all operating modes, motion vectors and steps quantifications) by means of a coding management device
- To observe the information at the output of the coder via a device called "line spy", or at the output of the decoder.

 This process applies equally well to all compression algorithms using a cosine transform, in sub-bands or not when the coder has many degrees of freedom, and that its partial use necessarily results in a reduction in the quality of the signal transport while remaining in accordance with the syntax provided for in the recommendation.

The invention will be better understood and other characteristics will appear from the following description with reference to the appended figures
- Figure 1 shows an example of a block chosen to constitute the test signal.

FIG. 2 represents the connection of the so-called "line spy" device on the transmission line,
- Figure 3 illustrates an embodiment of the device called "line spy".

 As indicated above, the test method according to the invention consists in applying a test signal to the input of the encoder.

 This test signal corresponds to a digital image part. A digital image can be represented, for example, by a luminance signal Y, a blue chrominance signal C B and a red chrominance signal CR.

 The coder / decoder processes the image in rectangular blocks of 8 lines composed of 8 samples for each of the three components Y, C R and CB. In fact this treatment can be applied either to blocks Y, C R and C B directly (intratrame mode), or to the difference between the current block and a previous block chosen so as to minimize this difference (interframe and interimage modes). In general, this processing essentially consists in applying to each block the discrete cosine transformation (TCD), then in quantifying and coding the transformed coefficients.

The TCD makes it possible to pass from the spatial plane to a frequency plane in which the value of a coefficient of coordinates (u, v) corresponds to the energy concentrated at this frequency (u, v) in the initial spatial plane. In the case where it is the differences between blocks which are coded, a motion vector is transmitted in order to indicate the position of the previous block which has been chosen, relative to that of the current block. To limit the amount of information to be transmitted which would result therefrom, a single motion vector is commonly assigned for a set of blocks called "macroblocks". A macroblock consists of two adjacent 8 x 8 luminance blocks - and blue chrominance and red chrominance blocks located in the same place.

 This operating principle, which we have just described by way of example, corresponds to that of CCIR recommendation 723. But with a few variations, it remains valid for other standards.

 In the following description, we will consider an encoder / decoder conforming to this CCIR recommendation 723.

 As we said above, the method according to the invention consists in applying a test signal to the input of the coder.

However, it is not possible to apply an image or part of a test image known in advance to analyze the result of the coding at the output of the coder. In fact, the bit rate compression standards very precisely specify the operation of the decoder, but leave many degrees of freedom at the level of the encoder. Knowing an image at the input of the encoder, it is not possible to predict it at its output.

 This is why the test method according to the invention consists in applying a test signal to the input of the encoder, then in forcing at the level of the encoder all the operating modes provided for by the bit rate reduction standard used (intra-frame modes , interframe or interimage for example), with all possible motion vectors and all possible quantization steps.

 It is essential to guarantee the quality of an image transmitted by means of an encoder / decoder with rate reduction, that all the operating modes provided for by the concerned standard are exhaustively tested. Indeed, an encoder which uses only some of these modes would be compatible with the standard but it would provide lower image quality.

 According to CCIR recommendation 723, and in order to be able to process the motion vectors, the test signal chosen is therefore a reference macroblock. This macroblock is chosen so as to describe a maximum of possible frequency configurations.

That is to say that one seeks to make non-zero coefficients appear distributed in the two directions of the frequency plane over the whole of the transformed block.

 The reference macroblock, represented in FIG. 1, is for example constituted as follows: The luminance coefficients are equal to a value a on the whole of the block Y 16 x 8 except for the upper left sub-block of size 4 x 4 whose coefficients will have a different value b. Similarly for each of the chrominance blocks respectively block CB and block CR, the coefficients of the upper left sub-block of size 2 x 4, will have a different value, respectively d and f, from that of the other coefficients of the block, respectively c and e.

 On the other hand, according to this method, the manufacturer must provide a device to force the encoder to successively use all the operating modes, all the motion vectors and all the quantization steps provided for by the standard concerned, to code the test signal. . This coding management is carried out by a microprocessor for example.

 Note that this does not entail any additional cost for the manufacturer since it necessarily has an equivalent device on each piece of equipment, so that it can check its operation at the end of manufacture.

 If the coder / decoder effectively transmits the test signal and codes it correctly for all the configurations provided for by the standard, then it fully complies with this standard because it is impossible for the coder to have in memory all the test configurations to simulate some. coding.

 The invention provides two modes of operation. In a first operating mode, the digital test signal is inserted into the useful video signal. In this case, the equipment cannot simultaneously transmit the video signal for operational purposes. This operating mode is only used to check compliance with the standard, and during maintenance, to check that the encoder or decoder is working properly.

 In a second mode of operation, the digital test signal is confined in part of the frame blanking intervals of the video signal, so as not to affect the coding of the useful video. This operating mode is used to permanently check, during operation, that the circuits are working properly.

 Two modes of operation of the test signal corresponding to the two modes of operation are set out below.

 According to a first operating mode, the test signal is analyzed by a device called "line spy" 2 mounted between the video coder 1 and the video decoder 3, as indicated in FIG. 2.

In order to avoid any mismatch on the transmission line, the line spy 2 and the video decoder 3 cannot be connected in parallel. This is why, in an embodiment of the line spy represented in FIG. 3, the signal from the encoder is decoded by an input interface il to obtain a composite signal consisting of the digital data coded in NRZ and of the clock, which is then on the one hand analyzed as explained below, on the other hand regenerated by a signal regenerator circuit 12 to be transmitted to the video decoder. For example, at 34 Mbps, according to the recommendation
G703 from CCITT, the signal presented at this interface is a coded signal of HDB3 type.

 For analysis, the composite signal, data plus clock, is transmitted to a detector 13 and to a demultiplexer 14. The detector 13 identifies the start of each transmission frame by periodically detecting the frame synchronization pattern for controlling the demultiplexer 14 which demultiplexes the different components of the television signal. The output of the demultiplexer 14 is connected to a corrector 15 at the output of which the possibly corrected compressed video signal is therefore available.

 To understand the line spy device, the syntax corresponding to the CCIR 723 recommendation must be briefly described.

 According to the CCIR 723 recommendation, the television picture is described using a synchronization pattern making it possible to locate in the coded signal the start of each picture followed by the information corresponding to the coding of groups of eight television lines. . Each group of eight lines can be identified in the signal coded by a synchronization pattern followed by a number, the quantization step used for coding the macroblocks relating to the corresponding group of eight lines and then the description of the different macroblocks.

 For each macroblock, the information corresponding to the coding mode used is transmitted, possibly followed by the motion vector when the chosen mode requires it, and then the information resulting from the coding of the different blocks of the macroblock is transmitted. For the test pattern, the method according to the invention consists in adding a specific block line to the description of the test pattern in order to be able to locate it easily in the data stream corresponding to the compressed video.

This constraint is not annoying in terms of bit rate because this block line consists of only one macroblock per frame while there are 810 in the useful part of the image.

 The possibly corrected compressed video signal is therefore supplied to a detector 17 and to a memory 16. The detector 17 identifies the synchronization pattern corresponding to the test signal in order to isolate this test signal from the stream of compressed video data.

 This synchronization pattern consists of a series of binary elements not reproduced in any juxtaposition of the code words used during the coding operation.

However, this property is only guaranteed in the case of an error-free transmission. Two treatments are carried out to get rid of any errors. On the one hand, the corrector 15 performs an error correction on the compressed video signal using the redundancy provided for this purpose by the coder. On the other hand, the test signal available at the output of the detector 17 is transmitted to a checking circuit 18 which verifies that all the block line numbers which are transmitted behind the synchronization pattern, are linked correctly.

 If this is the case, the recording phase is triggered by the verifier 18: when the line number corresponds to the test pattern, the verifier 18 transmits, via the command input of a flip-flop 19, the other of which input is connected to the output of the detector 17, an order to record the compressed video signal from the corrector 15.

 During the recording phase, the output of flip-flop 19 is coupled to the addressing input of memory 16 via a counter 20, the output of which is connected to an input of a multiplexer 21. The signal input of the memory 16 is connected to the output of the corrector 15.

 The recording order is therefore transmitted by the checker 18 to the flip-flop 19. It results in the incrementation of the counter 20, the order to count being maintained by the flip-flop 19 since the detection of the synchronization pattern corresponding to the signal until the next synchronization pattern is detected by the detector 17.

 The counter 20 then addresses the memory 16 via the multiplexer 21 and the compressed video signal coming from the corrector 15 is recorded in the memory 16.

 The role of the multiplexer 21 is to pass from the recording phase described above to the phase of analysis of the content of the memory 16 by a microprocessor 22.

The transition from one phase to the other takes place as follows: the microprocessor then waits until the recording memory is filled. After an analysis, the microprocessor 22 decides to go to the next recording phase. It then gives the multiplexer 21 the order to switch to recording mode and the memory 16 is
addressed in writing by the output of the multiplexer 21, the input of which is connected to the counter 20.

 The microprocessor emerges from the waiting phase using an interrupt signal given by the verifier 18. After a time delay, the microprocessor 22 transmits to the multiplexer 21 the order to switch to analysis mode and the memory 16 is addressed in reading by the output of the multiplexer 21 whose input, connected to the microprocessor 22, provides the reading memory address. The memory 16 then restores the data stored at this address to the microprocessor 22. For this analysis phase, the microprocessor 22 must know the length of the message recorded in the memory 16. This information is provided to it by the state of the counter 20 at the end of the recording phase. The counter 18 is therefore reset to zero at the start of each recording phase.

 The length of the recorded message being known, two processing modes are possible.

 According to a first processing mode, the microprocessor 22 identifies the type of each parameter transmitted and then verifies that the number of bits generated by the coding corresponds to that expected for this type of parameter. When the test signal is transmitted in the blanking frame, a new test signal is available every 20 ms. This is the processing time available to the microprocessor 22. This processing mode is sufficient to detect a fault or to find that the coder / decoder does not process certain information, in the case where the number of bits is not exact . However, it does not allow a conclusion to be drawn as to the correct functioning of the hardware tested when the number of bits is exact.

 This is the purpose of the second processing mode according to which the microprocessor 22 analyzes the content of the memory 16 in deferred time, and checks bit by bit that the coded information is correct.

 The second mode of operation of the test signal consists in calculating after coding, transmission and decoding, the digital sum "ckeck-sum" of the signal obtained at the output of the decoder. The comparison of the result obtained with the theoretical result known in advance thus highlights any malfunction of the coder or the decoder. However, this result can only be used if there is no transmission error. Residual errors after error correction are detected in the decoder using an error detector code. When residual errors are observed, the diagnosis made using the digital sum made on the test pattern is canceled.

The system for managing this result will wait to give a reliable diagnosis. this is observed several times in the same state and in the absence of transmission errors.

 The invention is not limited to the embodiment described above. Variants can be made by those skilled in the art.

Claims (5)

 1. Method for testing the proper functioning and compliance with the standard of a bit rate compression video coder / decoder, processing a digital image, in blocks composed of samples of the luminance and chrominance signals, this processing being applied directly to these blocks or to block differences, in which case a motion vector is transmitted to indicate the displacement between the two constituent blocks of this difference, this processing also consisting in applying to each block or block difference, a transformation into a discrete cosine allowing to pass in the frequency plane, then to quantify and code the transformed coefficients of each block, characterized in that it consists  to apply to the input of the coder a test signal corresponding to a digital image or part of a image, chosen so as to show non-zero coefficients distributed in the two directions of the frequency plane over the whole of the transformed block ,  - to force the coder to use successively to code the test signal all the possibilities provided by the bit rate compression standard concerned by means of a coding management device,  - To observe the information at the output of the coder via a device called "line spy", or at the output of the decoder.  2. Method according to claim 1, characterized in that the observation by the device called "line spy" consists  - to verify that the number of bits resulting from the coding is correct  - and / or to analyze the information coded in deferred time.  3. Method according to claim 1, characterized in that the observation at the output of the decoder consists in verifying that the digital sum of the decoded signal is correct.  4. Method according to one of claims 1 to 3, characterized in that the test signal is placed in the video suppression.  5. Device for implementing the test method according to claim 1, characterized in that it comprises  - an input interface (11) making it possible to obtain the composite signal constituted by the digital data and the clock, from the signal coming from the encoder  - a signal regenerator (12)  - means (13, 14, 15, 17, 18) intended to identify the test signal among the stream of compressed data and to avoid possible transmission errors  - means (16, 19, 20, 21) intended to calculate the length of the coded message, to record this message during the acquisition phase and to restore this information to information processing means (22) during the analysis phase.