FR2679054B1 - - Google Patents

Info

Publication number
FR2679054B1
FR2679054B1 FR9108703A FR9108703A FR2679054B1 FR 2679054 B1 FR2679054 B1 FR 2679054B1 FR 9108703 A FR9108703 A FR 9108703A FR 9108703 A FR9108703 A FR 9108703A FR 2679054 B1 FR2679054 B1 FR 2679054B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9108703A
Other languages
French (fr)
Other versions
FR2679054A1 (en
Inventor
Benjamin Arazi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fortress U&T 2000 Ltd
Original Assignee
Fortress U&T 2000 Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fortress U&T 2000 Ltd filed Critical Fortress U&T 2000 Ltd
Priority to FR9108703A priority Critical patent/FR2679054A1/en
Publication of FR2679054A1 publication Critical patent/FR2679054A1/en
Application granted granted Critical
Publication of FR2679054B1 publication Critical patent/FR2679054B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724Finite field arithmetic
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723Modular exponentiation
FR9108703A 1991-07-10 1991-07-10 Process and apparatus for exponentiation over GF(2n) Granted FR2679054A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9108703A FR2679054A1 (en) 1991-07-10 1991-07-10 Process and apparatus for exponentiation over GF(2n)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9108703A FR2679054A1 (en) 1991-07-10 1991-07-10 Process and apparatus for exponentiation over GF(2n)

Publications (2)

Publication Number Publication Date
FR2679054A1 FR2679054A1 (en) 1993-01-15
FR2679054B1 true FR2679054B1 (en) 1995-04-28

Family

ID=9414954

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9108703A Granted FR2679054A1 (en) 1991-07-10 1991-07-10 Process and apparatus for exponentiation over GF(2n)

Country Status (1)

Country Link
FR (1) FR2679054A1 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2724741B1 (en) 1994-09-21 1996-12-20 Sgs Thomson Microelectronics ELECTRONIC CIRCUIT FOR MODULAR CALCULATION IN A FINISHED BODY
FR2726667B1 (en) 1994-11-08 1997-01-17 Sgs Thomson Microelectronics METHOD FOR IMPLEMENTING MODULAR MULTIPLICATION ACCORDING TO THE MONTGOMERY METHOD
FR2726666B1 (en) 1994-11-08 1997-01-17 Sgs Thomson Microelectronics PROCESS FOR PRODUCING AN ERROR CORRECTION PARAMETER ASSOCIATED WITH THE IMPLEMENTATION OF MODULAR OPERATIONS ACCORDING TO THE MONTGOMERY METHOD
FR2726668B1 (en) 1994-11-08 1997-01-10 Sgs Thomson Microelectronics METHOD OF IMPLEMENTING MODULAR REDUCTION ACCORDING TO THE MONTGOMERY METHOD
FR2741973B1 (en) 1995-12-04 1998-01-02 Sgs Thomson Microelectronics METHOD FOR PRODUCING A JO PARAMETER ASSOCIATED WITH THE IMPLEMENTATION OF A MODULAR OPERATION ACCORDING TO THE MONTGOMERY METHOD
FR2743645B1 (en) 1996-01-15 1998-02-27 Sgs Thomson Microelectronics DEVICE FOR IMPROVING THE PROCESSING SPEED OF A MODULAR ARITHMETIC CO-PACKER
FR2743907B1 (en) 1996-01-18 1998-02-27 Sgs Thomson Microelectronics METHOD FOR PRODUCING AN ERROR CORRECTION PARAMETER ASSOCIATED WITH THE IMPLEMENTATION OF MODULAR OPERATION ACCORDING TO THE MONTGOMERY METHOD
FR2743908B1 (en) 1996-01-18 1998-02-27 Sgs Thomson Microelectronics PROCESS FOR PRODUCING AN ERROR CORRECTION PARAMETER ASSOCIATED WITH THE IMPLEMENTATION OF MODULAR OPERATION ACCORDING TO THE MONTGOMERY METHOD
US7277540B1 (en) * 1999-01-20 2007-10-02 Kabushiki Kaisha Toshiba Arithmetic method and apparatus and crypto processing apparatus for performing multiple types of cryptography

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL94449A (en) * 1990-05-20 1994-06-24 Fortress U & T 2000 Ltd Method and apparatus for exponentiation over gf(2")

Also Published As

Publication number Publication date
FR2679054A1 (en) 1993-01-15

Similar Documents

Publication Publication Date Title
DE9203114U1 (en)
DE9105033U1 (en)
DE9107992U1 (en)
FR2679054B1 (en)
DE9104544U1 (en)
DE9105884U1 (en)
DE9102179U1 (en)
DE9109269U1 (en)
DE9100241U1 (en)
DE9102271U1 (en)
DE9103476U1 (en)
DE9103098U1 (en)
DE9107564U1 (en)
DE9108182U1 (en)
DE9101197U1 (en)
DE9100941U1 (en)
DE9104473U1 (en)
DE9101825U1 (en)
DE9100818U1 (en)
DE9107929U1 (en)
DE9106928U1 (en)
DE9101596U1 (en)
DE9109159U1 (en)
DE9104615U1 (en)
DE9105765U1 (en)

Legal Events

Date Code Title Description
TP Transmission of property
CD Change of name or company name
ST Notification of lapse

Effective date: 20110331