FR2654529B1 - INFORMATION PROCESSING SYSTEM CAPABLE OF BYPASSING A MEMORY DEVICE FOR SENDING MEMORY DATA, AS AN OPERAND TO THE ARITHMETIC AND LOGIC UNIT. - Google Patents
INFORMATION PROCESSING SYSTEM CAPABLE OF BYPASSING A MEMORY DEVICE FOR SENDING MEMORY DATA, AS AN OPERAND TO THE ARITHMETIC AND LOGIC UNIT.Info
- Publication number
- FR2654529B1 FR2654529B1 FR9014074A FR9014074A FR2654529B1 FR 2654529 B1 FR2654529 B1 FR 2654529B1 FR 9014074 A FR9014074 A FR 9014074A FR 9014074 A FR9014074 A FR 9014074A FR 2654529 B1 FR2654529 B1 FR 2654529B1
- Authority
- FR
- France
- Prior art keywords
- operand
- bypassing
- arithmetic
- information processing
- processing system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000010365 information processing Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Physics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1292193A JPH03154947A (en) | 1989-11-13 | 1989-11-13 | Information processor |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2654529A1 FR2654529A1 (en) | 1991-05-17 |
FR2654529B1 true FR2654529B1 (en) | 1994-08-05 |
Family
ID=17778750
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9014074A Expired - Fee Related FR2654529B1 (en) | 1989-11-13 | 1990-11-13 | INFORMATION PROCESSING SYSTEM CAPABLE OF BYPASSING A MEMORY DEVICE FOR SENDING MEMORY DATA, AS AN OPERAND TO THE ARITHMETIC AND LOGIC UNIT. |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPH03154947A (en) |
FR (1) | FR2654529B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7028166B2 (en) * | 2002-04-30 | 2006-04-11 | Advanced Micro Devices, Inc. | System and method for linking speculative results of load operations to register values |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58161043A (en) * | 1982-02-27 | 1983-09-24 | Fujitsu Ltd | Instruction controller |
JPS6015746A (en) * | 1983-07-08 | 1985-01-26 | Hitachi Ltd | Data processor |
AU553416B2 (en) * | 1984-02-24 | 1986-07-17 | Fujitsu Limited | Pipeline processing |
JPH0754461B2 (en) * | 1985-02-08 | 1995-06-07 | 株式会社日立製作所 | Information processing equipment |
JPH0810430B2 (en) * | 1986-11-28 | 1996-01-31 | 株式会社日立製作所 | Information processing device |
-
1989
- 1989-11-13 JP JP1292193A patent/JPH03154947A/en active Pending
-
1990
- 1990-11-13 FR FR9014074A patent/FR2654529B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR2654529A1 (en) | 1991-05-17 |
JPH03154947A (en) | 1991-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2342529A1 (en) | CENTRAL UNIT-CABLE INPUT / OUTPUT INTERFACE DEVICE FOR DATA PROCESSING SYSTEM | |
FR2686175B1 (en) | MULTIPROCESSOR DATA PROCESSING SYSTEM. | |
FR2601161B1 (en) | INFORMATION PROCESSING DEVICE. | |
FR2414227B1 (en) | ARITHMETIC AND LOGIC UNIT OF A DATA PROCESSING SYSTEM | |
FR2681454B1 (en) | METHOD AND DEVICE FOR PROCESSING ALPHANUMERIC AND GRAPHICAL INFORMATION FOR THE CONSTITUTION OF A DATABASE. | |
ES516295A0 (en) | "IMPROVED DEVICE IN AN INTERACTIVE INFORMATION PROCESSING SYSTEM, TO CHECK OR REVIEW DATA SIGNALS". | |
BE854924A (en) | DATA PROCESSING SYSTEM EQUIPPED WITH A PROCESSING DEVICE | |
EP0567291A3 (en) | Integrated transaction information processing system. | |
FR2687812B1 (en) | INFORMATION PROCESSING SYSTEM. | |
FR2651903B1 (en) | METHOD FOR LIMITING THE RISKS ATTACHED TO A COMPUTER TRANSACTION. | |
FR2597229B1 (en) | ELECTRONIC MEMORY CARD PROCESSING DEVICE FOR PROVIDING BENEFITS | |
FR2707194B1 (en) | Chip removal device. | |
FR2672708B1 (en) | DEVICE AND METHOD FOR PROCESSING AN INTERRUPTION REQUEST IN A DATA PROCESSING SYSTEM OPERATING IN VIRTUAL MACHINE MODE. | |
FR2664069B1 (en) | METHOD AND INTERFACE MEMORY BETWEEN AN OPTION CARD AND THE PROGRAMMABLE BODY MEMORY OF THE CENTRAL UNIT OF A COMPUTER SYSTEM. | |
FR2643474B1 (en) | DEVICE FOR RECORDING AN EXECUTION HISTORY IN AN INFORMATION PROCESSING UNIT | |
FR2689272B1 (en) | THREE-DIMENSIONAL IMAGE INFORMATION PROCESSING DEVICE WITH EXTRACTION OF OUTSTANDING LINES. | |
FR2629613B1 (en) | WARNING DEVICE FOR AVOIDING THE LOSS OF A CODE CARD, ESPECIALLY A CREDIT CARD | |
ES509950A0 (en) | IMPROVEMENTS IN A DATA CARD TRANSACTION SYSTEM. | |
FR2702061B1 (en) | Information processing device. | |
FR2581808B1 (en) | INTEGRATED DYNAMIC PROTECTION DEVICE, IN PARTICULAR FOR INTEGRATED CIRCUITS WITH MOS INPUT STAGES | |
FR2472778B1 (en) | DEVICE FOR TRANSFERRING INFORMATION TO AN INPUT / OUTPUT MULTIPLEXER IN A DATA PROCESSING SYSTEM | |
FR2342526A1 (en) | TRANSMITTER-RECEIVER DEVICE FOR DATA PROCESSING SYSTEM | |
FR2420168B1 (en) | INSTRUCTION PRE-PROCESSING DEVICE IN A DATA PROCESSING SYSTEM | |
FR2637708B1 (en) | DEVICE FOR DATA PROCESSING | |
FR2679348B1 (en) | SOFTWARE STRUCTURE FOR INFORMATION PROCESSING SYSTEM. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |