FR2651346A1 - Signature analyzer adapter card for an IBM PC bus - Google Patents

Abstract

The invention relates to a (short) card which can be plugged into a (8 bit) bus extension connection of an IBM PC, XT, AT (Registered trademarks) and compatibles allow acquisition of signature measurements by using the information (signature) processing and storage power of the host PC. It consists of an input circuit (1) providing the links with the system to be tested, as well as the signature in question to be checked, the latter data item is analyzed by the signature analyzer (shift registers) (2). The exchange of information with the host PC is provided by the parallel interface circuit (3). The address decoder (4) selects the card for the measurements, and the bus adapter (5) adapts and amplifies the various signals from the bus of the host PC. The card according to the invention is particularly intended for checking, maintenance and fault clearance in logic and/or digital systems.

Description

 The present invention relates to a signature analyzer adapter card for I # lG PC bus (registered trademark), enabling acquisition and processing of signature measurements by the host W.

 In general, signature analysis is carried out either by a dedicated microprocessor-based system, or using a digital display analyzer. In the first case, the dedicated system cannot perform other tasks than the signature analysis; in the second case, the user is obliged to test and compare the signatures himself, hence the slowness and risk of error.

 The card according to the invention overcomes these drawbacks.

The card is pluggable into an extension connector on the
Host PC on the one hand, and is provided with a connector allowing the actual measurement on the system under test on the other hand.

This last connector comprises the following connecting wires with the system under test:
a) a ground wire for the zero voltage reference.

 b) a wire for measuring the signature of the point to be tested.

 c) a clock wire punctuating the data shift in the analyzer.

d) a wire connecting to a point on the system under test and giving
the start flank of the measurement.

e) a wire connecting to a point on the system under test and giving
the measurement stop flank.

 This being the only manual manipulations to be carried out for the acquisition of signatures.

 The rest of the measurement tasks are accomplished; under menus, by a small adapted software.

 Outside of the time for taking signature measurements, the host PC can perform any other task.

 According to a preferred embodiment the card is designed short to occupy the least possible space in the host PC.

 Figure 1 shows the block diagram.

 Figure 2 shows the input circuit.

 Figure 3 shows the analyzer.

 Figure 4 shows the parallel interface circuit.

 Figure 5 shows the address decoder.

 Figure 6 shows the bus adapter.

The diagram of the card represented in FIG. 1 comprises the following sub-assemblies:
a) a bus adapter (5) allowing the connection of the different
signals from the card to the host PC.

b) an address decoder (4) ensuring the selection of the card
for measurements.

c) a parallel interface circuit (3) allowing the exchange of
data and control information between the different subsets.

 of the card and the host PC.

 d) the signature analyzer (shift registers) (2).

 e) the input circuit (1).

 This last circuit allows the connection of the different measurement lines on the system to be tested for the acquisition of the signature of a given point of the system to be tested.

 The card according to the invention is particularly intended for checking, maintenance and troubleshooting of logical and / or digital systems.

Claims (8)

 1) Signature analyzer adapter card for IEM W bus (registered trademark) characterized in that it consists of an input circuit (1) of a signature analyzer (shift registers) (2), d 'a parallel interface circuit (3), an address decoder (4) and a bus adapter (5).  2) Card according to claim 1 characterized in that the integrated circuits ensuring the various functions of the card can be of Tir or CMDS technology; the preference for Firing or CMDS being fixed by the working frequency of the systems to be repaired.  3) Card according to claim 1 characterized in that the input circuit (1) by design (data input in discrete elements and clock inputs, start and stop arrive on a driver SN7417) is compatible with the measurement levels on CMDS or TEL system.  4) Card according to claim 1 or claim 3 characterized in that the direction of each of the clock sides, start of the measurement and stop the measurement, can be defined by software.  5) Card according to claim 1 characterized in that the signature analyzer (2), working on sixteen bits, gives the card a probability of error detection little different from 1000 / o.  6) Card according to claim 1 characterized in that the address decoder (4), by checking on the address lines A8, A4, A3 and A2, allows the addressing of the card from address 200 to address 31F  7) Card according to claim 1 characterized in that the bus adapter circuit (5) amplifies all the lines connecting the card to the bus of the host PC (except the power lines).  8) Card according to claim 1 or claim 7 characterized in that the amplifier of the data lines is in three states and only authorizes the transfer of data with the card when the latter is selected.