FR2647914A1 - Systolic optonumerical processor involving coherence modulation of the light for the calculation of products of a matrix and a vector - Google Patents

Abstract

Systolic optonumerical processor for the calculation of multiplications and of products of a matrix times a vector involving a network of cascaded optical multipliers within which a light beam propagates in order to carry out a plurality of additions or multiplications. This system comprises a single intensity-modulated light source 12, a plurality of series-connected modulators 1A, 1B, ... 1P assigning to the light beam, which passes through them, predetermined optical retardations greater than the coherence length of the source, and a plurality of parallel-connected demodulators 2A, 2B, ... 2P producing optical retardations substantially equal to those introduced by the said modulators. The light beam propagates in the plurality of modulators and demodulators in order to carry out a plurality of elementary multiplications between the elements of the product of a matrix times a vector which constitute the signals for controlling the source and the said modulators.

Description

The subject of the invention is a systolic optoelectronic calculator consisting of a pipeline network of cascaded multipliers in which a light beam propagates to eject a plurality of additions and multiplications. It finds an application in parallel ultra-fast calculations of linear algebra type (matrix x vector products, matrix inversion, etc ...) such as those usually used in digital image processing, in signal processing, in operations detection or identification
One of the objectives sought in numerical computation when the number of data to be processed is important is the increase of the computation rates, which can reach several gigaoperations per second.

The conventional von Neuman calculators are too slow because of their sequential operation over time which prevents any computational laparoscopy. One solution consists of your systolic architectures in which the central computing unit is replaced by a network of elementary calcu- lation units that can perform parallel and simple repetitive operations on a stream of data flowing in the network. at each calculation cycle. The gain in calculation time is then proportional to the number of elementary calculation units forming the network. Systolic arrays are special processors in Linear algebra calculations, such as, for example, the product matrix x vector calculations Ax = y. These involve a succession of repetitive elementary multiplications between the elements aij of the matrix A and the components x. of the vector x, followed by elementary additions giving the yi components of the vector

Matrix x vector products are the basis of more elaborate computations, such as matrix x matrix products, calculation of va and eigenvectors of a matrix, inversion of matrices, and are an important part of calculations in signal processing or processing. images. Thus the access to the contour of an object in the vision systems for robotics is done by the product of convolution of the object which is expressed, in numerical computation, in the form of a product matrix x vector. In radar detection, the extraction of a signal embedded in noise and the improvement of the signal-to-noise ratio of the detected signal can be carried out by a correlation operation. This (here again is in the form of a product between a matrix of
Toeplitz and a column vector. In the same way, the evaluation of mechanical structures in avionics for example often involves large linear equation systems whose resolution requires matrix computations that involve very long computation times. Systolic calculators reduce computation times by several orders of magnitude. New computation algorithms adapted to parallel computing are currently being researched in laboratories to further increase the speed of calculation and the scope of these calculators.

 Besides all-electronic systolic calculators, opto-electronic systolic calculators are being developed. The calculations are then performed optically by means of light beams.

This represents the potential advantage of reducing energy consumption, to allow calculation rates at least comparable to those of all-electronic systolic computers (106 to 108 additions / multiplications per second, as a function of the number of precision bits) and to obtain a much lower cost price. This last point is of importance for example in embedded systems.

Optoelectronic systolic processors known to those skilled in the art generally involve acousto-optical effects to perform elementary multiplications. The data stream is then constituted by ultrasonic waves propagating in an acousto-optic crystal illuminated by a plurality of light sources (laser diodes or light-emitting diodes). For example, Caulfield et al (Optics Communics, 40, 86, 1981), Casasent (Applied Optics, 21, 1859-1865, 1982), Tsai et al (Applied Physics Letters, 47, 6, 549-551, 1985) describe for example analog processors in which the number of light sources is equal to the number of columns of the matrix A, or to the number of non-zero diagonals when the matrix A is a matrix with a band structure. Rhodes et al (Proc, IEEE, 72.7, 820-829, 1984), and Guitfoyle (Optical Engineer * ng, 23, 23, 1, 20-25, 1984) describe other architectures, of digital type, in which a plurality of light pixels generated for example by a first acousto-optical crystal illuminate a second acousto-optical crystal to produce matrix x vector products according to the convolution algorithm devised by Whitehouse and Speiser (Aspects cf Signe Processirg, vol.2 G.Tacconi Ed, Reidel, Hingham, Mass. 1977).

 A major disadvantage of these calculation methods is to require a plurality of sources, the number of which is higher as the dimension of the matrices is increased. This leads to the implementation of circuits for controlling and regulating the transmission power of each source and therefore has a complexity of the system. In addition this leads to a lack of reliability, the sources may have significant drift depending on temperature or aging, especially for laser diodes.

Another disadvantage is that these methods require precise synchronization of each source with the data oropating in the acousto-optical crystal. In addition, it introduces an acoustic attenuation on the data stream that propagates there and must therefore be taken into account to calibrate the transmission power of each of the sources. This may explain that, although several studies of principle have been reported in the literature, only a few rare prototypes are currently being tested in the world (eg, Casasent et al., Appzied Optics, 14, 2258-2262, 1986).
The present invention relates to a novel optoelectronic systolic computer architecture. One of its objects is to allow the use of a single light source while keeping the possibility of a parallelism of calculation, and thus considerably simplify the synchronization conditions, the input circuits of the data and , in general, all the hardware, with, for advantage, an increase in the reliability of operation.

 Another object of the invention is to provide a means of obtaining very high computation speeds by coding all the data to be processed on a single light beam along which the operations are carried out at the speed of light. as the light propagates in the computer network. Another object of the invention is to constitute a means of increasing the current possibilities of parallel computation, the invention being compatible with all the other optical systolic systems involving, for example, acousto-optical or magneto-optical cells, or generally optical valves operating in monochromatic or polychromatic light.

 The field of application of the invention generally covers the rapid calculation involving matrix algorithms, with clock rates of up to several hundred MHz.

During a clock cycle, the calculation rate can reach 108 to 10 additions / multiplications per second. The calculation accuracy can reach a dozen bits or more depending on the type of light sources
The basic principle of the invention rests on the use of a computing network formed 4 'a plurality of optical multipliers cascaded and within which propagates a light beam previously modulated in intensity Each multiplier performs in real time (equal to the propagation time of light in the multiplier, of the order of 10-10 seconds) a multiplication between its control signal and the energy of the light beam passing therethrough. More specifically, each aultiplier encodes its control signal in the form of an optical delay D greater than the coherence length L = AZ / dS of the light beam (A: wavelength, dA: spectral width of the radiation). It follows that the result of the multiplication is coded as a modulation of the temporal coherence of the beam
Bright, undetectable in a direct way. As the light beam propagates in the computing network, the different multiplications are thus carried out step by step and coded on the light beam. At the output of the multi-reader network, access to the results is effected by means of a plurality of decoders placed in parallel and introducing substantially equal optical delays D
Slow to those of the multipliers. The result of each multiplication is then obtained at the output of each decoder in the form of a light intensity modulation. This has the effect of making it possible to directly detect each elementary multiplication by means of a photodiode.

The multipliers mentioned above, and which will be discussed in the following, cover any optical means whose operation can be reduced to that of a modulator (or a tunable spectral filter or interferometer) introducing a higher optical delay to the coherence length of the light and such that no modulation of the output light intensity appears under the effect of the tuning of the filter or the interferometer. The multipliers may for example be two-wave or multi-wave interferometers, optical loops, directional couplers, electro-, acousto-, magneto-, piezo- or elasto-optical modulators or any other means involving
electrical, acoustic, magnetic or mechanical effects for inducing and modulating optical delay or inducing spectral filtering of wavelengths.

The various objects and characteristics of the invention will appear better in the light of the following description, given by way of non-limiting example. This description is preferred to the accompanying drawings in which:
- Figure 1 shows the basic principle of a multiplier operating by coherence modulation.

 FIG. 2 represents a matrix x vector product as it can be calculated by the systolic network of FIG. 3, and in which the components are analog.

 FIG. 3 illustrates the operating principle of the systolic calculator and the method used to calculate the matrix x vector product of FIG. 2.

 FIG. 4 shows the calculation sequences and the position of the different elementary multiplications at each stage of the calculation of the matrix x vector product of FIG. 2.

 - Figure 5 shows an embodiment of the systolic network of Figure 3 from discrete components available on the market.

 - Figure 6 shows a variant made from integrated components and optical fibers.

 FIG. 7 represents an x-vector matrix product in which the components are binary.

 - Figure 8 illustrates a digital systolic system according to the present invention for calculating the product matrix x binary vector of Figure 7 with digital accuracy.

 FIG. 9 represents the calculation sequences leading to the calculation of the matrix x vector product of FIG. 7 by means of the digital processor of FIG. 8.

 FIG. 10 describes an embodiment of the processor of FIG. 8.

 FIG. 11 shows a digital processor making it possible to calculate the matrix x vector product of FIG. 7.

 FIG. 12 represents a parallel architecture processor.

 FIG. 13 gives an example of the computation requirements of the processor of FIG. 12 for calculating the matrix x vector product of FIG. 2.

FIG. 1 gives the principle of a multiplier making it possible to carry out multiplications by coherence moduLation of a light beam. FIG. 1 represents the spectral energy density B (o) of the light source 1
8 (a) = 1 for a 1 <a <2
= 0 elsewhere
The variable o is a number of waves. The average wavelength emitted by the source is A. This example is taken only as a
o illustrative to simplify the notations that follow, sources with other energy spectral densities (Gaussian, Lorentzian, structure mode, etc ...) can be used without inconvenience.

Figure lb shows the simple case of calculating a single product a1 b1. The system comprises a light source 1 modulated in intensity by a1, a modulation means i A on which is addressed the data b1, a demodulation means 2A, a photodetector 4 and a shaping circuit 5. The light energy emitted by source 1 is proportional to a1
I1 - a1 (1)
The modulation 1A and demodulation means 2A are constituted by any means introducing a spectral filtering law with multiple maximums on the beam 2 passing through them. For example, the elements 1A and 2A may be devices whose behavior is reduced to that of a Fabry-Perot interferometer, or that of a Michelson interferometer without this possibly excluding any other system whose law Spectral filtering as a function of wavelength or temporal frequencies of light is sinusoidal or, in general, has multiple maxima. By way of illustration, all the descriptions in the invention are made from devices whose operation can be reduced to that of two-wave interferometers introducing optical delays, that is to say for which the law Spectral filtering is of the sinusoidal type.

According to this description, the modulator 1A introduced on the light beam 2 passing through it, an optical delay D (A) such that
D (A) = DA + b1 (L) (2) where DA is a DC component modulated by a second component proportionalLle to b1. The optical delay D (A) thus introduced on the beam 3 is always greater than the length of coherence
L: # 2 / | # 2 - # 1 | = 1 / | c2 - c1 | of the source 1, the light energy of the beam 3 then results from a sinusoidal spectral filtering, and has for expression

As a result, at the output of the modulator 1A, the luminous energy I 2 is not modulated by b. The optical delay D (A) being greater than the
Coherence length and therefore can not give rise to an interference phenomenon. At the output of the modulator 1A, the data item al is then coded as a light intensity modulation of the beam 3 while the data item b2 is coded as an optical delay modulation within the same beam. Still following the same description, the demodulator 2 A is constituted by a means introducing an optical delay D '(A) substantially equivalent to D (A). More precisely, and in a preferred configuration adapted to ana-logic or multilevel data, it is substantially:
D '(A) = D - A / 4 (4)
o
Condition (4) provides the best linearity conditions of the demodulator 2A when the data is analog. In the case of binary data, Linearity is less critical. The dynamics are then optimal when one has substantially
D (A) = DA (5)
The light energy 13 detected by the photodetector 4 is then:

By introducing the relation (4) into (6), the expression (6) is reduced to:
I3 = 1/4 {a1 + K a1b1} (7) where K is a constant (K = 2 ## c).

The second term of expression (7) gives the product a1b1. This is obtained by sending the electric signal delivered by the photodetector 4, proportional to I3, in the shaping circuit 5 on which the data a1 is applied. This circuit is constituted by any means making it possible to subtract the first term from the expression (7) so as to give, at its output, the product a1b1,
FIG. 1c extends the preceding calculation principle in the case of the simultaneous calculation of two products a1b1 and a1b2. The data a1 is addressed to the light source 1 and to the two shaping circuits 5 and 8.

The data b1 and b2 are addressed on the modulators 1A and 1a, respectively. These are constituted by means introducing different optical delays
D (A) = DA + b1 (L) (8)
D (9) = DB + b2 (L) (9)
The optical delays D (A) and D (B) are greater than the coherence length of the source 1. The light intensity 12 of the light beam 3 is given by the expression (3). The luminous intensity 14 of the light beam 6 is written

= 1/4 a1 (11)
the beam 6 is divided into two beams passing through the demodulators 2A and 28. These introduce optical delays
(A) and D '(8) substantially equivalent to those introduced by the modulators 1A and 1B. By resuming a reasoning similar to that given in FIG. 1b, it can be shown that the light energy detected by the photodetectors 4 and 7 is proportional to
on the photodetector 4: 16 {a1 + K a1b1 J (12)
- on the photodetector7: 16 {a1 + K a1b2} (13)
After shaping the signals by the elements 5 and 8, the processor delivers the products a1b1 and a1b2 in electrical form on each of its two outputs. The products a1b1 and a1b2 thus obtained can then be stored in memories by the usual means known to those skilled in the art. It should be noted that the computation time is determined by the propagation time of the light in the elements 1A, 1B, 2A and 2B. This is generally negligible in view of the time constants of the data addressing circuits and in front of the time constants of the data addressing circuits. the duration of the clock cycles. The addressing of data a b1, b2 is therefore carried out in parallel mode on the elements 1,1A, 18, 5 and 8 without having to introduce any delay delays as long as the propagation time of the light can be considered. as negligible. The result of the basic products is also obtained in parallel mode. Such a system can perform matrix x vector product calculations when a plurality of multipliers are connected to each other.

FIG. 2 represents the product of a matrix 9 by a vector 10. The result of the matrix x vector product is the vector 11. The matrix 9 comprises a plurality of rows (p) and columns (Q) formed of components a. .. The input vector 10 is donations form
he born (x1, x2, ... xQ). The output vector 11 comprises the components (y1, y2, ... yp). These are obtained by adding elementary multiplications aijxi between the components of the matrix 9 and those of the input vector 10.

The matrix x vector product described in FIG. 2 can be calculated by sequentially addressing the elements a 1 and x sequentially. to a plurality of multipliers placed in series according to the architecture
J of Figure 3.

 FIG. 3 shows the architecture and the operating principle of a systolic computer adapted to the calculation of the matrix x vector product of FIG. 2. The system is formed of a plurality of modulators 1A, 18,. series and whose number is equal to the number P of rows of the matrix. A plurality (P) of demodulators 2A, 2B ... 2P are connected in parallel and operate according to the principle explained in FIG. 1. The computing network is illuminated by a light source 12 of coherence length L. At each sequence of calcuL, a component xj of the input vector 10 and the P components aij of the column j of the matrix 9 are applied in parallel mode on the source 12 and on each of the modulators. The different calculation sequences are shown in Figure 3, as well as the data entry. A calculation sequence n j makes it possible to calculate simultaneously the elementary products aijxj, a2jxj, a3jxj, ... apjxj. These are obtained on each of the outputs of the shaping circuits 3A, 3B,... 3P and are stored and added in the registers 4A, 4B,... 4P, A. The following calculation sequence gives P new basic products that add up to the previous results.

After Q sequences of calculation, one finally obtains in the registers 4A, 4B, .. 4P The components y1, y2, ... yp of the output vector 1 '.

 A better understanding of the calculation sequences of FIG. 3 can be obtained by referring at the same time to FIG. 4. FIG. 4 shows the calculation sequences and the position of the input data and the elementary multiplications at each stage of the calculation. of the matrix product x vector of FIG. 2. In FIG. 4a, which represents the calculation sequence n 1, the component x 1 is sent into the computing network (in the form of a modulation of light intensity) at the same time as the components a11, a21, ..., a11, ... ap1 of the column n 1 of the matrix 9. At the output of the processor, the elementary multiplications a11x1, a21x1, ... aj1x1, ... are simultaneously obtained. , aP1x1, each then being stored in adder registers 4A, 48, 4C, .... 4P.

In FIG. 4b corresponding to the computation sequence n 2, the components a12, a22, a32, ai2,... A P2 of the column n 2 of the matrix 9 and the component x2 of the input vector 10 are addressed in the parallel on the computing network. The system then calculates in parallel the elementary products a12x2, a22x2, .... ai2x2, .... aP2x2. These add to the elementary products of the previous cycle, so that the content of the addition and storage circuits becomes:
y1 = a11x1 + a12x2
y2 = a21x1 + a22x2
(15)
yi = ai1x1 + ai2x2
yP = aP1x1 + aP2x2
The third calculation sequence, represented in FIG. 4c, provides another set of elementary products which are added, in each storage and addition circuit, to the results obtained in the preceding calculation cycles. The storage circuits P then contain, respectively:
y1 = a11x1 + a12x2 + a13x3
y2 = a21x1 + a22x2 + a23x3
(16)
yi = ai1x1 + ai2x2 + ai3x3
yP = aP1x1 + aP2x2 + aP3x3
The computation cycles continue in this manner until the matrix x vector product is completed. The data stored in the P adders are then
y1 = a11x1 + a12x2 + .... + a1QxQ
y2 = a21x1 + a22x2 + ..... + a2QxQ (17)
y @ = a @@ x @ + a @@ x @ + ..... + a @ @
Q
The data (y1, y2, ... yP) expressed by the relations (17) are the components of the matrix x vector product described by the relation (14). It can be seen that the number of calculation cycles is equal to the number Q of columns of the matrix and that the number of modulators is equal to the number P of
Lines of the matrix.

 During a given calculation sequence, the elementary products are obtained by crossing the data applied to the modulators 1A, 1B, 1C .... 1P with this applied on the source 12 and propagating in the form of a light beam in modulators. Theoretically, the addressing of these data must be synchronized to take into account the propagation time of the light beam from one modulator to the next.

In practice this propagation time being negligible (10 12 seconds) in front of the time constants of the addressing circuits, the data can be applied simultaneously to your source 12 and the modulators 1A, 1B, iC. .. in parallel mode. The synchronization conditions ensuring the operation of the computer are therefore generally very easy to complete.

 In the same way, the use of a single light source 12 to perform several elementary multiplications in parallel provides high reliability and avoids problems of calibration and calibration of sources. The fact of using a serial architecture implementing a plurality of cascaded modulators also avoids the calibration problems of the modulators due to a possible dispersion of their operating characteristics and their insertion losses. Thus, the light loss as it propagates in the plurality of modulators is not to be taken into account at the level of each demodulator and therefore does not require correction. beam at the output of the modulators being determined by your propagation losses throughout the modulator network. These features of the system forming the subject of the invention lead to a simplification of the control and clock circuits by reducing to a minimum the control and regulation circuits generally required in optoelectronic processors for the control of sources and signals. detection systems.

The key conditions for the operation of this type of optoelectronic calculator are defined by the value of optical delays
D (A), D (B), D (C), .... characterizing the modulators 1A, 1B, 1C, the first condition is that the optical delays must be greater than the coherence length L of the light source 12 Thus for a light source of wavelength λ and d-line width, this condition is fulfilled if the optical delays are greater than
L = # 2 / d #. The second condition is that the difference between the different optical delays is chosen to avoid any crosstalk between the computing stages operating in parallel. Thus, a possible sequence of optical delays is given by the progression pL, 3pL, 8pL, ... known in this field (Journal of Light Wawe Technology Vol.LT-3 No. 5 Oct.85 p.1065)
As an example, for a superluminescent diode such as Le
A = 800 nm and ## = 40 nm and a crosstalk rate of -20 dB optical obtained with p = 2, the optical delays are of the order D (A) = 32 microns, D (B) = 96 microns, D (C) = 256 microns, etc.

 The source 12 may be a monomode or multimode laser diode, a light emitting diode or a superluminescent diode modulated in intensity. In principle, a source with a broad spectrum of emission is recommended, so as to obtain a short coherence length L and consequently optical delays D (A), D (8), D (C), .... easily achievable. The modulators 1A, 18, 1C, ... are constituted by any means designed to introduce optical delays D (A), DtB), D (C) ... greater than the coherence length L. The modulation of the delay optical can <RTI

 The calcut sequences given in FIGS. 3 and 4 apply to the calculation of matrix x vector products in which the matrix is of dimension (P × Q) and whose elements are analog data. In this case, the computation network comprises P modulators assocated with P demodulators and the number of calculation cycles is Q. The processor therefore calculates the P components of the product y in 9 time units determined by the clock period at which the data are addressed in the system. Therefore, the computation rate is P additions-multiplications per clock period.

FIG. 5 shows an exemplary embodiment of the computer of FIG. 3 whose operation has been verified experimentally. Each modulator 1A, 18 1C comprises an electro-optical modulator 15, 18, 21
with a transverse electric field, a birefringent blade 14, 17, 20 and a
polarizer 13, 16, 19, 22. The polarization directions of the solvers are parallel to each other and oriented at 450 neutral lines of the birefringent blades and electro-optical modulators. The birefringent blades 14, 17, 20 are quartz blades or spath 0 Z cut and different thicknesses. They introduce optical delays
DA, DB and DC greater than the coherence length L of the source. This is a multimode laser diode emitting at A = 800 nm, and of length
o Consistency L = 80 microns. The optical delays were chosen in order to check the operating condition mentioned previously:
DA = 160 microns, D8 = 480 microns and DC = 1280 microns. After crossing the three modulators, the light beam is sent on three demodulators by means of the separating plates 23, 24 and the mirror 25.

Each demodulator comprises a birefringent blade 26, 28, 30 associated with a polarizer 27, 29, 31. The polarizers 27, 29, 31 are oriented parallel to the polarizers 13, 16, 19, 22 whereas the neutral lines of the birefringent blades 26, 28, 30 are oriented at 450 polarization directions of the polarizers 27, 29, 31. The birefringent blades 26, 28, 30 introduce optical delays DA1, DB and DC1 identical to O, Da and O. The introduction of an optical delay gap of - # A0 / 4 can be achieved electrically by applying a quarter-wave voltage on each of the modulators 15, 18, 21. The light signals obtained at the output of the decoders are detected by the photodetectors 32, 33, 34 connected to the signal shaping circuits 35, 36, 37. The elements 38, 39, 40 are maintenance and addition circuits in which the elementary products are stored and added to each calculation sequence. Con trale experiments were conducted with clock rates of 2 MHz on 3-row and 2800-column matrices. The calculation accuracy provided by the experienced processor was 3%.

 FIG. 6 gives another version of the processor adapted to the calculation of the matrix x vector product of FIG. 2 carried out by the integrated optics technology. The source 12 is coupled to integrated electro-optical modulators 42, 44, 46 connected by the fibers 41, 43, 45, 47. The light transmitted by the modulators is injected via a coupler 48 and fibers 49. , 50, 51 in The demodulators. These can be constituted by modulators 52, 53, 54 similar to the components 42, 44, 46 that is to say introducing substantially equivalent optical delays.

 The architecture given in FIGS. 3, 4, 5 and 6 is suitable for calculating matrix x vector products in which the data is analog. The rate of calculation can be very high but the accuracy is relatively low (a few percent) compared to that obtained with a numerical calculator. Two embodiments of the calcuL method adapted to digital data, and in particular binary data, will now be described, although the calculation method applies equally well to data coded in bases greater than 2.

 FIG. 7 represents a matrix product (55) x vector (56) in which the components are coded on n = 5 bits. The result is set in vector 57 in mixed binary form (the components are then written in a base greater than 2, for example a11x1 = 111 x 11 = 1221). The vector 58 gives the result in binary format t for example 1221 = 1001 in binary). The matrix 55 is a matrix with P lines and Q columns.

FIG. 8 shows the architecture of an opto-digital processor adapted to the circuit of the matrix x vector product of FIG. 7. The processor comprises P modulators 1A, 18, ... put in series and P demodulators 2A, 28, ... whose operation has already been described. The modulators are illuminated by the light source 59 which operates in continuous mode. The element 60 is constituted by any means that can behave like an imager, that is to say that can display in optical form several electrical data that are applied to it and transfer them from one point to another along the direction 64. For example, the element 60 may be an acousto-optic modulator, or a battery of electro- or magneto-optical cells placed side by side and controlled by shift registers ensuring the transfer of data from a cell. to the neighbor. The elements 62 and 63 are photodetector strips connected to shaping and storing circuits 65, 66. The element 61 is constituted by any optical system making it possible to form the image of the component 60 on
Elements 62 and 63. For example, it may consist of
Spherocylindrical lenses associated with senar blades, or with a layer of fiber optic couplers. The algorithm used to calculate the matrix x vector product of FIG. 7 is the convolutional multiplication algorithm described by Whitehouse and Speiser ("Aspects of Signal Processing," Editor: D.Reidel, Boston
MA, 1976, pp. 669-702).

The understanding of the calculation sequences of FIG. 8 can be obtained by referring at the same time to FIG. 9. FIG. 9 shows the position of the bits during the n = 5 calculation sequences for both obtaining the elementary products a11x1 and a21x1 of the matrix product x vector of FIG. 8. In FIG. 9a, which represents the sequence of caLul n 1, the maximum bits (MSB) of a11, a21, a31 are applied to the modulators 1A, 1B, 1C, .. while the minimum bit CLSB) of x1 is addressed on the element 64. The photodetector
MSB of element 62 detects the product between the MSB bit of a11 and the LSB bit applied to element 60. Similarly, the MSB photodetector of element 63 detects the product between the MSB bit of a21 and the These products are stored in the memories 65 and 66. At the calculation sequence n02 (FIG. 9b) the element 60 contains the first two bits 1 and 1 of x1, the LS8 bit having been shifted upwards. Along the axis 64. The two corresponding photodetectors of the element 62 detect the product between the bit O applied on
The modulator 1A and each of the two bits present in the element 60.

The situation is similar for the two photodetectors of Element 63.

These detect the products between the bit applied to the element 1B and each of the two bits present in the element 60. The same process is repeated at each calcuL sequence, with storage of the results.

Figure 9e shows the final result obtained after the first calculation procedure. The n = 5 memories of each of the registers 65 and 66 contain the digits of the products a11x1 and a21 x1 encoded in mixed binary. The conversion to base 2 is done by A / D converters, or the results remain stored in mixed binary memories for the next calculation procedure. This gives the products a12x2 and a12x2 encoded in mixed binary. The contents of the memories become:
memories 65: a11 x1 + a12x2 mixed binary Cen)
memories 66: a21 x1 + a22x2 (in mixed binary)
When the calculation procedures are completed, the elementary memories each constituting registers 65 and 66 respectively contain the digits of the component y1 = 2231 and those of y2 = 1311 of the matrix x vector product of Figure 7. The analog / digital conversion of these digits give the final result in base 2.

The difference between the calculation method of the invention illustrated by FIG. 8 and the opto numerical calculation methods known from FIG.
Those skilled in the art (for example described by D. Psaltis et al., "Accurate numerical computation by opticaZ convoZutzon" in International Optical
Computing Conference, WTRhodes Ed., Proc. SPIE, vol.232, pp.151-156) resides in the fact that the computational parallelism is carried out nar encoding the data in the form of a modulation of optical delays introduced on a single light beam propagating in a succession of means of modulation in series, and not by coding the data as a modulation of intensity of several light beams.

 This has important consequences on the means that can be used to implement the opto-lumen method according to the invention. We have already had the opportunity to point out that a single light beam increases reliability and simplifies enormously the problems of calibration and drift of the light power. Moreover, the calculation method is compatible with the other opticumeric systolic methods cited above, and therefore leads to an increase in computational parallelism.

 FIG. 10a describes an embodiment of the processor of FIG. 8 which operates with the calculation sequences of FIG. 9.

The source 67 is for example a super-luminescent diode of small coherence length L = 80 microns. The embodiment of the elements 1A, 1B, 2A, 2B has already been given in Figure 5. The lens 68 widens the light beam transmitted by the elements 1A and 1B so as to illuminate the element 69 preferably in parallel beam. This is an acousto-optical deflector operating in Bragg regime.

The element 70 is a mask in which each pixel delimits an illuminated region of the acousto-optical deflector. The element 61 of FIG. 8 is, in FIG. 10, constituted by the lens 71 and the nulling aril 72, so that the image of the mask 70 is formed on the photodetectors 73 and 74, through the decoders 2A. and 2B. The number of cells constituting the photodetector strips 73 and 74 is equal to the number of openings in the mask; the detection cells are connected to shaping circuits 75,76 and 77,78 holding and summing circuits known to those skilled in the art. The multiplier array 72 is constituted by a one-dimensional or two-dimensional amplitude or phase network, one embodiment of which is given by Viénot et al.
Applied Optics, Vol. 12, 5, pp.950-960, 1973 or by N.Aebischer et al in La Nouvelle Rev. Optics, vol.6, 1, pp.37-47, 1975.

A multiplier grid produced by this method makes it possible to obtain up to 30 x 30 identical images.

 Figure 10b describes a variant of the element 61 of Figure 8.

According to this variant, a network of optical fiber couplers 90 is used to form a plurality of images of the optical valve 69.

The input fiber 91 of each coupler is coupled to a particular pixel of the optical valve 69 while the output fibers 92 are assigned to particular detection pixels of the bars 73 and 74, according to the configuration illustrated in FIG. . In this embodiment, the couplers 90 may be 100/140 micron couplers with a single input fiber and P output fibers,
P being the number of rows of the matrix 55.

 FIG. 11 is a variant of the numerical calculation of the matrix x vector product of FIG. 7 implementing the processor already described in FIG. 3 but with different calculation sequences.

The number n of modulators 1A, 1B, 1C ... and of demodulator 2A, 2B, 2C, is here determined by the number n of bits. The calculation sequences leading to the calculation of the elementary product a11x1 are indicated. The bits forming x1 are applied in series mode to the source 79 which is intensity modulated. The bits forming a11 are applied in paralel mode on each modulator. At each calculation sequence, a shift register 80 makes it possible to shift a bit of a11 towards the preceding one. The calculation sequences are repeated n times (n = 5 in the example given in FIG. 11) to obtain the result a11x1. The calculation procedure is repeated to obtain a12x2, etc.

 FIG. 12 gives a variant of a processor implementing a parallel architecture. The processor is formed of a plurality of light sources 81, 82, 83, a plurality of modulators 1A, 1B, 1C and a demodulator 84. The optical delays D (A), D (B), D ( C) modulators are greater than the coherence length of the sources.

A possible sequence of optical delays is given by the progression pL, 2pL, 3pL, 4pL, ... The factor p (p> 1) determines the crosstalk rate. For example an optical isolation of the order of -2ûdB
(equivalent to - 40 dB electrical) between the multipliers is obtained by taking p = 2. This type of architecture characterized in that the multipliers 1A, 1B, 1C are put in parallel can be used in
all the examples of realization presented before. The disadvantage with previous systems is that they require several light sources 81, 82, 83. However, the fact that their wavelength can be arbitrary reduces this disadvantage.

The advantage is to allow a larger number of multipliers and thus higher matrix dimensions. Figure 12 uses this
process in the case of calculating the product matrix x vector of the
Figure 7. The elements 60, 61, 2A, 2B, 2C, 62, 63, 65, 66 are those already described with reference to Figure 8; Element 84 is a coupler
to fiber. The calculation sequences indicated in FIG. 12 are identical
to those already discussed in Figure 9. Other more elaborate versions of processors can be easily imagined to treat large matrices or n-order tensors by combining the said parallel architecture wavelength multiplex sources .

All of the preceding architectures can be associated with wavelength multiplexing to increase the calculation rates, the calculation precision and the dimension of the matrices to be processed. The processes can also be looped on themselves for the calculation of particular algorithms known to those skilled in the art (inversion of matrices, calculation of eigenvalues, etc.)
It is obvious that the preceding descriptions have been given by way of non-limiting example and that many variants can be envisaged without departing from the scope of the invention.

Claims (12)

1 - Optoelectronic multiplier rour multiply two signals and characterized by the fact that it comprises: - a single light source (1) emitting a light beam (2) whose energy is modulated by a signal (a,), - a modulation means (1A) which introduces a predetermined maximum multi-filtering rate on the spectral components of the outgoing light beam (3) and in which the light undergoing = a spectral modulation tunable under the effect of another signal (b @) without modulating the energy of the light beam propagating thereon; - modulating means (2A) which introduces a predetermined spectral filtering law substantially identical to the spectral filtering law of the modulation means (1A) and in wherein the light energy of the beam (3) propagating therein is made proportional to the product of the two signals; - means (3A) for detecting and shaping the result of the multiplication between the two if and composed of a photodetector (4) and a shaping circuit (5). 2 - Multiplier according to claim 1 and characterized by the fact that:  the modulation means is a modulator introducing a predetermined optical delay greater than the coherence length of the source and adjustable around this predetermined value under the effect of one of the two signals,  the demodulation means is a demodulator introducing an optical delay substantially equivalent to the value of the predetermined optical delay characterizing the modulator (1A),  - The operation of the multiplier is independent of the fact that the modulator (1A) is located before or after the demodulator (2A).  the operation of the multiplier is independent of the fact that the energy modulation is done at the source or at any other point in the light circuit by an external modulator. 3 - Multiplier seions claims 1 and 2 and characterized in that said means this modulation is an electro-optical modulator introduce a predetermined optical delay 4 - Multiplier according to the reventdications 2 and 3 dns in which the optical delays are obtained by means involving the natural birefringence of electro-optical crystals or not. 5 - Multiplier according to claim 1 and characterized by the fact that the modulation and demodulation means are constituted by coupets their directives which induce a spectral filtering law 8 maximum multiple equivalent of that which would introduce a higher optical delay to the coherence length of the source. 6 - Optoelectronic processor for computing matrix vector products between an input vector and a matrix, comprising a plurality of salt multipliers claims 1 and 6 and characterized by the fact that it comprises  a single light source (12) serving as a common source emitting a light beam (3) whose energy is modulated by the elements of the input vector,  a plurality of modulation means (1A, 1B, ... 1P) arranged in series and each of which assigns to the intensity-modulated light beam (3) a spectral filtering law having multiple maximums that can be modulated under the effect of signals representing the elements of the matrix without this introducing a! modification of the light intensity modulation of the beam (3),  a plurality of demodulation means (2A, 2B, .. 2P) in parallel and each of which assigns to the light beam passing through a predetermined filtering law substantially equivalent to the filtering law of the modulation means and thus modifies the output energy of the light beam to make it proportional to the elementary product between an element of the input vector and the elements of the matrix applied to the modulation means,  a plurality of means for detecting and shaping (3A, 3B .. .3P) the signals delivered by the modulation means which supply the elementary products,  a plurality of holding and storage means (4A, 4B, 4P) of the elementary products for summing them up and thus obtaining the components of the output vector which constitute the result of the vector matrix product. 7 - Processor according to claim 6 and characterized by the fact that  the said modulation means are constituted by modulators introducing a series of predetermined optical delays, greater than the coherence length of the source and adjustable around these values; predetermined by the effect of signals representing the elements of the matrix;  the said demodulation means are constituted by demodulated Lators introducing a series of substantially equivalent optical delays Slow optical delays characterizing said modulation means;  the operation of the processor is independent of the fact that said modulation means are located before or after said demodulation means; 8 - Processor according to claim 7 and characterized in that the optical delays assigned to said modulation means substantially follow the progression conne pt, 3 *, 8c3, p et2nt a factor enter or not, greater than 1, determining the insulation optically between each computing stage operating in parallel 9 - The processor according to claim 6 and characterized by the fact that said modulation and demodulation means are directional couplers introducing a multi-maximum spectral filtering law equivalent to the filtering law qu would introduce an optical delay greater than the coherence length;  10 - optoelectronic processor according to any one of claims 6, 7, 8, 9 and characterized in that it comprises one or a plurality of shift registers - (80) making it possible to transfer the digits of the numbers to be multiplied by one modulator to another, and a plurality of analog / digital converters for obtaining the result of the matrix product by vector in digital form. 11 - Processor for the numerical calculation of matrix x vector products between an input vector and a matrix whose elements are in digital form, and characterized by the fact that it comprises:  a single light source (59) operating in continuous mode  a plurality of modulation means (1A, 1B, ...) placed in series, each of which assigns to the light a predetermined multi-maximumable spectral filtering law that can be modulated under the effect of signals representing the bits of the elements of the matrix without that a modulation of the intensity of the light intervenes;  an optical valve (60) for simultaneously displaying several bits of an input vector element in optical form;  a plurality of demodulation means (2A, 28, ...), each of which assigns to light a predetermined filtering law substantially equivalent to the filtering law of each of said Latin modu means and thus modifies the output energy light to make it proportional to the product between the bits of the input vector and the bits of the elements of the matrix;  a plurality of means (62, 63) for detecting, shaping and storing the optical signals supplied by each of said demodulation means;  means (61) for forming the image of said optical valve (60) on said detection means (62, 63) 12 - Processor according to Claim 11, characterized by the fact that  said modulation means are modulators introducing a series of predetermined optical delays, greater than the coherence length of the source, and adjustable around these predetermined values under the effect of signals representing the bits of the elements of the matrix;  the said demodulation means are constituted by demodulated Lators introducing a series of substantially equivalent optical delays Slow to optical delays entering the so-called modulators;  the operation of the processor is independent of the fact that said modulation means are so killed before or after said demodulation means; 13 - Processor according to claim 12 and characterized in that the optical ditsretards substantially follow the progression pL, 3pL, 8pL, ..., p being an integer factor or not, greater than 1, determining the optical isolation between the stages computing in parallel operation; 14 - Processor according to claim 11 and characterized by the fact that said modulation and demodulation means are directional couplers introducing a spectral filter law with multiple multiples equivalent to the filter law that would introduce an optical delay suoerieur the coherence length of the source; 15 - Processor according to any one of claims 11, 12, 13, 14, characterized by cue The said optiaue valve (60) is an acousto-optic modulator;  16 - Processor according to any one of claims 11, 12, 13, 14, characterized in that said optical valve (60) is a magneto-optical modulator 17 - Processor according to any one of claims 11, 12, Characterized in that: said optical valve (60) is an electro-optical display; 18 - Processor according to any one of claims 11, 12, 13, 14, characterized in that the means (61) is an imaging system involving spherocylindrical lenses or a matrix of fiber optic couplers or a multiplier grid. 19 - Optoelectronic Processor for the Product Matrix x Vector Computation between an Input Vector and a Matrix, and characterized by the fact that it comprises  a plurality of light sources (81, 82, 83) operating in parallel  a plurality of modulation means (1A, 1B, 1C), each of which assigns to the light beam emitted by each source a multi-maximum filtered electromagnetic filtering law which is adjustable under the effect of this sianau @ 20 - processor according to the claim 19 characterized by the fact that  The said modulating means are modulators introducing predetermined optical delays greater than the coherence length of the source, which are adjustable around these predetermined values under the effect of signals representing the bits of the elements of the matrix.  the said demodulation means are demodulators intro @ ulsan a substantially equivalent optical delay One of the optical delays characterizing the said modulateJrs. 21 - Processor according to claim 20 and characterized in that the optical delays of said modulators substantially follow the progression pL, 2pL, 3pL, ... D being a number greater than 1 determining the optical isolation between each computing stage. 22 - Processor associating calculation stages according to one of claims 1 to 18 a of the calculation stages according to one of claims 19, 20, 21. 23 - Processor for computing matrix x vector products or for tensor calculations, characterized in that it comprises a plurality of calculation stages according to any one of claims 1 to 22 wavelength multiplexed.