FR2645991B1 - Dispositif de traitement parallele d'information pour la commande en temps reel - Google Patents
Dispositif de traitement parallele d'information pour la commande en temps reelInfo
- Publication number
- FR2645991B1 FR2645991B1 FR8905110A FR8905110A FR2645991B1 FR 2645991 B1 FR2645991 B1 FR 2645991B1 FR 8905110 A FR8905110 A FR 8905110A FR 8905110 A FR8905110 A FR 8905110A FR 2645991 B1 FR2645991 B1 FR 2645991B1
- Authority
- FR
- France
- Prior art keywords
- real
- information processing
- processing device
- time control
- parallel information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02D—CONTROLLING COMBUSTION ENGINES
- F02D41/00—Electrical control of supply of combustible mixture or its constituents
- F02D41/24—Electrical control of supply of combustible mixture or its constituents characterised by the use of digital means
- F02D41/26—Electrical control of supply of combustible mixture or its constituents characterised by the use of digital means using computer, e.g. microprocessor
- F02D41/266—Electrical control of supply of combustible mixture or its constituents characterised by the use of digital means using computer, e.g. microprocessor the computer being backed-up or assisted by another circuit, e.g. analogue
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Combustion & Propulsion (AREA)
- Mechanical Engineering (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8905110A FR2645991B1 (fr) | 1989-04-18 | 1989-04-18 | Dispositif de traitement parallele d'information pour la commande en temps reel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8905110A FR2645991B1 (fr) | 1989-04-18 | 1989-04-18 | Dispositif de traitement parallele d'information pour la commande en temps reel |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2645991A1 FR2645991A1 (fr) | 1990-10-19 |
FR2645991B1 true FR2645991B1 (fr) | 1994-09-09 |
Family
ID=9380841
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8905110A Expired - Fee Related FR2645991B1 (fr) | 1989-04-18 | 1989-04-18 | Dispositif de traitement parallele d'information pour la commande en temps reel |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2645991B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10160476B4 (de) * | 2001-12-08 | 2004-09-30 | Daimlerchrysler Ag | Vorrichtung und Verfahren zur Motorsteuerung bei Verkehrsmitteln |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1474385A (en) * | 1973-12-14 | 1977-05-25 | Int Computers Ltd | Multiprocessor data processing systems |
US4414624A (en) * | 1980-11-19 | 1983-11-08 | The United States Of America As Represented By The Secretary Of The Navy | Multiple-microcomputer processing |
US4719622A (en) * | 1985-03-15 | 1988-01-12 | Wang Laboratories, Inc. | System bus means for inter-processor communication |
-
1989
- 1989-04-18 FR FR8905110A patent/FR2645991B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR2645991A1 (fr) | 1990-10-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |