FR2620737B1 - PROCESS FOR ETCHING A SILICON OXIDE LAYER - Google Patents

PROCESS FOR ETCHING A SILICON OXIDE LAYER

Info

Publication number
FR2620737B1
FR2620737B1 FR8713093A FR8713093A FR2620737B1 FR 2620737 B1 FR2620737 B1 FR 2620737B1 FR 8713093 A FR8713093 A FR 8713093A FR 8713093 A FR8713093 A FR 8713093A FR 2620737 B1 FR2620737 B1 FR 2620737B1
Authority
FR
France
Prior art keywords
etching
silicon oxide
oxide layer
silicon
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR8713093A
Other languages
French (fr)
Other versions
FR2620737A1 (en
Inventor
Didier Dutartre
Jorge Luis Regolini
Daniel Bensahel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Etat Francais
Original Assignee
Etat Francais
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Etat Francais filed Critical Etat Francais
Priority to FR8713093A priority Critical patent/FR2620737B1/en
Publication of FR2620737A1 publication Critical patent/FR2620737A1/en
Application granted granted Critical
Publication of FR2620737B1 publication Critical patent/FR2620737B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
FR8713093A 1987-09-17 1987-09-17 PROCESS FOR ETCHING A SILICON OXIDE LAYER Expired - Fee Related FR2620737B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8713093A FR2620737B1 (en) 1987-09-17 1987-09-17 PROCESS FOR ETCHING A SILICON OXIDE LAYER

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8713093A FR2620737B1 (en) 1987-09-17 1987-09-17 PROCESS FOR ETCHING A SILICON OXIDE LAYER

Publications (2)

Publication Number Publication Date
FR2620737A1 FR2620737A1 (en) 1989-03-24
FR2620737B1 true FR2620737B1 (en) 1993-04-16

Family

ID=9355116

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8713093A Expired - Fee Related FR2620737B1 (en) 1987-09-17 1987-09-17 PROCESS FOR ETCHING A SILICON OXIDE LAYER

Country Status (1)

Country Link
FR (1) FR2620737B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4203804C2 (en) * 1991-03-22 1994-02-10 Siemens Ag Method for making contacts on a conductive structure covered with a UV-transparent insulating layer in very large scale integrated circuits
FR2675309A1 (en) * 1991-03-22 1992-10-16 Siemens Ag Method for locally removing insulating layers which are transparent to ultraviolet, situated on a semiconductor substrate

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL136565C (en) * 1967-12-08

Also Published As

Publication number Publication date
FR2620737A1 (en) 1989-03-24

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Legal Events

Date Code Title Description
TP Transmission of property
ST Notification of lapse