FR2618038A1 - CIRCUIT FOR SELECTIVELY RECEIVING A MULTIPLEX BROADCAST SIGNAL OF A TELEVISION DEVICE - Google Patents

Abstract

Circuit for selectively receiving a multiplex sound broadcast signal using a television set also receiving single signals, designed to simultaneously receive bilingual broadcast signals. A 4.724 MHz bandpass filter and a 4.5 MHz bandpass filter of a television set for receiving single signals are put in parallel to selectively provide the output signals of the 4.5 MHz or 4.724 MHz bandpass filter and to synchronize a synchronizer at 4.5 MHz or 4.724 MHz, depending on the switching position of a switch.

Description

CIRCUIT FOR RECEIVING SELECTIVEBENT UT DIFFUSION SIGNALi

  XULTIPLEI OF THE SOUND OF A TELEVISION DEVICE

  The present invention relates to a circuit for receiving a sound multiplex broadcast signal from a television set, and more particularly to a circuit for selectively receiving a sound multiplex broadcast signal from a television apparatus, adapted to receive selectively bilingual broadcast signals - primary and secondary signals - by means of a simple connection structure

of the circuit.

  In a conventional television set, a circuit of structure as shown in FIG. 1. To speak more concretely, broadcasting signals chosen by a user parallel those received by an antenna AIT are tuned and sent to a tuner 1, these signals are filtered through a filter 2 of surface acoustic waves MAS) , and then the video signals are processed through a video processing element 3, while IF audio signals are detected through an intermediate frequency sound detector 4. The FR audio signals having a frequency of 4.5 lHz walls FI detected audio signals pass through a band-pass filter 5, and are applied to an IF detector 8 with a limited amplitude in a limiter 6, and at the same The signals are synchronized by a synchronizer 7 and then introduced into a detector FR 8 so that the audio signals are detected and restored. Such audio signals are amplified in an amplifier of

  its 9 and sent to a loudspeaker BP.

  In FIG. 1, Cl to C5, CP1 and L1 respectively represent

  capacitors, a ceramic filter, and a coil.

  However, as described above, such a conventional television set has the disadvantage of being designed to receive only audio signals modulated and broadcast on a frequency of 4.5 XNz, that is to say to receive the unicast signals and the primary signals, without being able to receive any modulated secondary signal broadcast on a frequency of 4.724 XNz, during a broadcast

multiplex sound.

  In addition, there is a sound multiplex television set for receiving monophonic, stereo and sound multiplex broadcast signals, but it also has the disadvantage that it requires the use of an integrated switch element, etc ... and the construction of the circuit is therefore very complex. It is therefore an object of the present invention to provide a circuit for selectively receiving a simple multiplexed sound multiplex broadcast signal for selecting primary or secondary signals from multiplex sound broadcast signals by selecting a switch when a broadcast

  multiplex sound and render the signals to a speaker.

  The above object according to the present invention is achieved by putting a bandwidth filter of 4.724 Hz in parallel with a 4.5 RHz bandwidth filter of a single-receiver television set so that the signals of the filter bandwidth of 4.5 UEz or 4.724 MHz can be selectively restored depending on the switching state and the synchronizer is synchronized with the 4.5 Kz or 4.724 RHz

according to the switching state.

  The invention will be better understood on reading the description of a

  particular embodiment given without limitation. In the drawings: the PIG. 1 is a block diagram showing a usual television set circuit; FIG. 2 is a block diagram showing a television set circuit provided with a circuit for selectively receiving a multiplex broadcast signal according to the present invention; the PIG. 3 is a detailed circuit diagram showing an embodiment of a circuit for selectively receiving a multiplex broadcast sound signal according to the invention, as shown in FIG. 2; and FIG. 4 is a detailed diagram showing another embodiment of a circuit for selectively receiving a multiplex broadcast sound signal according to the invention, as shown in FIG.

PIG. 2.

  As shown in FIG. 2, which is a block diagram of the selective multiplex broadcast signal reception circuit according to the

26 18038

  In the present invention, the television set has a structure connecting the output side of a tuner 11 connected to an antenna AIT to a loudspeaker HP through an OAS filter 12, a video processing element 13, a frequency detector.intermediate of its 14, a 4.5 XHz bandwidth filter 15, a limiter 16, a synchronizer 17, an IF detector 18 and a sound amplifier 19 in series; it comprises a switching control element 20 which sends switching control signals according to the user's choice, a buffer 21

  for retaining and amplifying the output signals of said amplifier 1.4.

  An intermediate frequency of sound, a bandpass filter 22 for extracting frequency PX audio signals 4,724 NEz which are secondary signals of the output signals of the buffer 21, switching elements 23, 24 for selecting and transmitting the signals of outputting the bandpass filters 15, 22 according to the switching control signals of the switching control element 20, a differential amplifier 25 for amplifying the signals passed through the switching element 23 or 24 and sending them to the limiter 16 and a switching emitter 26 for grounding or opening a capacitor C16 of the synchronizer 17 according to the switching control signals of the switching control element 20, so that the synchronizer

  17 is synchronized with the frequency of 4.5 HXEz or 4.724 KHz.

  The synchronizer 17 is designed to be synchronized at the frequency 4.5 XHz when the capacitor C16 is connected to ground, while it is synchronized at the frequency 4.724 MHz when the capacitor C16 is not connected to ground. The switching elements 23, 26 are designed to be closed when high potential switching control signals come from the switching control element 20, while the switching element 24 is designed to be closed when control signals of low potential switching come from the switching control element 20. The references C11 to C15, not described, are capacitors; CPFll, CF12

  are ceramic filters; and Lll is a coil.

  The functional effect of the present invention will now be described in detail. The isolated broadcast signals in the tuner 11 controlled by the user are filtered through the OAS filter 12; the video signals of the filtered broadcast signals are processed in the video processing element 13 from which they exit while the audio PI signals

  are detected in the intermediate sound frequency detector 14.

  The detected audio FX signals pass through the buffer 21, then the audio IF signals of 4.5 XHz frequency - the primary signals

  are applied to the switch element 13 through the pass filter.

  frequency band 4,5] Hz and frequency IF audio signals 4,724 X] z - the secondary signals are applied to the switch element 24 through the frequency band-pass filter 227,724

XTZ.

  Thus, in the event that the user selects the primary signals and the high potential switch control signals are output from the switch control element 20, the switch element 23 is closed and the switch element 24 is opened so that the signals F [4.5 NEt filter audio having passed the band-pass filter 4.5 MHz pass through the switch element 23, and the frequency FPX audio signals 4.5] Hz are amplified in the differential amplifier 25, limited in the limiter 16, then

  applied to PX 18 detector and synchronizer 17.

  The coammutator element 26 is closed by the control signals of

  high potential switching out of the control element of.

  Coupling 20 and the capacitor C16 of the synchronizer 17 is connected to the ground so that the output signal of the limiter 16 is synchronized with the frequency of 4.5 Maz. The IF signal outputs of the limiter 16 are thus synchronized with the frequency 4.5 1Hz by the capacitors C14, C16 and the coil L11 through the capacitor C13 of the synchronizer 17, and then applied to the detector PX 18 through the capacitor C15. Thus the primary signals are detected inside the PX detector 18 and appear on its output, and these primary signals are amplified in the sound amplifier 19 and

sent to the HP speaker.

  If the user selects the secondary signals and the low potential switch control signals are output from the switch control element 20, the switch elements 23, 26 are open and the switch element 24 is closed, unlike the above-mentioned condition, so that the frequency 4, 724 KHz FX audio signals from the 4.724 MHz pass-band filter 22 pass through the switch element 24. The 4.724 Mz frequency FX audio signals passing through The switch element 24 is applied, as previously described, to the IF detector 18 through the differential amplifier 25 and the limiter 16, and the audio IF signals pass through the capacitor C13 of the synchronizer 17 and are synchronized with the frequency of 4.724. XHz by the capacitor C14 and the coil L11, and then applied to the FI detector 18 through the C15 condenser. As a result, the secondary signals of frequency 4,724 Mz are detected and restored, and these signals are amplified

  in the sound amplifier 19 and then sent to the SP speaker.

  As shown in FIG. 3, which is a detailed circuit diagram showing an embodiment of a circuit according to the present invention selectively receiving a multiplex sound broadcast signal, the switching control element 20 is constructed such that the transistor TR6 is in DRIVER or BLOCK state depending on whether the primary / secondary switch SY1 is in the state providing low or high potential signals; the buffer 21 is made by connecting the output of the intermediate frequency detector 14 to the base of the tranistor TR1 and connecting the common junction of the emitter and the resistor R1 to the input of the bandpass filter 15 4.5 KHz and bandpass filter 22 4.724 M] z. The switching element 23 is made by connecting the output of the bandpass filter 4.5 MKz to the collector of the transistor TR2 and connecting the base of the transistor TR2 to the output of the switching element through the resistor. R1O. The switch element 24 is constructed by connecting the output of the bandpass filter 4.724 lEz to the collector of the transistor TR3 and the output of the switching control element 20 to the base of the transistor TR7 through the resistor R11, and then the collector of the transistor TR7 at the base of the transistor TR3 through the resistor R14. The differential amplifier 25 is realized by respectively connecting the emitters of the transistors TR2, TR3, which are the outputs of the switching elements 23, 24, to the bases of the transistors TR4, TR5, to which the collectors are connected in common and the emitters of the transistors TR4. , TR5 at resistance R6 in common and in

  same time at the input of the limiter 16 through the capacitor C17.

  The switch element 26 is made by connecting the output of the switching control element 20 to the base of the transistor TR8 through the resistor R12, and the collector of the transistor TR8 to the capacitor C16.

synchronizer 17.

  According to the embodiment of the invention realized as described above, when a source of electrical power is applied to the power terminal Vcc and audio PX signals leave the intermediate sound frequency detector 14, the audio PFI signals go to through the buffer 21 and the audio PF signals of 4.724 MHz and 4.5 wHz are respectively applied to the collectors of the transistors TR2, TR3 of the switching elements 23, 24 through the band-pause filters 15, 22. When the user closes the SV1 primary / secondary switch by shorting it on a fixed contact al placed on one side, the low potential is applied to the base of the transistor TR6 and the latter is blocked so that the high potential signals appear on his collector. These high potential signals switch the transistor TR2 to the CONDUCTIVE state, through the resistor RO1 of the switch element 23, so that the IF audio signals of 4.5 MHz frequency passing through the bandpass filter 15 4.5 KHz are applied to the base of the transistor TR4 of the differential amplifier 25 through the transistor TR2. When the high potential signals pass the transistor TR7 to the CONDUCTIVE state through the resistor R11 of the switch element 24 so that the low potential signals appear on its collector, these low potential signals switch on the transistor TR3 in the BLOCK state so that the 4.724 1Hz audio PX signals passing through the 4.724 NEz bandpass filter do not

  can not cross the switch element 24.

  Thus, only the 4.5 XHz audio PX signals are amplified through the transistor TR4 of the differential amplifier 25 and then applied to the PXI detector 18 and the synchronizer 17 through the capacitor-C17. and the limiter 16. At this point the high potential signals from the switching control element 20 turn the transistor TR8 to the CONDUCTIVE state through the resistor R12 so that the capacitor C16 of the synchronizer 17 is grounded. , and accordingly the audio PX signals are, as shown in FIG. 2, synchronized with the frequency 4.5 XzS in the synchronizer 17 and applied to the IF detector 18 and so that the IF audio signals of frequency 4.5 Kuz - the primary signals - are detected inside the detector FR 18 and appear on its output, and that these primary signals are amplified in the sound amplifier 19 and

sent to the HP speaker.

  When the primary / secondary switch SV, of the switching control element 20 is connected to the fixed contact b1 placed on the other side, the transistor TR6 goes to the state CONDI) and low potential signals appear at its manifold. Such low potential signals switch the transistors TR2, TR7, TR8 of the switching elements 23, 24 and 26 to the BLOCK state and high potential signals are emitted from its collector and stop the transistor TR7 so that the transistor TRS goes to the DRIVER state. Finally, at this point only the 4,724 NEz audio FIK signals passing through the bandpass filter 4,724 XHz pass through the transistor TR3 of the switch element 24, as opposed to the case described above, and they are amplified through the transistor TR5 of the differential amplifier 25, and then applied to the IF detector 18 and the

  synchronizer 17 through the limiter 16.

  And the transistor TR8 of the switch element 26 goes open so that the audio PFI signals passing through the limiter 16 are synchronized with the frequency 4,724 Hz in the

  synchronizer 17 and then applied to the FI detector 18.

  Thus the frequency PF audio signals 4,724 NEz - the secondary signals - are detected inside the FX detector 18 which restores them, and these secondary signals are amplified in the amplifier

  of its 19 and then applied to the HP speaker.

  FIG. 4 is a detailed diagram showing another embodiment of the circuit according to the present invention for selectively receiving a sound multiplex broadcast signal as shown in FIG. 2. According to this embodiment of FIG. 4, the switch element 23 of the circuit of the embodiment shown in FIG. 3 is eliminated; the switch element 24 and the differential amplifier 25 are made differently. More precisely, the switch 17 is made by connecting the output of the switching control element -8 to the base of the transistor TR7 through the resistor R11. and the differential amplifier 25 is made by connecting the output sides of the 4.5 XHz band-pass filter and the band-pass filter 4724. XHEz respectively at the bases of transistors TR4, TR5 whose collectors are connected in common, and leads time to resistors 21, H22; H23, R24 bias, and also by connecting the other end of the resistor R24 to the collector of the TH7 transistor of the switch element 24 and the mass resistor 225; the emitters of transistors TH4, TB5 are connected to resistor R6 in

  a junction connected to the limiter 16 through the capacitor C17.

  According to the other embodiment of the invention, when the primary / secondary switch SVI of the switching control element 20 is connected to a ground contact A1 fixed on one side, high potential signals are sent ( as described in FIG 3), and pass the transistors TR7, TR8 to the COIDUCTBUR state, through the

  resistors RU11, R12 of the switching elements 24, 26 respectively.

  As a result, the capacitor C16 of the synchronizer 17 is synchronized with the frequency 4.5 l] z when it is grounded, and the voltage supplied by the divider consisting of the resistors 123, R24 is applied to the base of the transistor TR5 of the differential amplifier 25. In this case, when the value of the resistors R21 - 124 is set so that the voltage applied to the base of the transistor TR4 exceeds that applied to the base of the transistor TRS, the transistor TR4 passes to the COCDUCTBUR state, while transistor TR5 goes to the BLOCKED state. Thus 4.5 NHz 4.5 XHz band-pass PX audio signals are amplified through transistor TR4 of differential amplifier 25, and then applied to PX detector 18 and synchronizer 17. 16. At this time the primary signals are detected inside the FNPX and friends by it, and the primary signals are

  sent to the HP speaker through the sound amplifier 19.

  On the contrary, when the primary / secondary switch SlV1 of the switching control element 20 is connected to the fixed contact b1 placed on the other side and low potential signals are thereby provided by the switching control elements. 20, the

  Transistor TR7 of the switching elements 24, 26 goes to the BLOCK state.

  Consequently, the capacitor Cie of the synchronizer 17 is put in open circuit, the synchronizer 17 is synchronized with the frequency 4, 724 KHz, and the voltage of the divider & resistors H23, R24, 125 is applied to the base of the transistor TR4 of the At this time, if the value of resistors 121-125 is set so that the voltage applied to the base of transistor TR5 is higher than that applied to the base of transistor TR4, transistor TR4 switches to BLOQUB state, and the TR5 transistor goes to the CODIDUCTEUR state. at

  this moment the audio IF signals of 4.724 KRz out of the filter 22 pass-

  band 4,724 1Hz are amplified through the transistor T15 of the differential amplifier 25 and then applied to the synchronizer 17 and the FIX detector 18 through the limiter 16. And, because the synchronizer is synchronized with the frequency 4,724 KHz, the

  frequency FX 4.724 XHz audio signals - secondary signals -

  are detected inside and out of the FPX 18 detector, and these secondary signals are directed to the HP speaker through

the sound amplifier 19.

  As described in detail above, the present invention is achieved by connecting a selective circuit which receives a multiplex broadcast sound signal to an ordinary television set so that the user can selectively receive the primary or secondary signals, according to his needs, during a multiplex broadcast of sound, and its realization is very simple compared to the sound multiplex broadcast signal receiving circuit used for a television set

  ordinary, and thus it allows a moderate cost of production.

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Claims (3)

claims:   A multiplex broadcast sound reception circuit of a television set made by connecting the output of a tuner (11) to a loudspeaker E (HP) through an acoustic filter & surface waves (12) OAS , an intermediate sound frequency detector (14), a 4.5 kHz bandpass filter (15), a limiter (16), a synchronizer (17), an IF detector (18) and a sound amplifier (19). ) in series, characterized in that the circuit comprises a switching control element (20) for providing commutation control signals according to the user's choice, a buffer (21) for amplifying the intermediate frequency output signals sound (14), a band-pass filter (22) for extracting the frequency IF audio signals 4,724 KHz - the secondary signals - from those output from the buffer (21), switching elements (23, 24) for selecting and leaving passing the output signals of the bandpass filters (15, 22) according to the control signals of switching the switching control element (20), a differential amplifier element (25) for amplifying the signals passed through the switch element (23 or 24) and then sending them to the limiter (16), and a switch element (26) for grounding or opening a capacitor of the synchronizer (17) according to the   switching control signals of the control element of.   switching (20) so that the synchronizer (17) is synchronized   with the frequency 4.5 XHz or 4.724 GHz. -   2. Circuit according to claim 1, characterized in that: the switching control element (20) is constructed in such a way that a transistor (TRO) goes to the CONDUCTIVE or BLOCKED state according to the switching state of the circuit. primary / secondary switch (SV1) and transmits low or high potential control switch signals; the switching element (23) is arranged to switch a transistor (TCIR2) to the CONDUCTIVE state when the switching control element (20) is at high potential, and to transmit the output signals of the filter ( 15) 4.5 MHz bandpass; the switching element (24) is designed to switch a transistor (TR7) to the BLOCKED state while a transistor (TR3) goes to the CONDUCTIVE state, when switching control signals to the bar potential are output from the switching control element (20) and passing the output signals. the bandpass filter (22) 4,724 KMz; the differential amplifier element <25> is constructed such that, while some signals are passing through the switch element. (23 or 24), a transistor CTR4 or TR5) switches to the COIDUCTIVE state to provide signals to the limiter (16), and the switch element (26) is arranged to switch a transistor CT8R) to the COIDUCTOR state when high potential switching control signals are provided by the switching control element / 20), and putting a capacitor of the synchronizer (17) to ground.   3. Circuit according to claim 2, characterized in that it is achieved by connecting the output of the 4.5 NHz bandpass filter (15) to polarization resistors CR21, R22) and the base of transistor TR4; connecting the output of the 4.724 XHz bandpass filter (22) to bias resistors CR23, R24) and the base of the transistor (TR5); connecting the output of the comautation control element (20) to the base of the transistor (TR7); and connecting the collector of the latter to a ground resistance CR25) and to the other side of the resistance (R24).