FR2611085B1 - METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT - Google Patents

METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT

Info

Publication number
FR2611085B1
FR2611085B1 FR8701867A FR8701867A FR2611085B1 FR 2611085 B1 FR2611085 B1 FR 2611085B1 FR 8701867 A FR8701867 A FR 8701867A FR 8701867 A FR8701867 A FR 8701867A FR 2611085 B1 FR2611085 B1 FR 2611085B1
Authority
FR
France
Prior art keywords
integrated circuit
contact openings
engraving contact
engraving
openings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8701867A
Other languages
French (fr)
Other versions
FR2611085A1 (en
Inventor
Didier-Nee-
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thomson Semiconducteurs SA
Original Assignee
Thomson Semiconducteurs SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Semiconducteurs SA filed Critical Thomson Semiconducteurs SA
Priority to FR8701867A priority Critical patent/FR2611085B1/en
Publication of FR2611085A1 publication Critical patent/FR2611085A1/en
Application granted granted Critical
Publication of FR2611085B1 publication Critical patent/FR2611085B1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR8701867A 1987-02-13 1987-02-13 METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT Expired FR2611085B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8701867A FR2611085B1 (en) 1987-02-13 1987-02-13 METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8701867A FR2611085B1 (en) 1987-02-13 1987-02-13 METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT

Publications (2)

Publication Number Publication Date
FR2611085A1 FR2611085A1 (en) 1988-08-19
FR2611085B1 true FR2611085B1 (en) 1989-11-10

Family

ID=9347910

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8701867A Expired FR2611085B1 (en) 1987-02-13 1987-02-13 METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT

Country Status (1)

Country Link
FR (1) FR2611085B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2746077B2 (en) * 1993-09-02 1998-04-28 日本電気株式会社 Method for manufacturing semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2449731A1 (en) * 1973-12-03 1975-06-05 Hewlett Packard Co ETCHING PROCEDURE

Also Published As

Publication number Publication date
FR2611085A1 (en) 1988-08-19

Similar Documents

Publication Publication Date Title
FR2615065B1 (en) SUPPORT FOR PRINTED CIRCUIT PLATES
FR2547155B1 (en) METHOD AND DEVICE FOR SERIGRAPHIC PRINTING; ELECTRICAL CIRCUIT THUS OBTAINED
DE3681808D1 (en) MANUFACTURING METHOD OF CARRIERS FOR PRINTED CIRCUITS.
PT91267A (en) ELECTRONIC CONTACT ELEMENT
DE69033522T2 (en) Printed circuit
DE3852073T2 (en) Custom printed circuit.
DE3771707D1 (en) PRINTED CIRCUIT.
DE3564514D1 (en) Integrated circuit contact method
FR2621774B1 (en) CIRCUIT PLATE FOR HIGH CURRENTS AND PREPARATION METHOD
EP0242852A3 (en) Electronic printing method
GB8727985D0 (en) Method of printing raised pattern
DE3689005D1 (en) Device for soldering printed circuits.
YU175486A (en) Process for making metal cladded base material for printed circuits transparent plates
FR2627031B1 (en) DEMODULATION CIRCUIT AND METHOD
FR2611085B1 (en) METHOD OF ENGRAVING CONTACT OPENINGS IN AN INTEGRATED CIRCUIT
FR2617650B1 (en) METHOD FOR CONNECTING BETWEEN A PRINTED CIRCUIT AND A METAL SUBSTRATE
GB8712166D0 (en) Engraving presses
FR2628272B1 (en) DIGITAL-TO-ANALOG CONVERSION CIRCUIT AND RELATED METHOD
GB2203993B (en) Silkscreen printing method and apparatus therefor
FR2608269B1 (en) METHOD FOR QUANTITATIVE DETERMINATION OF RELIEF PATTERNS OF VERY SMALL DIMENSIONS
EP0202684A3 (en) Method for selectively driving electrical circuits and circuit for performing the method
FR2640810B1 (en) METHOD FOR MAKING OPENINGS IN AN INTEGRATED CIRCUIT
DE3870646D1 (en) DEVICE FOR SERIAL STAMPING OF PRINTED CIRCUITS.
FR2551861B1 (en) METHOD FOR MEASURING THE DEPTH OF AN ION ENGRAVING
RO90191A2 (en) METHOD FOR ETCHING METALLIC MATRICES

Legal Events

Date Code Title Description
ST Notification of lapse