FR2579846A1 - ELECTRONIC SIGNAL TIMER - Google Patents

Abstract

A DELAYER DEVICE TO ADJUST THE TIME OF ARRIVAL OF AN ELECTRONIC SIGNAL IN A DETERMINED ZONE IS PROPOSED. THE DELAYER DEVICE IS CONSTITUTED OF A COPLANAR FLEXIBLE CIRCUIT HAVING A CONDUCTIVE TRACE CONSISTING OF A SIGNAL CONDUCTOR 52 IN A EARTHING SCREEN 54. THE SIGNAL CONDUCTOR 52 HAS A SINUOUS SHAPE AND SHOWS ONE OR MORE PASSAGES TO L 'FRONT AND REAR ON THE DIELECTRIC SURFACE OF THE FLEXIBLE CIRCUIT. THE EARTHING PLAN 54 ESSENTIALLY COVERS THE ENTIRE SURFACE OF THE LAMINATE, EXCEPT A NARROW GAP 58 ON EACH OTHER OF THE SIGNAL CONDUCTOR. THIS LAMINATED CIRCUIT IS THEN TIGHTLY WOUND ON ITSELF AND IS PERMANENTLY PACKAGED IN AN APPROPRIATE SHEATH, OR STILL IN A COATING. IN ONE EMBODIMENT, THE DELAY OF THE DELAYED CONDUCTOR IS NOTABLY INCREASED (WITHOUT HOWEVER INCREASING THE LENGTH OF THE CIRCUIT CONDUCTOR) BY USING A DIELECTRIC AND OR A GLUE WITH HIGH PERMEABILITY. THE USE OF A DIELECTRIC AND OR OF A HIGH PERMEABILITY GLUE ALLOWS TO MINIMIZE THE DIMENSIONS, THE COST AND THE LOSSES BY RESISTANCE OF THE DELAYED DEVICE.

Description

1 ELECTRONIC SIGNAL DELAYER

  The present invention relates to the field of

  positive self-timer for electronic signals. More by-

  In particular, this invention relates to a new and improved electronic component which can be used on a printed circuit board and which is capable of

  vary the time of arrival of signals in lo-

gics at high speed.

  As we already know in electronic technology, the correct functioning of a digital network requires that certain logical variables be able to change state at

  moments precisely controlled one compared to the other

  be. As a result, the exact control of the signals

  is an essential question for the design of

  printed circuit boards (PCBs) or plates with wiring

  (PWB). This question has become particularly critical.

  that since the advent of digital logical networks to

great speed.

  Delayed conductors are used in the in-

  of the electronics industry to regulate the programming of

  electronic channels. As already mentioned, the pro-

  signal grammage is often a critical factor

  that for the correct functioning of a system, in particular

  especially for high-speed digital systems. In systems like this, an integrated circuit can take

  decisions based on two or more signals of

  very. If all the required input values do not arrive at about the same time, the decision will be wrong. It is not necessary for the input values to arrive at exactly the same time, but the admission window for arrivals becomes more narrow as the speed of the system increases. When the system becomes more complex,

  connections from one circuit to another become longer

  gues and it follows that the connection length for

  1 the inputs to an integrated circuit can vary in u-

  do great measure. This variability in the length of the con-

  input nxions gives rise to a variation of the time of par-

  runs in each connection, so that non-identical arrival times result. As it is not possible to accelerate the input signals arriving too late, it is the signals arriving early which must be

  delayed. Therefore, a delay conductor is used

  dried to effectively increase the length of a

  signal and, therefore, its transit time. The ca-

  electrical characteristics of the delay conductor must

  be as good as those on the circuit board on the

  which normally move the signals. Therefore

  quent, it must have a controlled impedance, low losses and a minimum of crosstalk, and this without modifying

the signal rise time.

  There is a combination of factors present in

  a digital system, which make it virtually impossible

  bles the design and construction of a digital logical network in which the signal propagation times would respect a very precise programming, unless using an appropriate compensating device, such as a

  delay driver. On the other hand, and given the im-

  details specific to different elements of the logistics system

  that signal programming can only be established

  by fine adjustment of the network after its construction. These impro-

  for example, delays in transmission -

  doors differing from the nominal value,

  length of the printed circuit or re- trace traces

  uncontrolled delays in connectors and other segments

  digital signal paths.

  You will realize that the time required for an electronic signal to pass from one point to another in

  a printed circuit trace is a function of and is defined

  terminated by the physical length of the trace, by the geomet-

  sorting of the conductor and by the characteristics of the substrate.

  Usually, in high speed logic systems such as those using emitting torque logic (ECL) or integrated circuits with gallium arsenide, the

  necessary adjustment of signal programming is carried out

  kills by adding a printed circuit trace having u-

  does precise length and entered into a signal path

  determined. This additional length of trace

  printed cuit plays the role of a retarding conductor in which the actual transmission delay is determined by

  the length of the conductor and by the configuration or availability

  driver's location. This particular method for con-

  There are at least two drawbacks in controlling signal programming. First of all, the additional length of circuit trace occupies a valuable useful place in the printed circuit, thus causing an increase in

  cost. Second, the characteristic impedance of the con-

  delay conductor is often difficult to control, due to

  problems of layout and construction.

  Other delay devices, consisting of

  discrete poses and suitable for introduction into a printed circuit board, are also described in the prior art. These devices are generally

  two types, comprising, on the one hand, the delay conductors

  daters with concentrated parameters and those with distributed parameters.

  The delay conductors with concentrated parameters consist of capacitors and inductors which are individually separate and connected in series. The total delay is equal to

  the sum of the inductances multiplied by the sum of the capacitances

  citations. Multiple floors are used to

  deaden the impedance and reduce the gradation of the time of

  rise caused by discrete inductors and capacitors.

  1 The more the delay driver must present perfor-

  high mances and higher is the number of stages required.

  The delay drivers with distributed parameters present

  try a distributed inductance and capacitance. Their per-

  formances are better than those of the type with localized parameters, but these devices are more cumbersome and are suitable only for short delays. It will be understood that, whatever the construction method used, the rise time of the two aforementioned retarding conductors is no better than a nanosecond for delays too.

  short. There are also large variations in the im-

  pedance in components, which distorts the signals to

great speed.

  In US Patent Application No. 691,193 to Carey and Brumbaugh, the content of which is included here for reference, a new and improved delay device for electronic signals is described, which includes a

  flexible microstrip circuit wound in the form of a con-

  compact strip conductor. The advantages of this improved retarder conductor according to American patent application No. 691,193 are an excellent impedance control, a compact arrangement, an improvement in rise times compared to the prior art and a reduction in

  distortion of signals at high speed.

  Although this device is suitable for uses in-

  There is, however, a need to further reduce

  ge the size of the electric signal delay device

  of the patent application 691.193, as well as a

  take care to further reduce the manufacturing price of a

  positive signal retarder of the type described in the

patent application 691,193.

  The difficulties mentioned above, and others

  still inherent in the prior art, are over-

  1 tees or reduced thanks to the delay device of electronic signals specific to the present invention. According to the present invention, there is provided a new device with delay path for signals, produced by superimposing a good conductive metal on a thin dielectric film.

  and flexible. The metal is deposited or pickled, so as to

  Maintain a route carrying out a signal conductor in a grounding screen. The signal conductor has a

  sinuous shape (for example, in a zigzag) and passes one or more

  both forward and backward on the dielectric film. This gives you a grounding plan

  by the conductive metal, which surrounds the conductor if

  general, the separation being ensured by a narrow gap of

  on either side of the driver. Two skates, or other available-

  sitives are provided at the ends of the signal conductor, to interconnect it with the circuit in which it is used. The flexible coplanar circuit is then wound tightly to give it a cylindrical shape. It is essential that the sinuous path of the signal conductor is designed so that when the flexible circuit is wound, the signal conductor covers the plane of

  earthing of the next layer (but not the conduct-

  signal layer). Where there may be some overlap of the signal conductors, this overlap should occur at a right angle and with minimal breakage from the ground screen. The wound circuit must be kept in this state by means of glue, this also stabilizing the effect of the dielectric. It can then be packaged and marked with a number, following

well known methods.

  In accordance with one embodiment of this

  invention, the delay of the retarding conductor is notable-

  increased (without increasing the length of the circuit conductor), using a dielectric and / or an adhesive having 1 high permeability. The use of a dielectric and / or a glue with high permeability makes it possible to minimize

  the dimensions, cost and resistance losses of the device

positive self-timer.

  The retarder device specific to the present invention has many advantages and characteristics compared to the two types of retarders commonly used,

  just like compared to self-timer conductors

  baked flexible microstrip of the type already described in the

  patent application No. 691,193. These different characteristics

  ques and advantages will be discussed in more detail below.

  Therefore, the signal delay device

  specific to the present invention constitutes an electrical component

  standard tronic, which can be used in high speed logic circuits and makes it possible to obtain a delay fixed with high precision for high speed electronic signals. In accordance with the present invention, this delay is ensured with minimal distortion and degradation of the delayed signals. In addition, this device is compact in shape and extremely economical to manufacture in

large series.

  The advantages mentioned above, and other enco-

  re specific to the present invention, will appear and will be understood by all specialists in the art under examination

  from the detailed description below and corresponding figures

laying.

  These figures, where similar elements are number-

  tees in the same way, represent respectively:

  Figure 1, a schematic view of a conductor re-

  printed circuit trace self-timer conforming to technical

than earlier.

  FIG. 2, a perspective view of a retarder conductor with localized parameters and with two stages, conforming

to the prior art.

  1 Figure 3A, a perspective view of a delay driver with distributed parameters, according to the prior art.

  Figure 3B, an enlarged perspective view, partial-

  part of the conductor in cross section

  retarder with distributed parameters of FIG. 3A.

  FIG. 4 is a plan view of an embodiment

  tion of a laminated circuit, comprising an opposite signal conductor of sinuous shape, used to produce a device for delaying electronic signals, conforming

to the present invention.

  Figure 5, a plan view of part of the laminated circuit of Figure 4, after winding, and conforms

to the present invention.

  Figure 6, a sectional view in elevation,

before line 6-6 of figure 5.

  Figure 7, a sectional view in elevation along

line 7-7 of figure 5.

  Figure 8, a plan view of another embodiment

  Lization of a laminated circuit, comprising a parallel signal conductor of sinuous shape, used to obtain a conforming electronic signal delay device

to the present invention.

  FIG. 9, a perspective view of the stra-

  Figure 8, after winding.

  Figure 10, a plan view of part of an au-

  yet another stratified circuit, used to obtain a

  positive electronic signal retarder conforms to the

present invention.

  FIG. 11, a perspective view of the stra-

  Figure 10, partially rolled up.

  FIG. 12, a perspective view of the stra-

  Figure 10, after winding.

  Figures 13A - 13C are examples of the packaging

  final ges used for mounting through holes of a 1 conforming electronic signal delay device

the present invention.

  Figures 14A and 14B are examples of assemblies

  ges used for surface mounting of a device

  electronic signal timer according to the present invention.

  Figure 15 is a plan view of a stratified circuit

  trustworthy, having a curved signal conductor

with multiple passes in parallel.

  Figure 16 is a plan view of a stra-

  tified having several exit points, making it possible to vary the duration of the delay of the signal conductor,

  in accordance with the present invention.

  Figure 17 is a perspective view of part of the laminate circuit of Figure 16, showing the pads

  or output connections with reduced capacitance.

  FIG. 18 is a perspective view of a laminated circuit similar to the laminated circuit of FIG. 16,

but after winding.

  Figure 19 is a perspective view of the multi-output laminate circuit of Figure 18, after placement

in an envelope. -

  Figure 20 is a perspective view of a circuit

  laminate according to the present invention and rolled up

with a triangular arrangement.

  Figure 21 is a perspective view of a circuit

  laminate according to the present invention and rolled up

with a rectangular layout.

  FIG. 22A is a sectional elevation view of the delay conductor of the present invention, showing

  a layer of high permeability glue, before wrapping it

  is lying. Figure 22B is a sectional and elevational view

  of the delay conductor of FIG. 22A, after the winding-

is lying.

  1 Figure 23A is a sectional and elevational view

  of the delay conductor according to the present invention pre-

  sensing a dielectric layer with high permeability, before the winding, and FIG. 23B, is a sectional view in elevation

  of the delay conductor of Figure 23, after winding.

  If we refer, first of all, to Figure 1, we

  sees that a delay conductor with a printed circuit trace

  me according to the prior art is indicated, in general, by 10. In FIG. 1, "A" and "B" are logic variable inputs (signals). If signal A is faster than signal B, it may be desirable to slow down or delay signal A. If signal A is

  sufficiently delayed, it will take the same duration for both

  A and B to move between the logic gates

  signed respectively by 12 and 14 and the logic device 16. As already mentioned above, the speed of the electronic signal or of the logic variable is a function of

  the length of the printed circuit trace, the arrangement

  tion of the trace or geometry and the material of the

  trat. Therefore, the particular length and geometry-

  sorts traces contained in box 10 will be likely to slow down signal A enough so that its time is equal to that of signal B, this difference being defined

  by b t. It goes without saying that trace 18 in solid lines represents

  has a first layer of printed circuit board, while trace 20, in dashed lines, represents a second layer of PWB. The two traces 18 and 20 are connected to their respective supply locations,

designated by 22 and 24.

  In summary, there is a delay in transmitting the

  general A when it crosses logic gate 12.

  If there is therefore a faster signal A (t1) compared to 1 to the signal B (t2), the signal A (t1) is then sent by a delay conductor 10 with trace of PC, where it is slowed down at the rate of t. Finally, 4 t is chosen so that

  that A (t4) is equal to B (t3). As a result, the va-

  logic riable A will correspond to logic variable B. As already mentioned, the method described above and specific to the prior art for delaying electronic signals suffers from the numerous drawbacks listed,

  including the use of a precious and essential place

  sand on the PWB, as well as the lack of precise control

  characteristic impedance of the delay conductor.

  If we now examine Figures 2, 3A and 3B, we see two delay devices currently in use and made up of discrete components which are suitable for mounting on a printed circuit board. In Figure 2, a parameter delay driver located, is indicated

  generally by 26. The delay driver with parameterslo-

  tagged26 is of the two-stage type and consists of

  individual capacitors and inductors connected in series.

  So, two capacitors 28 with multi-chip

  layer are electrically connected to a pair of inductors, the inductors surrounding a plastic core 32. The time to

  total delay is equal to the square root of the sum of the in-

  ductances multiplied by the sum of the capacitances, ie (EL) (EC). Multiple stages are used to dampen the impedance as well as to reduce degradation

  the rise time caused by the inductors and the condensers

  discrete torers. In order to obtain high performance of the delay conductor, it is necessary to use several

  floors. IN, OUT and GROUND terminals are provided in the

  capacitor and inductor lines, as shown in Figure 2 and the entire delay conductor is then wrapped or otherwise wrapped, as shown schematically

1 by 34 in Figure 2.

  In FIGS. 3A and 3B, a delay conductor with para-

  distributed meters having an inductance and a capacitance

  parts is generally indicated by 36. Normally, delay conductors with distributed parameters are made up

  a glass rod 38, to which a coating is applied

  40 silver ink, which constitutes a layout plan

  To the earth. The insulated wire 42 is then wound around the re-

  silver garment 40, the insulation of the wire 43 constituting the

  dielectric essential. Just as in the case of the

  delay driver with localized parameters, IN, OUT and GROUND terminals are provided, as required, and all

  of the component is then coated or wrapped in another material

  as shown schematically by 44 in Figure 3A.

  It will be understood that the performance of delay conductors with distributed parameters is better than that of the

  localized parameters, although the former are more

  brants and their use is limited to short delays.

  As mentioned earlier, there are different shortcomings

  disadvantages which are specific to the components of delay conductors specific to the prior art. For example, the two arrangements shown in FIGS. 2

  or 3 do not allow a better rise time

  their that a nanosecond, even for short delays. There are also wide variations in impedance in

  components, which distorts signals at high speed.

  If we now look at Figure 4, we see a

  laminate circuit used to obtain a delay device

  electronic signal dater conforming to this in-

* vention and generally indicated by 50. Laminate 50 consists of a good conductive metal bonded to a film or

  thin and flexible dielectric substrate. The metal is depo-

  dried or pickled so as to obtain a consistent circuit layout

  consisting of a signal conductor 52 and a grounding screen 54. An important feature of the present invention is that the signal conductor has a sinuous shape (for example, in a zigzag shape) and is arranged along one or more traces back and forth on the dielectric substrate 56. The earthing plane, or screen 54, is provided on almost the entire surface of the laminate and is separated from the signal conductor 52 by a

  narrow gap 58 on either side of it. A payment

  re of terminal pads 60 and 62 is formed at both ends of the signal conductors. The pads 60 and 62 make it possible to interconnect the delay device of the

  present invention with the circuit where it is to be used.

  Now looking at Figures 5 - 7, the con-

  retarder conductor for electronic signals specific to the present invention is obtained by tightly winding the

  flexible coplanar circuit 50 of FIG. 4, to give it

  ner a cylindrical shape. Part of the flexible circuit

  coiled co-planar is shown in Figure 5. It is es-

  sentiel that the winding trace of signal 52 is designed in a way

  denies that, when the flexible circuit is wound, the

  signal conductor 52 overlaps the grounding plane

  re 54 of the next layer and not the signal conductor.

  Of course, there must be some overlap of

  signal conductors adjacent to the surrounding layers

  sines which cover them, but these signal conductors must be overlapped, preferably, at right angles to the neighboring signal conductor and with a cut

  minimum in the grounding screen. The pre-

  fairy winding, clean, wound signal conductors

  to the present invention, is best represented in the figures

  res 6 and 7, which are cross sections.

  After the flexible laminate circuit 50 has been

  rolled, the inner layers of the stratified circuit

  1 then actually kill, as we can understand, a

  strip conductor arrangement, o the first and the last

  nier layer will have a microstrip type arrangement.

  Preferably, the areas available in microstrip, that is

  ie the first and the last layer, must have a width of signal conductor which is approximately

  double the width of the signal conductor in the sec-

  with strip conductor. The widest width of the con-

  signal conductor in the microstrip section of the circuit

  laminate 50 is indicated by 61 in FIG. 4.

  In an alternative embodiment of the present

  In the invention, the need to vary the line width of the innermost layer and the outermost layer is eliminated by eliminating the microstrip zone in the innermost layer and in the outermost layer. So in Figure 8, a flexible laminate circuit is generally indicated by 63

  and comprises a flexible non-conductive substrate 64, supporting

  both a conductive circuit layer consisting of a grounding plane 66 and a sinuous signal conductor 68. However, and unlike the laminated circuit of FIG. 4, the flexible laminated circuit 63 of FIG. 8

  has an overlapping earth zone 70. We understand

  dra that this overlapping area of land 70 will be the first

  first layer of the roller. As a result, all of the

  The following will be of the strip conductor type. A

  additional extension of base material 64, shown

  felt in 72, can be used in combination with the overlapping earthing zone 70, to constitute a protective or isolation cover for the earthing, which makes the interior assembly complete. For

  transform the delay conductor into a compact whole, we can use

  use an outside coverage area, indicated by 74,

  and which is simply an extension of the base material 64.

  1 Thus, after the active part of the laminated circuit 62 has been wound, the external covering area 74 can

  be rolled up to form a cover layer of pro-

  tection, leaving only pads 76 and 78 (fig.

  gure 9). It will be understood that logos and delay values can be printed on this layer, either before or

  after winding, as required.

  Figures 10 - 12 show other modes of re-

  alization of the present invention, in which the

  outermost circuit is of the conductor type

  belt. Thus in Figure 12, in a zone of extension

  management of the earth plan having no signal which is formed therein

  mée, is planned in 80 and extends beyond the skates of bor-

  only 76 'and 78'. The extension of the ground plane 80 may be

  be wound around the outer circuit layer to form a strip conductor arrangement. The logo of

  manufacturer and various brands may also be gra-

  ves on the grounding plan. Preferably, a window

  tre 82 is provided on the extension of the base material

  74 ', to form openings for the three support pads

  nector 76 ', 78' and the ground plane 66 '.

  It will be understood that the sinuous signal conductor 68 of FIG. 8 has a configuration different from the sinuous configuration 61 of FIG. 4. In FIG. 4, the sinuous signal conductor 61 comes back on itself following an opposite zigzag path. However, the driver if

  gnal 68 comes back on itself, following a zigzag path

  parallel. The arrangement of the signal conductor of the fi-

  gure 8 has the advantage of allowing a reduction in the total width of the delay conductor device, which makes it possible to reduce the overall size of the delay conductor and

  reduce the amount of space occupied on the circulating plate

  cooked. However, the parallel arrangement of the conductor

  signal has the disadvantage of a possible increase

25 198 46

  1 susceptible to the harmful effects of overlapping conduc-

  signal, since there is twice as much overlap

  elements by element in figure 8 compared to the layout

  face to face of the sinuous signal conductor of figure 4.

  In Figure 15, a signal conductor arrangement if

  parallel or compressed cloud, similar to the conductor of

  general 68 of FIG. 8, is represented at 68 ′ in the circle

  cooked flexible laminate 63 '. Figure 15 shows a mo-

  of realization which is an example of a sinuous multi-pass parallel arrangement, where the signal conductor returns to A on itself for a second pass, following a path in

  "U" 79, which makes it possible to obtain a smaller overall width

  ble and a high density of the circuit layout. Of course, any number of return passes can be used,

  with the embodiments of FIG. 15 (or of the figure

gure 4).

  The delay conductors discussed so far all have a chosen signal delay time, which depends on the length of the winding signal conductor. However, if we now look at Figure 16, we see that it is possible

  to have a simple signal delay device present

  both multiple delay times through the use of a signal conductor arrangement as described

  about figure 15 (parallel parallel sinuous arrangement

  pass) in combination with multiple connections.

  Thus in FIG. 16, a signal conductor sinu-

  them compressed and multipass is usually indicated by 100

  and has an input connection 102 and several connections

  output cables 104, 106, 108 and 110. Each connection

  The output 104-110 is located in the "U" loops 111 of the signal conductor 100. The total delay time of the

  flexible delay circuit shown in Figure 16 is also

  equal to 1 (T) and will be ensured by connections to the output

  110. In a similar way, shorter delay times

  1 wheat can be obtained by making connections to the outlet connection 108 (3/4 T), the outlet 106 (1/2 T) and the outlet connection 104 (1/4 T). Therefore, if a delay conductor arrangement as shown in Figure 16 is used, it is possible to obtain multiple signal delay times with a single signal delay device. It will be understood that, for reasons of clarity and understanding, the signal conductors 100 and the flexible circuit board 112 have been shown without any spacing between the signal conductor and the plane

  114. Therefore, it must be understood

  that, in practice, the earthing plane 114 will terminate at a chosen distance from the conductor

  signal 100 and to the input and output connections 102-

  110, so as to create the required insulating gap between these elements.

  The multiple-connection delay conductor represents

  felt in FIG. 16 can give rise to an embodiment

  preferred tion, in which the signal delay device

  simple, with multiple delay times, can overcome this

  place several delay devices each having a single delay time. This feature should allow

  lower manufacturing and storage costs

  ckage, as well as to ensure greater freedom in the

  design of electronic circuits. However, a diffi-

  The inherent culture of this signal conductor arrangement is that the multiple connections constitute discontinuities which can degrade the signal transmission characteristics specific to the time delay device.

  signal. In an effort to overcome this difficulty, each

  that the outlet pad is preferably introduced into a notch in the earthing plane, so as to reduce the capacitance of the pads. Thus in Figure 17, an outlet shoe, or connection 116, is shown before 1 its introduction into a recess, or cavity, 118 of the plane

ground 120.

  In a preferred embodiment, the conductor of

  delay at multiple connections of figure 16 can be

  rolled on itself, to obtain a cylindrical arrangement

  that, generally designated by 122 in FIGS. 18 and 19.

  In Figure 18, an angle of the rolled laminate circuit pro-

  pre to the present invention has a longitudinal slot

  which constitutes a flexible grounding tape 124.

  An opening 126 is made through the stra-

  tified, in order to expose the entry pad relatively

  large 128. Several pads or multiple outlet connections

  tiples are arranged below the entry pad 128 and are designated by 130-138 in FIG. 18. It will be understood that the laminated material delimiting the entry pad 128 and

  the 130-138 outlet connections will be made by the

  tie of the flexible non-conductive substrate of the strati-

trusted 122.

  If we now examine FIG. 19, we see that the rolled laminated circuit 122 can be introduced into

  a housing or packaging 140, rectangular or

  tre, which is provided with three conductive pins comprising

  both a ground pin 142, an input pin 144 and u-

  no output pin 146. These conductive pins are con-

  connected respectively to the ground strip 124, to the shoe

  128 and one of the output connections 130-138.

  Input and output pins 144 and 146 provide the

  electrical contact with the input pads and connections

  corresponding output elements, via flexible contacts 148 and 150. On the upper surface of

  the package 140 contains indices 151, which correspond to

  tooth at the different outlet connections 130-138. A bou-

  selection tone, consisting of a screw 152 provided with a

  adjustment slot 154 and an indicator 156, in the shape of an arrow

  1 che, are fixed to the rolled laminated circuit 122.

  During operation, the selection button 152 is rotated, either clockwise or in

  anti-clockwise, by means of slot 154, to obtain

  hold a chosen exit time, d6sign6 by the index 151. When the selection button 152 is rotated, the laminated circuit 152 starts to rotate, the output pin 146, in electrical contact with it, thus ensuring contact electrical with either of the 130-138 output connections. It should be noted that, whatever the output connection 130-138 with which the output pin 146 is in contact, the input pin 144 having an electrical contact 148, will remain in constant contact with the input pad 128 , while the grounding pin 142 will also remain in constant contact with the ribbon

  earth 124. It will be understood that, although the bro-

  input and output earth chutes 142, 144 and 146 suitable

  nant for insertion into a printed circuit board have

  shown, pins 142-146 could be replaced

  placed by suitable pads, for surface mounting.

  The rolled up laminate circuit, specific to the present

  Please use preferably an adhesive suitable for

  assemble the different layers and to help stabilize

  ser the effect of the dielectric constant on them.

  thereafter, the rolled laminate can be packaged, according to the

  needs. For example, in Figures 13a, 13B and 13C, the em-

  ballages produced by molding, soaking and filling are indicated respectively by 84, 86 and 88. As we already know, these packaging methods are well suited to allow mounting through holes of the delay device for

  electrical signal specific to the present invention.

  Alternatively, the arrangement of the signal pads and the earth pads can be designed to allow the

  surface mounting. These packaging for surface mounting

  1 face are indicated respectively by 90 and 92 in the figures

14A and 14B.

  It will be understood that the shape of the laminated winding circuit

  It does not have to be cylindrical. This must be wound on a triangular, square or au- mandrel

  again, so as to facilitate the orientation of the device

  tif to be wrapped on a printed circuit board, and in part

  particular, in the case of elements for surface mounting.

  This is how Figures 20 and 21 show a strati-

  wire rolled up in a triangle shape and rolled up laminate in a rectangular shape, which are indicated by 94 and 96 respectively. In order to maintain the desired non-cylindrical shape, the adhesive material introduced between the rolled layers of the laminate circuit must undergo heat treatment on the chuck, to have insurance

  that the shape remains invariable after the release of the stra-

  tified. It will also be understood that the present invention

  may include any other appropriate packaging provision

  required such as injection molding, placement in a shrink tube or metal container and is not

  limited to the specific packaging provisions shown

  seen in Figures 13, 14, 20 and 21.

  The signal and ground traces formed on the

  laminate circuit specific to the present invention can e-

  be made either by additive or subtractive processes and can have any geometry required to obtain a given impedance, to control crosstalk,

  to improve rise time and reduce overlap

  signal conductors. The width of the signal conductor and the gap between it and the ground plane may vary. Similarly, the material

  laminate can be changed as required. We can u-

  using filler materials to modify the constant

  1 dielectric, permeability or physical characteristics

  sics. On the other hand, composite films can be used in combination with the own laminate circuit

  to the present invention. As already mentioned, one can use

  read glues as needed, to maintain

  wheat the circuit as well as to improve its characteristics

  electric ticks. As will be explained in more detail below

  next, dielectrics and / or adhesives with permeability-

  high permissiveness can be used to increase

  the delay caused by the device. Finally, the time to re-

  late and the impedance of each retarder conductor may

  can be set to any appropriate value.

  It will be understood that the reduction in size, the

  cost and resistivity losses of delayed conductors

  teurs described in the previous figures are improvements

  highly desirable. It was found that the delay in the

  delay conductor can be significantly increased without increasing

  lie the length of the circuit conductor, using

  a dielectric material having a high permeability.

  This phenomenon can be explained as follows: the transmission speed in the circuit is determined by the following relationship: cov = transmission speed Vp Er r C = speed of light E = dielectric constant r relative Pr = relative permeability Par The delay time is therefore calculated as follows: d _ Er r / y T = delay Td conductor length C 2579846f

  1 It is obvious that if the length of the conductor is minimum

  In order to reduce the size, the manufacturing cost and the losses by resistivity, it is necessary to increase Er ouipro The increase in Er alone gives rise to an increase in the capacitance and, consequently, to a decrease in the

  pedance. To combat this phenomenon, the width of the conduc-

  tor will have to be decreased, which would make the manufacturing -

  excessively difficult and would give rise to resistance

unacceptable driver.

  If we simultaneously increase / r and Er, and if we

  keeps their relationship constant, impedance can be main-

  held within the specified range using widths of

  conventional driver while increasing the delay time.

  This can be achieved by two methods, comprising (1) doping the glue with a material with high permeability

  or (2) doping the dielectric assembly with such a material.

  high permeability material. These two provisions are re-

  shown, respectively, in Figures 22A-B and 23A-B.

  In FIG. 22A, part of a raw circuit (before winding) is generally indicated by 100 and comprises a layer of dielectric substrate 102, having a trace of conductive circuit 104 and a ground plane 106 thereon.

  and between which is placed a layer 108 of adhesive

  high permeability sword. After filing a second cou-

  che glue 108 on the grounding plate 106, the traces of circuit 104 and the exposed glue surfaces 110 and 112, the circuit 100 is wound on itself so as to

  obtain the delay device consisting of a stra-

  tified rolled up and shown in Figure 22B.

  While Figures 22A and 22B show a con-

  delay conductor comprising a layer of high-performance adhesive

  stability, FIGS. 23A and 23B show a device

  delay device using a circuit comprising a di-

  electric with high permeability and generally designated

  1 par-114. The delay device 114 comprises a di-

  electrical 116 with high permeability, comprising a plane of

  ground 118 and a trace of circuit 120 thereon

  this. As in the embodiments already described above, the grounding plane 118 and the trace are separated by gaps 124, so as to put

  bare part of the dielectric surface. Before wraps-

  ment, a glue with high permeability is applied to the ground plane 118, the trace 120 and the gaps 122,124, then

  the circuit 114 is wound, as shown in Figure 23B.

  Glue and / or dielectric permeable materials

  high bility used in the embodiments of

  Figures 22 and 23 include a material of the low per-

  te having a relatively high dielectric constant. These materials are currently used for microwave applications and include ferrites and garnets. A

  preferred process for obtaining the high permeability material

  necessary for the delay conductor circuit

  is to dop the entire dielectric with the material with high permeability (as indicated in FIGS. 23A and 23B),

  in order to obtain maximum and minimum delay times

  ser the dielectric interfaces. It will be understood that any of the embodiments shown in Figures 4-14, or in the earlier US patent application

  no 691.193 can be used in combination with the dielect

* stick and / or layers of glue with high permeability such as

  those described above with reference to FIGS. 22 and 23.

  The delay conductor for own electronic signal

  3 to the present invention has different characteristics.

  Ques and advantages compared to delay drivers

  close to the prior art. These benefits include

  improving the control of impedance and its uniformity

  improvement of the rise time for the

  delay in the case of short delays (less than 2 to 5 nano-

  1 second), a reduction in the size of the packaging for short delays, a reduction in deformation

  signals, the possibility of adaptation to over-mounting

  face, reduced manufacturing and assembly costs and the possibility of obtaining delays in the lower range

at the nanosecond.

  On the other hand, the signal delay device é

  electronics specific to the present invention also includes

  certain features and advantages over

  to the delay conductor with flexible microband circuit

  described in US patent application No. 691,193.

  For example, the present invention reduces manufacturing costs because there is no separate layer

  grounding and cover film, like this-

  the was essential with the driver with clean delay

  to the earlier patent application. On the other hand, and for u-

  do same signal conductor width, outside diameter

  laughter of the whole is significantly reduced and this, special-

  Also, for longer delays. In an analogous manner and for the same overall diameter, the signal conductor can be twice as wide and the dielectric twice

  thicker. As a result, variations due to tolerances

  manufacturing rances will have less influence on the ca-

  electrical characteristics. This characteristic presents

  of particular importance, since the normal width of the conductor must be increased from 0.05-0.075 mm to 0.1 - 0.15 mm with the delay device specific to the

present invention.

  Yet another feature of the present invention

  tion is that only one side access is provided to the skates

  input, output and grounding. We can also

  It is conceivable that the present invention allows a certain

  taine improvement in electrical characteristics compared to

  wearing of the delay device specific to the patent application

  1 previous S.N. 691.193, thanks to its provision "semi-co-

  axial ". Indeed, as there are earth screens above

  lower and lower, just like screens on both

  sides of the signal conductor, this arrangement can really

  significantly improve electrical performance compared to the delay conductor with flexible microstrip circuit

previously described.

Claims (1)

1 CLAIMS 1. Delay device for electronic signals to be used in a circuit trace and comprising: a flexible coplanar circuit, said flexible circuit comprising a non-conductive substrate (56) having opposite surfaces, said substrate comprising an electrically conductive material, arranged on one of said opposite surfaces; said conductive material consisting of a grounding ground plane (54) containing a signal conductor (52), said signal conductor (52) being separated from said grounding plane (54) by a gap (58 ) on either side of said signal conductor (52) and said flexible coplanar circuit being wound in a first direction. 2. Device according to claim 1, characterized in that said signal conductor (52) has a zigzag arrangement in at least said first direction. 3. Device according to claim 1, characterized in that said flexible wound circuit defines several layers, said layers comprising alternating layers of non-conductive substrate (56) and of conductive material (54), in that the most inner and outermost layer consist of a single layer of conductive material (54) on a surface of said non-conductive substrate (56) and define a microstrip (58), and in that the remaining layers are formed a non-conductive substrate (56) interposed between said conductive material and defining a strip conductor (52). 4. Device according to claim 3, characterized in that said signal conductor (52) has a selected width 1 and in that said signal conductor (61) in said microstrip (58) has a width greater than that of said conductor signal (52) in said strip conductor. 5. Device according to claim 4, characterized in that said microstrip signal conductor (61) is approximately twice the width of said strip signal conductor. 6. Device according to claim 2, characterized in that said flexible wound circuit defines several layers and in that the zigzag arrangement of the signal conductor (52) in a layer is hidden and covered by the zigzag arrangement of a conductor signal signal (52) located in an adjacent layer, the signal conductor of a layer overlapping the signal conductor of the adjacent layer at an angle of about 90. 7. Device according to claim 2 or 6, characterized in that said wound flexible circuit defines several layers and in that the zigzag arrangement of the signal conductor (52) in a layer is essentially opposite to that from the ground plane of an adjacent layer, substantially all of the signal conductor of a layer overlapping the ground plane of an adjacent layer. 8. Device according to claim 1, characterized in that said earthing plane (54) covers essentially all of said non-conductive substrate (56), with the exception of said signal conductor (52) and said gap (58). 9. Device according to claim 1, characterized 1 in that said earthing plane (66) has a first end and a second end and comprises a first extension (70) of the earthing plane starting from said first end of said earthing plane (66), said first extension of the earthing plane (70) having no signal conductor. 10. Device according to claim 1, characterized in that said earthing plane (66 ') has a first end and a second end and comprises a second extension (80) of the earth plane starting from said second end of said earthing plane (66 ′), said second extension of the earthing plane (66 ′) not comprising a signal conductor. 11. Device according to claim 9, characterized by a second extension (80) of the grounding plane, starting from said second end of said grounding plane -66), said second extension (80) of the plane of earthed with no signal conductor. 12. Device according to claim 9, characterized in that said non-conductive substrate (64) extends outwards beyond the first extension (70) of the earthing plane. 13. Device according to claim 10, characterized in that said non-conductive substrate (64) extends outwards beyond the second extension (80) of the earthing plane. 14. Device according to claim 13, characterized by a first device for connecting said first signal conductor (68) to said circuit path and by a second device for connecting said earthing plane 1 (66) to the said circuit layout. 15. Device according to claim 14, characterized by a window (82) formed in said extended non-conductive substrate (64) to give access to the first and second connection devices. 16. Device according to claim 1, characterized by a first device for connecting said signal conductor (62) to said circuit path and by a second device for connecting said grounding plane (54) to said path of circuit. 17. Device according to claim 16, characterized in that the first connection device comprises a pair of connection pads (76, 78) on said non-conductive substrate (56) and in that the second connection device comprises a connection pad on said non-conductive substrate (56). 18. Device according to claim 1, characterized by the use of glue to maintain the assembled said wound flexible circuit device. 19. Device according to claim 2, characterized in that said zigzag arrangement of the signal conductor comes back on itself at least once and in that said signal conductors coming back on themselves (52) are arranged in a zigzag with opposite directions. 20. Device according to claim 2, characterized in that said zigzag arrangement of the signal conductor comes back on itself at least once and in that said signal conductors coming back on themselves (68) are arranged in zigzag with parallel orientations. 1 21. Device according to any one of claims 1, 2 or 20, characterized in that said signal conductor (68 '100) comes back on itself more than once and comprises a connection device for input (102) for connecting said signal conductor (68 '- 100) to said circuit layout; an output connection device for giving access to said signal conductor (68 '- 100) at several connection points (104, 106, 108, 110) along it and for connecting said signal conductor signal (68'-) to said circuit layout at one of said connection points; and a ground connection device for connecting said ground plane (114) to said circuit path. 22. Device according to claim 21, characterized by a device (152) for selectively positioning the said outlet connection device at one of the different connection points (130, 132, 134, 136, 138). 23. Device according to claim 22, characterized in that said earthing plane comprises a flexible earthing strip (124) and in that said earthing connection device is connected to said flexible grounding tape. 24. Device according to claim 21, characterized by a cavity in said earthing plane at each of the different connection points and by an outlet connection device disposed in said cavity. 25. Device according to claim 1, characterized in that said flexible coplanar circuit is wound according to a cylindrical arrangement. 26. Device according to claim 1, characterized in that said flexible coplanar circuit is wound in a triangular arrangement (94). 27. Device according to claim 1, characterized in that said flexible coplanar circuit is wound in a rectangular arrangement (96). 28. Device according to any one of claims 1 to 27, characterized in that said flexible coplanar circuit comprises a dielectric material with high permeability. 29. Device according to claim 28, characterized in that said non-conductive substrate comprises said dielectric material with high permeability. 30. Device according to claim 28, characterized in that an adhesive is used to assemble said wound flexible circuit. 31. Device according to claim 30, characterized in that said adhesive comprises said dielectric material with high permeability. 32. Device according to claim 29, characterized in that said electrical material with high permeability is introduced by doping into the non-conductive substrate. 33. Device according to claim 31, characterized in that said dielectric material with high permeability is introduced by doping into said adhesive.   1 34. Device according to claim 28, characterized in that said material with high permeability comprises a material chosen from the group consisting of ferrites or garnets.   35. Device according to claim 29, characterized in that said material with high permeability comprises a material chosen from the group consisting of ferrites or garnets.   36. Device according to claim 30, characterized in that said adhesive comprises said dielectric material high permeability.