FR2566980A1 - TRANSMISSION AND RECEPTION PATH MITIGATION CIRCUIT FOR TELEPHONE APPARATUS AND APPARATUS INCLUDING SAME - Google Patents

Abstract

CIRCUIT FOR THE CONTROLLED ATTENUATION OF THE TRANSMISSION AND RECEPTION PATHS OF A "HANDS-FREE" TELEPHONE DEVICE INCLUDING LOGARITHMIC ANALOGUE-DIGITAL CONVERTERS 133, 134, DUE TO ONE CONVERTER PER CONVERSATION PATH, SWITCHES 131, 132 DUE TO ONE ATTENUATOR PER CONVERSATION PATH AND A DECISION LOGIC CIRCUIT BY WHICH THE SAID ATTENUATORS ARE CONTROLLED, EACH ANALOGUE-DIGITAL CONVERTER BEING ARRANGED TO GENERATE A DIGITAL WORD CORRESPONDING TO THE AMPLITUDE OF THE SIGNAL ON ITS SIGNAL PATH RESPECTIVE CONVERSATION AND THE SAID DECISION LOGIC BEING ARRANGED TO COMPARE THE TWO WORDS AND DETERMINE THE RESPECTIVE ATTENUATION IN THE TWO CONVERSATION PATHS IN RESPONSE TO THE TWO WORDS, SO THAT THE TOTAL LOOP GAIN IS HELD APPROXIMATELY CONTINUOUS.

Description

The present invention relates to telephones

  nics and, in particular, the possibility of integrating the "hands-free" and "amplified listening" functions. A telephone set, in its simplest form, comprises a transmission path, a reception path and an interface circuit between the two-wire subscriber line and the 3 4-wire telephone set, this interface being called

  2-wire-4-wire converter, line interface circuit or simply network.

  Generally, the transmission path of the station consists of a microphone and an amplifier and the reception path of an amplifier which controls a headset or a speaker. In a hands-free device, the speaker and microphone can be

find in the same enclosure.

  For hands-free operation, the specifications of the device require certain gains for the transmission and reception paths and also impose a reflection attenuation with regard to the part of the signal arriving from the line which reappears in the form a line signal. Due to the acoustic coupling between the speaker and the microphone, an attenuated version of the reception signal always appears on the path

  resignation. Acoustic coupling takes place in the housing, if the loudspeaker

  speaker and microphone are in the same enclosure, and by reflections in the room. To obtain the necessary gain levels and attenuation of reflection, it is therefore necessary to introduce a certain attenuation on the loop. Attenuation switches from one path to another depending on the speech levels. As the line interface network is not ideal, there is also a certain local effect coupling which causes the appearance of the transmission signal on the reception path. The attenuation thus switched is also

  necessary to maintain the total gain around the device itself

  below the unit, so that there is no instability. In practice, however, it is usually the reflection attenuation that determines

  what mitigation should be introduced.

  In the past, hands-free devices have included discrete analog circuits using simple switches as attenuators. Such a device uses many components

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  discreet and is therefore expensive. In addition, given the simple switching systems and analog circuits currently used, the performance of "hands-free" instruments may

  to be far from their optimal level.

  The object of the present invention is to minimize

or overcome these disadvantages.

  According to the present invention, a circuit is provided for the controlled attenuation of the transmission and reception paths of the speech of a "hands-free" telephone apparatus, this circuit comprising analog-digital logarithmic converters, one for each path. of speech, attenuators switched on each of the speech paths and a logic decision circuit by which said attenuators are controlled, in which each analog-to-digital converter is adapted so as to generate a digital word corresponding to the amplitude of the signal on sound respective speech path, o said decision logic is adapted so as to compare the two words and, in response, to determine the relative attenuation of the two speech paths so that the gain of

  total loop is kept substantially constant.

  An embodiment of the present invention is now presented with reference to the accompanying plans o: - Figure 1 is the schematic representation of a telephone apparatus comprising the control circuit, - Figure 2 is a schematic representation of the control circuit, Figure 3 represents the construction of the analog-digital converters of the circuit of FIG. 2, - FIGS. 4a and 4b represent the off-chip circuits

  associated with the analog-digital converters of figure 3.

  - Figures 5a and 5b show an analog-digital converter with volume control to be used with the circuit of Figure 2, - Figure 6 is a state diagram for the decision logic of the control circuit, - Figures 7a to 7j illustrate the operation of

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  control path signal attenuators,

  - Figure 8 shows the circuits of a decoder stage.

  Referring to FIG. 1, the telephone circuit comprises three integrated circuits, namely an operating circuit 11 which provides the basic telephone functions, an audio output circuit 12 for the "loudspeaker" and "ringtone" elements. tone "and a control circuit 13 for the controlled attenuation of the transmission and reception paths of" hands-free "speech o The operation of circuit 11 is described in British patent application number 83 17706 and that of circuit 12 is described in British patent application number 8402592. It is however obvious that the use of the control circuit 13 is not

  limited to the specific circuits 11 and 12 shown in FIG. 1.

  The control circuit 13 comprises attenuators, on the transmission path, 121, and the reception path, 132; these attenuators are digitally controlled in response to the levels of detected transmit and receive voice frequency signals (Tdet and Rdet). Typically, they consist of simple resistance chains and are logarithmic with an increment of 3 dB, for

  example, and a maximum attenuation of 69 dB.

  The attenuators can be in one of the following three stable states:

  State R: path R "passing" and path T "blocked".

  State T: T path "passing" and R path "blocked".

  State S: the two attenuators are midway between the

"passing" and "blocked" positions.

  The user can choose four operating modes:

HF - "hands-free" mode.

  LS - "amplification" mode using the microphone of the

combined.

  PA - ordinary (or combined) telephone mode.

  PB - "combined" mode with a small attenuation factor

voice controlled.

  The signal path attenuation factor, switched in each mode from state R to state T, is called "depth J

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  total switching "and can be preselected by an optional metal mask. In PA mode, the switching depth will normally be zero. PB mode is provided for certain handsets Or the reflection attenuation may be marginal even in" combined ". There may be a reception volume control actuated by the user by adjusting the attenuation of the path R" lpassant ". This control also regulates the depth of the

  switching so that there is less switching at reduced volume.

  For any given volume and mode adjustment, the total depth of the switching is kept constantly constant at a value which is known to be sufficient to meet the requirements for attenuation of reflection. The digital words representing the magnitude of the signals

  Rdet and Tdet (as well as noise and volume signals; see below

  after are determined by analog converters-

  digital (CAN) 133 and 134. The attenuators and logic of the analog-to-digital conversion function are on the chip while the analog-to-digital conversion comparators are not on the chip. The signal converters perform the half-wave rectification and peak tracking function and produce a logarithmic digital representation of the signals with an increment (one bit) of 3 dB and a dynamic range of 69 dB. The dynamics, or the time base of analog-to-digital conversions (speed of follow-up to attack and fallout of the signal) can be preselected using an optional metal mask from a sequence of shapes time base wave derived from the

  division by two repeated from a reference clock.

  The clock is generated on the chip with an external R and C circuit

to set the frequency.

  The state (R, T, or S) is determined by the magnitude of the digital words representing Rdet and Tdet with respect to thresholds. There are six thresholds: - absolute upper and lower thresholds for Rdet,

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  - absolute upper and lower thresholds for Tdet,

  - two differential thresholds which are compared with (Rdet-Tdet).

  The six thresholds can be preselected by optional metal masks. Two thresholds are provided in each case so that there is hysteresis in the decision logic. When Rdet and Tdet are below their absolute thresholds, the state is at S (wait) and when Rdet and Tdet are above their absolute thresholds, the state is at R or T depending on the magnitude of (Rdet-Tdet ) relative to

differential thresholds.

  When a state change from S to R or from S to T or from R or T to T or R, the attenuators of the signal paths carry out a rapid ramp of steps of attenuation. change of state from R to S or

  from T to S, there is a "hold" delay, followed by a "slow" ramp -

  At all times, the attenuators of the paths R and T adjust together so that the total loop gain is constant. The rates of fast and slow ramps as well as the holding time are preselected by optional metal masks at

  from the previously mentioned time base waveform sequence

  demment. The holding ramp and the slow ramp following a decision to enter the standby state mean that the attenuators do not

  not respond to small pauses that occur in conversa-

  normal tion. This is essential to avoid cut-offs which, subjectively, are completely undesirable. At the same time, the rapid ramp effect that occurs for all other transitions prevents the loss of attack syllables in conversation. In "hands-free" mode, an automatic noise protection function responds to stable background noise in the emission signal (ambient noise). Analog to digital conversion of

  noise has characteristics of slow attack and retom-

  quick. When the ambient noise is increased, the "passing" attenuation of the path T is increased and the "passing" attenuation of the path R is reduced, the absolute thresholds are also modified so as to

  they stay above the ambient noise level.

  FIG. 2 is a diagram of the control circuit which comprises eight main elements:

  - logic and attenuator for analog conversion-

digital transmission signal,

  - logic and attenuator for analog conversion-

digital reception signal,

  - logic and attenuator for analog conversion-

  digital noise guard function,

  - logic and attenuator for analog conversion-

  digital volume control, - thresholds and decision logic, attenuator control logic, - time base signal generator,

- mode selection.

  In addition, there are the two signal path attenuators. In principle, the control circuit is made in ISOCMOS technology using a standard cell library for most of the logic and an arrangement "à la

  request "for the attenuators and their decoders.

  Analog-to-digital converter circuits

  These circuits are shown in Figure 3.

  Analog-digital conversion of R and T signals Only the logic and the attenuator for analog-digital conversion are on the chip, the comparator and the reference voltage being outside. FIG. 4a represents, for the analog-digital conversion of the path R, the circuits arranged outside the chip. The heart of the logic is a five-bit up-down counter whose Rdet output is a word of five

  bits corresponding to the digital conversion of the signal level.

  Rdet is decoded to control the attenuator so that Rdet = 0

  gives zero attenuation while Rdet = 23 gives attenuation

  maximum tion. A talk signal is applied to Rin, a muted version of which appears on the "To R-comp" pin. The signal is amplified, filtered and compared to a reference voltage Vref. If the negative peaks of the signal are less than Vref at this point, the

  comparator then sends a logic state 1 to pin "From R-comp".

  The analog-to-digital conversion logic responds by incrementing the counter, ie Rdet, by one unit downwards, so that the signal on "To R-comp" is now greater. This process continues until a negative peak at the comparator exceeds Vref. The output of the comparator then goes to the logic state O at each peak of the signal and the logic responds by incrementing Rdet by one unit upwards. Consequently, if a stable tone is applied to Rin, the "stable state" response of the analog-to-digital conversion consists in permanently jumping Rdet between two adjacent values. This is not a problem because hysteresis is

  incorporated into other parts of the logic.

  The logic includes delay and clock signal selection circuits. When counting up is necessary, CKA is selected to control the counter; it is a relatively fast time base. When counting down is required, CKB, which is much slower, is selected and a delay is triggered before the validation of the CKB pulses. It's that

  which gives the analog-digital converter its characteristics

  rapid rise and fall fall ticks

  behaves like a peak follower circuit. A pulse widening circuit

  The logic input is used to "clean up" the waveform from the comparator so that bursts of pulses, very short or noisy, cannot cause the logic to malfunction. The gain of the external amplifier and Vref are chosen so that the dynamic range of the analog-digital converter can include signals from around 1.7 mV peak to 3V peak. In practice, signals that exceed about 1V peak occur so that the dynamic range of the converter

  analog-digital is not fully used.

  Analog-to-digital converter for noise protection The analog-to-digital converter for noise protection operates on the same principle as the analog-to-digital signal converter but it only includes an eight-position attenuator, Ndet, having values between O and 7. The slightly different off-chip circuits are illustrated in Figure 4b. In this case, when the counting is done upwards, a very slow time base, CKC, is transmitted to the counter and when the counting is done downwards, CKD is selected, which is slightly faster. In both cases, there is always a delay

  before validation of the time base. The analog converter

  Digital noise protection therefore presents a very slow rise and a relatively rapid descent and tends to remain at the peak level of any stable continuous signal in Ncap and cannot respond to voice signals. The signal in Ncap is a version of Tin which has passed through a low-pass filter. Ndet therefore represents the continuous low frequency background noise in the room. As before, with a stable entry, Ndet jumps between two adjacent values. In this case, a digital hysteresis must be included so that the 3-bit word Ndet routed to the rest of the logic is constant for stable ambient noise. The values of Ndet are between 1 and 7, which gives an effective noise protection action over a typical range of 18 dB. The additional attenuation factor added to the path "T" or eliminated from the path "R" by the protection circuits

  noise is Ndet / 2 and is therefore at most 9dB.

  Volume control analog-to-digital converter

  The receiving volume must be controlled by a continuous voltage

  nude derived from a potentiometer. So you need an analog converter

  also digital for volume. Figures 5a and 5b thus represent a simplified version of the other analog digital converters. The resistance values of the attenuator follow a

  hyperbolic progression (inverse) and the steps are therefore regu-

  evenly spaced if a linear volume potentiometer is used.

  Only one clock is used and there is no delay. We use

  read the digital hysteresis again to eliminate the jump. If the continuous level in Vin is such that the analog-digital converter is at the limit between two steps, the system is likely to move randomly between these steps, in addition to the jump

  which occurs as described above. We use a hys-

  two echelon teresis to eliminate this phenomenon. The word Vdet from

  3 bits routed to the rest of the logic can have 8 values

  taken between 0 and 7, this last value representing the maximum volume,

  which corresponds to a typical volume control range of 21 dB.

  The set of thresholds and decision logic takes the words Rdet and Tdet of 5 bits, compares them with the preset threshold values and decides in which state the telephone set should be. These functions can be summarized as follows: - Rth, Tth and Hyst are pre-set words which determine the absolute seats; - absolute threshold R lower: Rthl = Rth + Ndet / 2, - absolute threshold R higher: Rth2 = Rthl + Hyst - absolute threshold T lower: Tthl = Tth + Ndet - absolute threshold T higher: Tth2 = Tthl + Hyst, -si Rdet is greater than or equal to 3 Rthl, we then have RI = 1, otherwise R1 = O. The same is true for R2, TX and 12. P2 and T2 are resynchronized versions of RI and T1 to avoid the problem of

  speech interruptions.

  Dthl and Dth2 are. preset words for differential thresholds. The 5-bit word Ix and the Togic signals J and K come from the attenuator control block. J; and K are determined by the switching depth and are used to adjust

Dthl and Dth2.

  The decision logic receives the centers R1, R2, T1, T2, DI, D2 and Hrem to make the decision as to which state should be adopted, R, S or T. The state diagram in Figure 6 defines in detail the decision logic. Urem is the logic signal from the control: from the attenuator which briefly eliminates absolute hysteresis. To indicate state, a single output provides a three-level signal. This is beneficial for

  circuit testing and evaluation.

  For the mode selection, the two logic inputs Ma and Mb determine the mode: operating by choosing one of the 5-bit words

  HF, LS, PA or PB qi are preset on the chip as indicated in the table below

  after. The value of the mode thus selected determines the depth of the commu-

  tation. This block also provides Ma which, with Mb, selects 1EC the Tinl or Tin2 input. In the case of "hands-free" mode, the transmission path is connected to the pre-amplifier for the electret microphone in the body of the telephone set. For other modes,

  the handset microphone preamplifier is selected.

  _ Ma Mb Typical mode value (M) Operation Q 1 9 HF: hands-free 1 I 5 - LS: amplified listening 0 0 25 (= -7) PA: handset 1 0 28 (= -4) PB: handset with switching Attenuation control The attenuation control block establishes two bit words Xt and Xr which attack the attenuators of the signal path. Their values can be between 0 and 23 (typical value), where 0 gives zero attenuation and 23 gives, for example, an attenuation of 69 dB. The inputs of this block are: Ndet, Vdet, Mode, as well as the three status lines R, S and T coming from the decision logic. For an operating mode and a volume adjustment of

  reception, the switching depth is constant.

  The signal path attenuators are controlled as follows: Xt is constantly compared to a 5-bit word Ix whose value is determined by the state. When Xt = Ix, the attenuators of the signal path are in their correct position and the value of Xt is kept there. When Ix takes a new value, Xt follows under the control of the appropriate clock until Xt = Ix again. If the mode is HF or LS: in transmission, T: Xton = Ix = Il = Ndet / 2, - in reception, R: Xtoff = IX = I3 = Ndet / 2 + M + V,

  - pending, S: Xtsty = Ix = 2 = (Il + I3) / 2.

  if the mode is PA or PB: - Xton = Il = 0 Ji - Xtoff = 13 = M + V, - Xtsty = 12 = (-Il + I3) / 2 It is obvious that when the selected mode is PA or PB

  and that V = O, we then have Il = I2 = I3 = O and Xt = O, at all times.

  Xr is derived from Xt. When Xr = Xt, we then have Xr = Xr ff and vice versa. Xr is calculated by inverting the word Xt and adding it either to M or the inverse of V and to a constant Q. Q can take one of four values depending on the mode and depending on whether M + V is equal or not zero. The values of Q are chosen to bring Xr to the required position and depend on the fact that the 5-bit word Xr is

  recycles when it exceeds its maximum value.

  The operation of the attenuation control is illus-

  very in FIGS. 7a to 7j which represent the "blocked", "passing" and "waiting" positions of the signal signal attenuators as a function of the reception volume for the four operating modes. These figures

  also represent the effects of the noise protection circuit.

  The 5-bit word Xt is generated by an up-down counter in a manner very similar to that used in analog-to-digital converters. When the new state is R or T, a relatively fast time base, CKE, is directed to the counter and the signal path attenuators transition quickly enough to move to their new positions. When the new state is S, a slower time base, CKF, is selected, which gives a slow ramp rate to return to the "waiting" state o Before triggering the slow ramp, there is a delay about seven CKG periods to give the holding time that precedes the

return to "reserve" mode.

  Time base signal generator The time base signal generator controls all synchronization on the chip. It can be composed of a simple relaxation oscillator with capacitor and off-chip resistance to determine the frequency and be followed by a two-phase generator for 01 and 02 which are pulse trains without overlap controlling most of the logic . There are then a number of frequency division stages with 01 as input

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  to provide a wide range of clock waveforms from which one can select the time base signals to control the specific timing conditions on the chip. Several different clock waveforms, labeled CKA to CKG, are required for the various parts of the logic. A connection matrix allows you to select them on one of the 16 floors thanks to

an optional metal mask.

  Attenuators and Decoders Attenuators The chip contains six attenuators with decoders, two signal path attenuators and one attenuator for each of the four analog-to-digital converters. All attenuators, except the volume control, have 3 dB increments. For the analog-to-digital noise converter, an 8-step attenuator can be used, and a 10-step attenuator for the analog-to-digital volume converter. They are also simple strings of resistors in series. The other four attenuators all preferably have 23 steps and are more easily produced with resistors in series for the upper half of the chain and an R-2R network for the lower half. Decoders Figure 8 shows the circuit of a b-bit decoder stage. This is achieved with "pseudo NMOS" in preference to a completely complementary circuit, which allows a considerable saving of space. A decoder normally has its control transistors in parallel so that they are all in the open state when a stage is selected and the static current flows in all the other stages. To avoid this significant current consumption, the decoders on this circuit use control devices in series. In the closed state, the stage is selected and only the selected stage consumes current. The charging device b

  P channel is electrically small, which gives a consumption

  Typical 3 A current for the entire decoder. This method is feasible because the slow response of such a structure does not 13 <o2566980

do not interfere with this application.

  Although the circuit described here is intended to be used in a telephone device, it appears that it is not limited to this device only and can be used in other applications such as, for example, intercom systems.

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Claims (7)

  1. Circuit for the controlled attenuation of the transmission and reception paths of a telephone conversation   "hands-free", characterized in that it includes analog converters   log-numeric ques-numerals (133, 134), at the rate of a converter per conversation path, switched attenuators (131, 132) at the rate of one attenuator per conversation path and a decision logic circuit by which said attenuators are controlled, each analog to digital converter being arranged to generate a digital word corresponding to the amplitude of the signal on its respective speech path and said decision logic being arranged to compare the two words and determine the respective attenuation in the two paths of conversation in response to the two words so that the total loop gain is maintained approximately constant.   2. Circuit for the controlled attenuation of the transmission and reception paths of a telephone conversation   "hands-free", characterized in that it includes analog converters-   digital logarithmics (133, 134) at the rate of a converter per conversation path, an analog-to-digital converter for noise protection, switched attenuators (131, 132) at the rate of one attenuator per conversation path, a logic circuit decision by which said attenuators are controlled and a basis   of time to provide synchronization signals to converts-   analog-digital and decision logic circuits, the analog-digital transmitting and receiving converters being adapted to generate digital words corresponding to the relative amplitudes of the signals on the two speech paths and the decision logic circuit being arranged for compare said words with predetermined words stored in memory and thus determine the respective attenuation to be introduced in the two conversation paths, while the converter   analog-digital noise guard is suitable for en-   generate another digital word in response to a practically continuous background noise signal on the transmission path, the logic of 2566980   decision consequently increasing the attenuation of the emission path and di-   reducing the attenuation of the reception path, this arrangement being such that the respective attenuation of the reception and transmission paths provides   a substantially constant total loop gain.   3. Circuit according to claim 2 characterized in that it comprises an analog-digital converter for volume control by which an attenuation factor is transferred from the reception path to the transmission path.   4. Circuit according to one of claims 2 and 3, characterized in that   that each of the analog-to-digital converters compares an input signal 3 with a reference voltage and attenuates this signal so that the peak values of the attenuated signal correspond at the reference voltage.   5. Circuit according to claim 4, characterized in that each of said digital words is generated by an up-down counter from a comparison of a time base signal with a   digital signal corresponding to the attenuated speech signal.   6. Circuit according to any one of claims 1   to 5 and taking the form of an integrated circuit.   7. Telephone apparatus equipped with a control circuit such as   as described in one of claims i to 6.