FR2559286A1 - Information processing machine for interpretation of logic programming languages - Google Patents

Abstract

An execution processor 10 equipped with a microprogrammable element 16 interacts via a bus 13 with a cellular memory 14, arranged to permit the creation of a trellis as well as that of cells of variable type. The execution processor 10 is microprogrammed for interpretation of a logic programming language such as PROLOG. The execution processor 10 interacts via requests with a memory management processor 12, with which there is associated a memory of the allocation status 15 of the cells of the memory 14. Working in alternate batches, the processor 12 runs through the trellises defined in the memory 14, so as to free the cells which have become unnecessary therein. This freeing is written into the allocation status memory 15.

Description

Information processing machine for the interpretation of logical programming languages.

The invention relates to information processing machines, in particular for artificial intelligence.

Traditional computer machines are designed to
working with programming languages å character
imperative, based on the notion of flu: of instructions that explicitly modify memories It is dirty that these languages do not lend themselves well to the expression of formal treatments, whose need is more and more felt in computer applications: expert systems, conceptiona assisted, analysis and understanding of natural and artificial languages, in particular.

For such applications, formal processing languages have been developed. These are subdivided into functional type languages such as LISP, based on the forma
lambda-calculus, and in relational-type languages, based on the formalism @ of the logic of predicates. One of these is the PROLOG language, programming abbreviation
logic. This language is described in many articles and books, including: "A machine-oriented logic based on the main resolution" JA Robinson, Journal of the ACM, Vol. 12, No. 1, January 1965; - "Grammars of Metamorphosis", A.Colmerauer, Artificial Intelligence Group, Marseille Lumigny, November 1975; - "PROLOG II", User Manual, Mr. Caneghen goes, Artificial Intelligence Group, Marseille Lumigny, January 1982; - 'Predicate Logic as Programming Language' RA Kowalski,
IFP North Holland, 1974, pp. 569-574.

 Logical programming languages, such as PROLOG, have so far been tested in a purely software form, in which a special program is implemented in a traditional type of information processing machine. Without mentioning here the problems and imperfections arising during these experiments, it should be noted that such a purely software implementation is inefficient, in the sense of performance and speed of work.

The object of the present invention is essentially to lead to the industrial development of a specialized machine capable of efficiently supporting the implementation, by a simpler programming, of logical programming languages.

One of the aims of the invention is to provide a memory structure, as well as an execution processor, equipped with a set of commands to make it evolve, the set being of general interest for the writing of interpreters of logical programming languages. These will be contained in a programmable component of the execution processor. It is not a question, however, of defining a software which will realize directly the interpretation of a particular logical programming language (of which PROLOG is an example).

It should be noted that, in this text, the so-called "user" is not directly a human user, but a particular program intended to take place in the programmable organ, and which will issue commands belonging to the above set of commands.

Another important object of the invention is to provide, in such a machine, a permanent, automatic and optimal mechanism for recovering any memory element which does not participate in the representation of the information accessible to the user.

In known manner, the proposed information processing machine comprises processing means and RAM means interconnected by a bus.

According to a first general aspect of the invention, this machine is remarkable: in that the random access memory means comprise a memory forming a stack of parents, ordered according to an integer or level, and a designation memory, constituted of individually addressable cells, at least two fields each, each field being intended to contain information which is either an atom or datum, a reference to another cell, or a reference to one of the parents, - a constituent parent the starting point of a lattice of terms, containing itself at least one of said information, the lattice of terms being able to be extended by successive references between cells of the de-identification memory, - the cells thus referenced being either of type constructor, their fields then immediately containing each one of said information, or of variable type, being put on hold for a link later where the two fields of a cell will serve one to associate the variable to one of the parents, and the other to contain one of the said information, and in that the processing means comprise a microprogrammed execution processor, which can be associated directly or indirectly with a programmable unit intended to receive the interpretation software, this execution processor furthermore comprising a current spawning register, which refers to one of the spawners of the battery memory, the current state of the machine thus being defined by the contents of this register as well as by the contents of the designation memory and the memory forming the parent stack.

A more detailed definition of the basic set of commands according to which the execution processor is microprogrammed will be given later. It will also be indicated later how can be structured on the one hand the designation memory, on the other hand the memory forming a stack of parents
An advantage of the invention lies in the fact that these two parts of the random access memory means can be constructed from cells of identical size, comprising in a preferred example two parts of twenty-four bits each, each of which can be separated in turn. four-bit field and a twenty-bit field.

According to another aspect of the invention, the processing means are also arranged to respond on the one hand to memory cell allocation requests, by allocating available memory cells and, on the other hand, to respond to a request. Deman specific by performing an automatic recovery of cells containing information become useless.

In practice, this can be achieved by using a separate memory management processor that queries into the execution processor through a communication and synchronization device.

For its operation, it is useful for the memory management processor to include a number of registers permanently assigned to particular tasks. These registers will be indicated later. It is still desirable to provide a lock mechanism between the two processors, which allows them mutual exclusion for access to the memory means they share.

According to another aspect of the invention, the memory management processor, (separated or not), performs auto-masking recovery in the following manner - scanning at least part of the cell lattices defined by the contents of the memory means alive, and useful by the execution processor3 by marking the cells there according to predefined conditions, and - then, picking up the unmarked cells, which are now considered free.

According to another particularly advantageous aspect of the invention, an allocation status memory is associated with the memory management processor. This allocation status memory comprises a number of elements at least equal to that of the cells of the designation memory, preferably as many elements as there are cells in all in the RAM means.

Each of these elements of the allocation status memory is capable of different states including the free state, and a flagged state at least. Preferably, instead of a marked state, a first and a second non-free state are provided, respectively defining the assignment of the corresponding cell of the random access memory means in a first and a second batch.

The memory management processor then performs the marking of the cells of the random access memory by an inscription in the corresponding element of the allocation status memory.

The pickup may then simply consist of a complete exploration of this allocation status memory, while passing these unmarked elements to the free state.

In the preferred embodiment where one operates in batches, the memory management processor alternately performs memory recovery on the cells of the first and second batch. The marking consists in inverting the allocation of batches of the cells, by inverting the non-free state of the associated element in the allocation status memory. And the pickup then consists in passing to the free state the elements of the allocation status memory which have retained the mark they had at the beginning of this batch.

Other characteristics and advantages of the invention will appear on examining the detailed description below, made with reference to the accompanying drawings, as well as four appendices.

On the drawings. appended - Figure 1 is a diagram illustrating the general organization of the machine; and FIGS. 2 to 5 are the organigrams of mechanisms incorporated in the memory management processor.

Annexes to the description - Annex 1 is a general specification of the machine, including a number of basic definitions, the definition of the current state of the machine, as well as its basic set of commands, in a particular example - Appendix 2 defines in detail the contents of the memory of the cells, in the example where the same cells are used for the designation memory and for the memory forming a stack of brooders, with the resulting consequences for the representation of the state of the machine; - Appendix 3 illustrates the operation of the execution processor, and the basic set of commands incorporated therein, by way of examples; and - Appendix 4 illustrates the synchronizations between the two processors, as well as the operation of the memory management processor, using examples and O diagrams.
The figures relating to the appendices are given as figures 6 to 27, in FIGS. 1 to 5 associated with the present description.
The content of all ancillary documents, including drawings, is essentially information of a certain nature. As such, it is incorporated in the present description, to contribute with these to the definition of the invention.

In addition, it was necessary to use, particularly in the annexes, special graphics intended to preserve the coherence and clarity of the explanations given, given the intervention of a large number of "reserved words" (this which also includes verbal groups).

When necessary for a good understanding, the reserved words are written in single quotes ('), in the remainder of the description and in the claims.

Reference is now made to FIG. 1. This shows that the machine according to the invention has the following devices: a memory of cells 14, used essentially for the representation of terms. This high-capacity memory can be built using Intel Corp. 4164 chipsets. These are memories with access time moderately fast, typically 150 nanoseconds.

an execution processor 10, which carries out the basic instructions of the machine, namely the construction and access to terms stored in the memory of the cells. It comprises a programmable, or more specifically microprogrammable, element 16, which makes it possible to define various uses of the machine, such as an interpreter of the PROLOG language. This processor can be built using the 2900 family of Advanced Micro Devices. This family of circuits makes it possible to build up "microprogrammable processors whose frequency of the basic clock is motennement fast, typically 150 nanoseconds.

- A memory management processor 12, which essentially performs the memory recovery mechanism, and also the allocation of free memory cells on request of the execution processor. The memory management processor operates in parallel with the execution processor. It can also be built using the 2900 family of Advanced Micro Ceirns.

an allocation status memory 15, which stores the information necessary for the memory management processor.

In the detailed example described, this memory comprises as many elements as the memory of cells. But the elements of the allocation status memory have a width limited to two bits. This memory is built in fast technology, for example using the Am 9128-10 boxes of the
AMD company (access time of the order of 100 ns), - a memory bus 13 which realizes and arbitrates the competitive access to the memory of cells from the execution processor and the memory management processor e Le The arbitration mechanism may be conventional, and made from circuits existing on the market, such as the circuits produced by the INTEL Corps Company for the management of the arbitration of its MULTIBUS bus.

 It is the communication and synchronization unit or bus that provides the information exchange and macroscopic synchronization relating to memory management between the other processors. This is essentially done by request and acknowledgment of the request, or the expectation of it. The request bus 11 may consist of links between the processors mentioned above, which have intercommunication means between processors.

The memory of the cells 14 constitutes the above-mentioned random access memory means. It could be made in two physically separated parts, possibly of different structure, respectively corresponding to the designation memory and the memory forming a stack of parents, as defined above. It is preferred that this cell memory comprises a single structure, from elementary cells of identical size, allowing the realization of the designation memory as well as that of the memory forming the parent stack. It will be indicated later how this is achieved. In this case, the allocation status memory includes elements that correspond not only to the designation memory, but also to the memory forming the parent battery.A variant of the invention would consist in not providing, in this memory of the statutes of allocation, that elements limited in number to that of the cells of the designation memory.

It will be useful to refer now to Annex 1, in order to acquire the basic notions and definitions useful for understanding the invention. Annex 1 also specifies the state of the machine, and the abstract characteristics of the basic command set of its execution processor, with again the necessary definitions.

Appendix 2 defines in more detail the structure of the memory of the cells, first for the designation memory, then for the memory forming the parent stack. It also defines the notion of coherent configuration in the representation memory. This notion of coherence is then extended after intervention of the memory forming the parent stack. Finally, the state of the machine is defined, with the permanent assignment register included in the execution processor, the representation of the state of the machine by the contents of this register, and the contents of the memory of the cells. . It is then briefly noted the concordance between the realization thus defined of the proposed machine and the specification which is made in Annex 1.

The arrangement of the cell memory according to what is proposed in Appendix 2 is considered accessible to those skilled in the art, on the basis of the teachings given. It is the same for the register incorporated in the execution processor.

The execution processor first has a "traversing links" mechanism. The realization of this mechanism is again considered accessible to those skilled in the art, without it being necessary to give a figurative algorithmic representation. It should be noted that such a mechanism is implemented in software form in the PROLOG interpreter experiments mentioned above. The execution processor realizes it in hardware form.

Then follow orders also implanted in hardware form, that is to say, microprogrammed, in the processor of exdeution. The mechanism of each of these commands is set out in Annex 3. It is, in most cases, accompanied by an associated example. On the basis of the teachings given about these mechanisms in Annex 3, it is considered as accessible to those skilled in the art to construct the execution processor equipped with such a basic set of commands, from integrated circuits mentioned above.

It should be noted that some of these commands are related to instructions known from the LISP language. Thus -'Building 'exists as it is in LISP (CONS), -' access left 'corresponds to' CAR 'of LISP, -' access right 'corresponds to' CDR 'of LISP, - the three test commands also have their qua - valents in LISP, - it is still the same for the instruction of 'comparison'.

The other proposed commands do not have their equivalent in
LISP, they are particularly adapted to the interpretation of relational languages and are one of the original features of the machine.

The fact that some commands proposed here could be realized in material form in some machines, - "LISP Machine Progress Report", R. Greenblatt. memo 444AI, lab MIT Cambridge Mass, Aug. 1977 is to be highlighted. The realization of the other commands, of original type, the mechanism of which is explained in Appendix 3, is similarly microprogrammable.

For the moment, the structure of the memory of the cells 14 and that of the execution processor 10 has been described, their interconnection being carried out through the bus 13. Equipped with the basic set of instructions that has just been defined, the processor Execution 10 is able to allow the direct interpretation of most, if not all, logical programming languages, and in particular the one known as PROLOG. This constitutes a first important advantage of the present invention.

It should be noted that the actual representation in the machine of the work performed by the execution processor has three levels - a level d - which is concerned only with the contents of the designation memory. See in this respect the definitions of 'd-terminal', - 'd-ultimate' and 'd-representation' in Annex xe 2.

- a second level noted t-. This level relates to the relationships between the designations contained in the design memory and the ranks in the stack (it will be recalled that any linked variable contained in the designation memory refers to a parent stored in the stack). To this correspond the definitions 't-terminal', 't-ultimate' and 't-representation' of Annex 2.

- The third level, noted S-, concerns the contents of the memory-pile itself. It is explained by the definitions 'S-ultimate', 'S-correspondence' and 'S-representation' in Annex 2.

This will help to better understand the lessons given on the current state of the machine at the end of Appendix 2.

An essential feature of the present invention will now be directed to the implementation (o implementation) of an automatic, and optimal, recovery of memory elements which contain information that has become useless to the processor of the present invention. execution
The starting point of the recovery mechanism is the "reduce" instruction already mentioned.

Most designers of formal processing languages have provided, generally in software form implemented by the execution processor, a memory management tending to recover the memory parts that have become useless. Thus, the language LISP knows List processing in real time on serial computer ", H. Baker, communication of the ACM, April 1978, Vol.21 Num 4
As far as the PROLOG language is concerned, various proposals have been made to recover memory, notably "A note on garbage collection in PROLOG interpreters"
Mr. Bruynoeghe, Proceedings of the first International Logic Programming Conference, Sept. 14 -T7th 1982, Marseille,
France ". None of these proposals has been entirely satisfactory, in particular no proposal for recovery, in parallel with the interpretation, has been made.

The first step towards the solution according to the invention consists in providing a separate memory-management processor 12, which dialogues by requests with the execution processor, through the communication and synchronization element schematized in -il.

Except in case of: invalidation of requests, as will be seen
further, the memory management processor 12 responds to
a memory cell allocation request formulated
by the execufion processor by allocating each time to this
last a given memory cell. The processor
Execution 10 will therefore dispose, practically
permanent, the memory cells it needs for
its operations.

During the time interval that will elapse between a
"invalidate requests" operation and the subsequent operation
"Query validation", the management processor "
of memory 12 will then be in the "query level"
described immediately after the background level. A request from
of the execution processor 10 is then deferred, that is to say
say that it is memorized and will not be taken into account
that when the memory management processor will replay
at the bottom level.

In short, the background level is therefore the execution by
the memory management processor of the operations that him
are clean, and will be discussed later. In the presence
of an 'inquiry', or of an invalidation of requests for
another reason, the memory qestion processor
atinterrupts to move to the query level. "
situation, any new requests from the execution processor are delayed. During the processing of a request, the end of the request "returns the management processor.

from memory to its background level, where it continues the activities interrupted by the query. On the contrary, the "forcing" operation causes the memory management processor to go back to its background level, abandoning the activity interrupted by the request, in favor of an activity indicated by the forcing operation (see Annex 4, page 13).

It is now necessary to go back briefly to the definition of the 'reduce' and read instructions in Annex 3. These instructions cause a request to 'start a batch', addressed by the execution processor to the memory management processor, with for parameter the contents of the current parent register, and three names zlR n2 n3, determined by the execution processor as being respectively "ultimate value11 of the names nn1 'nn2' 3 initially associated with the instruction'reduce '. 1 t instruction 'resume', as appropriate.

It is therefore in the embodiment described one of the instructions 'reduce' and 'resume' which will cause automatic cell recovery operations by the memory management processor 12.

For this purpose, the memory management processor 12 is associated with the memory of the allocation statuses 15, the nature of which has already been explained and proves to be specified in Annex X 4. The memory management processor 12 also contains a series of records also set out in the same appendix
The memory management processor 12 is microprogrammed according to two very simple mechanisms, also explained in appendix 4 - deciding whether a cell is marked, - marking a cell.

Schematically, the automatic recovery then proceeds in the following manner - the memory management processor 12 explores at least part of the lattices of terms defined by the content of the RAM means, that is to say the memory of cells that brings together here the designation memory and the memory of spawners. In this case, the relevant part is defined by the identification of the current batch "and by the indications accompanying the request to start a batch" as provided by the execution processor. As will be seen below, this query is accompanied by four parameters, consisting of the reference of a parent and in three names.

During this exploration, the cells are labeled according to predetermined conditions which will be explained in detail below. In the preferred embodiment, this marking consists of an inversion of the batch indication in the location of the allocation status memory 15 which corresponds to the cell to be marked.

Finally, a collection of unlabeled cells is carried out, which will now be considered as free. This collection consists here in passing to the free state the elements of the allocation status memory which have retained the mark they had at the beginning of this batch.

It is recalled that, in the preferred example described, the allocation status memory comprises, in one-to-one correspondence, as many elements as there are cells in the RAM means. In other words, can be marked not only the cells of the designation memory, but also those of the parent stack.

Reference will now be made with reference to Annex 4, as well as to FIGS. 2 to 5, of all the predetermined conditions which allow a very efficient recovery of the memory cells.

These mechanisms are formally described in Annex 4.

Figures 2 to 5 give a corresponding algorithmic representation. The description that is going to be given now is based at the same time on the appendices and on Figures 2 to 5, seeking to reflect the memory management processor's pathways.

Another aspect is to emphasize. Until now, the known memory recovery mechanisms have been mainly interested in the type of constructor cells, without being able to solve the case of the variable cells correctly, let alone that of the parent stack. The present invention offers the advantage of powder, in a complete way, the problem of the recovery destcellules of variables, when it is possible In addition, it also makes it possible to carry out operations of recovery in the stack of parents.

The list of registers of the memory management processor 12;
as given in Annex 46 takes account of this situation.

In the presence of a start-batch2 request, the execution processor goes (appendix 4, page 10) - inverting the mark, ie the batch indication, contained in the "current batch" register ", - arrange the reference of the sender accompanying the request as a parameter in the parent register vertex", - arrange the "name" (here three namesr accompanying the request as a parameter, in the register "name: under marking", - put away the level of the new parent vertex in the register "level under marking".

 It is also advantageous to carry out the immediate search for the parent who represents this vertex parent, the mechanism involved being described below.

The rest is then the so-called recovery mechanism (Annex 4, page 1), which breaks down into three successive phases, namely: marking; collection; waiting-batch.

The general structure of the marking mechanism (Annex 4, page 2) is illustrated in Figure 2. It uses various auxiliary mechanisms, illustrated in Figures 3, 3A, 3B, 3C and 4.

In Fig. 2, the general marking mechanism starts at step 200. The first active step is a test 201 which determines whether the marking level is greater than or equal to zero. (It is recalled that in computing, the level zero has an active meaning.}
As long as the level of marking has not become negative, which indicates that the marking is finished, step 202 calls the "term marking" mechanism, which will be described with reference to FIG. term is performed with the name or names, here name 1, name 2, name 3, that contains the name register.

Then, step 203 invalidates the requests. Step 205 calls the decrementing mechanism of the level of marking which will be described with reference to FIG. 4.

After that, step 207 consists in putting "disjoint" in the "execution situation" register. Finally, the step 209 produces a revalidation of the requests, and one returns immediately upstream of the test 201.

These operations will be repeated until a negative level is reached, indicating the end of a complete marking phase. When this condition is verified, the non-output of the test 201 proceeds to the pickup mechanism 500, which will be described with reference to FIG.

Reference is now made to FIG. 3 for the description of the term marking mechanism, which has as parameter a field now denoted f, which field contains the name n being the subject of the term marking.
A test 310 firstly determines which type is the name nlclicator. If it is an atom, we immediately go to the end step 326.

If it is a parent, we go to a step 370. This step consists of a level normalization melanism on the field f, and will be described with reference to FIG. 3C. After this step 370, we obtain at again the end at 12 step 328.

Finally, if the test performed at 310 indicates that the name is a variable or a construct, a new test 312 occurs. This test examines whether the allocation mark of the cell referenced by the information field of the name n is marked or unmarked. If it is already marked, we go to the end 326.

If it is not marked, a third test 314 now determines what is the type of indicator of n, between the two remaining possible cases, namely that of a constructor c or a variable v.

If it is a constructor c, the step 301 remakes a term marking with the two parts of this manufacturer noted 'left of c' and 'right of c'. After complete execution of all these markings, step 322 will consist in marking the cell, here a constructor c, initially examined after which one passes at the end 324.

If the test 314 determined that there was a variable v, step 330 calls the link normalization mechanism with this variable. This mechanism is illustrated in Figure 3A.

After that, a test 318 determines whether, the result of the normalization that has been made in the meantime, on the variable is or is not free. If so, we find step 322.

If not, the term marking is repeated with the link of v, in step 303, after which one returns again to finish at step 322.

The term marking mechanism 300 of FIG. 3 has loopbacks on itself. Those skilled in the art will understand that memorization is necessary for the proper execution of this mechanism. Page 3 of Annex 4 describes how to perform such storage using an auxiliary memory in a stack.

In addition, item 11 on page 4 of Appendix 4, with reference to Figure 21, explains how, when you encounter an already marked cell, it is not necessary to browse the cells to which it gives access. under the level under marking, because they are certainly already marked. This is an important advantage of the mechanisms according to the invention.

Reference is now made to Figure 3B, which describes a search mechanism of the 'representative' of a parent g.

This mechanism is designated as a whole by 350.

It begins with a step 351 of taking as parent current parent g defined initially.

Next, a test 353 determines whether the nature of the current parent is that of a cut parent.

If it is indeed a cut off parent, step 355 replaces the current parent by the one designated in the 'previous' field of the current parent that has been in effect until now, and the test 353 is repeated.

When the output of the test 353 is no, it is that it is an active parent. It is then the end in step 357, and the parent 'representative' is the current parent who has just been determined.

This mechanism is described more formally on page 6 of Appendix 4. Refer to Figure 25.

The term marking mechanism 300 also used, in the case of a variable, an auxiliary mechanism called 'normalization-binding'. This auxiliary mechanism 330 is illustrated in FIG. 3A.

It begins with a test 332, determining whether the status of the group concerned is free or undecided. If it is free, step 334 establishes where the result of normalization is
'FREE' and lior passes to the end in 335.

If this status is undecided, a new test 336 determines the nature of the parent of variable v. If this parent is dead, we go to step 338, which consists in setting the status of the variable g to free, after which step 339 establishes "FREE" the result of normalization, and we go to the end in 340.

The parent of variable v being cut or active, step 342 will look for the parent 'representative', denoted gr, of the parent g considered.

After this representative has been found by the mechanism of FIG. 3B, step 344 consists of putting the reference of this parent representing gr in the 'spawner' field of the variable v.

If so, step 346 states that the result of normalization is 'FREE' and that is the end 347. Otherwise, step 347 states that the result of normalization is 'LINKED' and that is the end. .

The mechanism of FIG. 3A is described in more detail and more formally in alpage 5 of Appendix 4, the explanations of which refer to FIGS. 23 and 24. FIG. 23 illustrates what happens for a dead parent. that is, when the output of test 336 goes directly to step 338.

Figure 24 illustrates the second case, assuming the output of the test 342 is no.

The foregoing allows proper memory cleaning for everything related to the manufacturer and variable cells. It has previously been indicated that the invention also provides for such cleaning in the case of broodstock.

It is also necessary to carry out the standardization of levels provided for in step 370. This standardization of levels concerns the field f which contains the reference to the parent g.

The first step 372 is the search for the 'representative' parent, denoted gr, of the parent g. This mechanism is already described with reference to FIG. 3B.

The parent representative gr thus determined is then put in the field f, instead of the parent g which was previously there, in step 373, after which we go to the end step 375.

All that has just been described with regard to FIGS. 3, 3A, 3B and 3C constitute sub-mechanisms of step 202 of FIG. 2. Their execution is therefore necessarily followed by a decrementation of the level of marking at the end of FIG. step 205.

This mechanism noted 400 as a whole will now be described in connection with Figure 4.

Those skilled in the art will be able to refer to pages 6 and 7 of Appendix 4, as well as to FIG.

The first step 401 is to examine whether or not the nature of the vertex parent is 'cut off'. If so, step 403 consists of a kill of this vertex parent. The parent defined by his predecessor floats becomes the new vertex parent. fact returns then immediately upstream of the test 401.

It is now possible, after the treatments described above, to put z more the cut parent
In this way, we will sooner or later meet an active parent. The non-test output 401 then proceeds to step 405.

This consists of mearing the cells occupied by the vertex parent.

After, step 407 is to decrement the level of marking of a unit, in the register provided for this purpose.

If the level of marking is not negative, continue.

If it has become negetil marking the end of the marking, it is then the end step 410 that occurs. We will leave by the pickup step 500.

If not, extinguish 411 vaq of vertex parent, while keeping track of previous vertex
In other words, this step first reserves the current vertex parent. She takes the spawner defined by its 'previous' field and makes it the new vertex spawner.

Step 413 then determines the parent gr who will be the representative of the parent sowr. This mechanism has already been described with reference to FIG.
Next, step @ zange the reference of this parent representing gr in the field 1previous1 of the reserved parent, that is, the vertex parent that was in effect until step 411.

Then, step 417 consists of taking the three names that are contained in the parent gr, and storing these names in the registers name 1, name 2, name 3. We then end at the end step 420. This step returns to step 207 of FIG.

Figure 22 shows, in one example, how this mechanism 400 allows the reorganization of the parents of a stratum.

The marking mechanism is now completely described.

It is followed by the pickup mechanism 500 shown in FIG.

This mechanism recombines two elements which are separated in Annex 4. One, the actual collection, is described on page 7 of Annex 4, while the other, the 'cell-state revisions' is described in page 4 of Annex 4.

This collection consists of an exploration of all cells of the allocation status memory, with an index i that will explore all the possible addresses in this memory (as well as in the designation memory).

In step 501, the index i is initially set to zero. The test 503 then determines if i has reached the maximum address possible in memory. If so, it's the end in 504.

Otherwise, step 505 performs invalidation, queries.

The test 507 then determines whether the allocation status of the address cell i is the mark of the previous batch. If yes, this cell is 'available' at step 509.

At this level is an improvement of the invention, which consists in immediately allocating the cell that has just been released. For this, the test 511 determines whether there is waiting for a cell allocation. If so, step 513 immediately allocates the newly released cell and acknowledges the corresponding request.

In all other cases, including the one where the output of the test 507 was no, proceed to step 515, which consists in revalidating the requests, followed by a step 517 incrementing the index i by one unit. We then loop on step 503, until all memory addresses are scanned.

Intervening only on the content of the allocation status memory, the mechanism 500 will run very quickly, since it is a fast memory where each element has only two bits.

After all this, the memory management processor is placed in a batch standby situation, until the recovery mechanism is run again.

Note now that with these two bits per element, the allocation status memory 15 has a fourth state, not yet used. This fourth state can be used to subtract certain cells from the memory 14 to the recovery action of the memory management processor 12. This is useful especially if it is desired to store program information of the execution processor 10 in this memory . In the simplified variant where the recovery of cells is done only in the designation memory portion of the memory 14, the cells defining the stack of the parents are then also put in this fourth state, so as to escape the recovery and cleaning that are performed periodically by the memory management processor 12.

Only the execution processor 10 can then release these cells, on an explicit request for this purpose, which is addressed to the memory management processor 12.

In the foregoing, the memory recovery mechanism is turned on by the command 'reduce1. It is advantageous, as described in Appendix 4, that it is also initiated by the 'resume' instruction.

At the end of Annex 4 is still described the details of the
query synchronizations involved in the dual processor embodiment of the present invention.

In this way, with an execution processor and a memory management processor susoeptibles to operate in a completely parallel manner, it is ensured that the memory management is performed not only optimally, but
also in a very fast way.

A variant of the invention would be to use a single processor that was specially microprogrammed, and this processor alone would be the processing means
of the invention. Of course, there are no more intercommunication problems as before. On the other hand, this unique microprogrammed processor will have to work in timeshare, on the one hand for the execution, on the other hand for the management of memory. The Applicant considers that it will then be necessary to implement the interpretation software (prolog or other) in a conventional, separate processor, which will be connected in the usual way to the single microprogrammed processor constituting
he alone the means of treatment.

- ANNEX 1 SPECIFICATION
BASIC CONCEPT: SPACE OF TERMS
A triptet @TERMES. SHEETS, CONSTRUCTEUSS @ is an ospace ~ of ~ iermes
I MANUFACTURERS is a finished part of (TERMESXTERMBS) - TERMS
I- SHEETS C TERMS
IV l1, d1, g2, d2 e TERMS V cons1.cons2 e BUILDERS
consl (g1, d1) = cons2 (g2.d2) #
(cons1 = cons2 st g1 = g2 and d1 = d2)
I Vte TERMS
t # SHEETS #
@ gd e TERMS @ CONS E constructors @ = cons (gd)
Comment:
The TERMS are binary trees. They have been preferred to the n-ary terms for their use adapted to the degree of materiality of the projected implementation and for their flexibility. They have the same power express that the terms n-areas and it can serve as basic components for a wide variety of structures, especially variable length lists. Their homogeneous morphology is well suited to the dynamic allocation of a reservoir of identical and interchangeable memory cells.

 It is expected several builders, in practice a small number. Thanks to them, applications have discrimination arguments based on the type of terms built, rather than an encoding using reserved sheets.

We hope for greater efficiency.

 If the definition given here is very general and tolerates in particular the infinite terms, the use constraints stated within the specification limit the domain that can be represented in the machine to finite tree terms.

DERIVED CONCEPTS: TERMSCONSTRUlTS, IN TERMS. REPLACEMENT
FVt TERMS ~ BUILDING #
f cons 6 Constructors F TG.LD E% t-cons (tg.td)
F SUB-TERMS E TERMS - parts of TERMS
FVie TERMS
(SHEETS and SUBTHEMS (t) = (l)
or J cons e BUILDERS i tg.td E TERMS
T = cons (tg.td)
and SOUS ~ TERMS (t) =
{tg} U {td} u UNDER TERMS [tg] u SUB-TERMS [td]
@ REPLACEMENT of ... by ... in
E (TERMSxTERMSxTERMS) - TERMS
@ @ t1 t2, TERMS
t = t1 #
REPLACEMENT of t1 by t2 in t = t
and
(# t1 and t # SHEETS) #
REPLACEMENT of t1 by t2 in t = t
and
(# t1 and t # SHEETS)
#
@ cons e MANUFACTURERS @ ig.id e TERMS
T = cons (tg.td)
and REPLACE it by t2 in t =
cons (REPLACE tl by t2 in tg
REPLACEMENT of tl by t2 in td)
Comment::
TERMS ~ CONSTRUCTS and SHEETS are disjoint sets and whose meeting constitutes the terms
SUB-TERMS gives the set of sub-terms of a term. not understood itself.

 REPLACEMENT replaces any occurrence of a term with another term within a certain term.

BASIC CONCEPT: SPACE OF LISTS
A quintuplet LISTS, ELEMENTS, IN ~ LIST, LIST ~ EMPTY, SIZE ~ LIST # is a space ~ of ~ lists if
I- ENLISTE E (ELEMENTSXLISTES) #LISTES
# LIST ~ EMPTY LISTS
1- # e1.e2 e ELEMENTS # 17.12 e LISTS
EN ~ LIST (e1.17) = IN ~ LIST (e2.17) #
[e1 = e2 and 11 = 12)
1- # 1 st LISTS 1 # LIST ~ EMPTY
#
# e1 e ELEMENTS # 17 th LISTS 1 = eN + LIST (e1.17)
# SIZE ~ LIST LISTS - full
# tAILLE ~ LIST) LIST ~ EMPTY = O
# VI E LISTS
SIZE ~ LIST (IN-LIST (e.1)) = SIZE ~ LIST (1) + 1
IE LISTS + n E integers SIZE ~ LIST (I) = n
Comment:
A LIST is an ordered collection of elements. The ENLISTE function adds an element at the head. SIZE ~ LIST gives the number of items in a list.

NOTION DETAILED: SUB ~ LISTS
# SUB ~ LISTS E LISTES -? parts of LISTS ### e LISTS
(I = LIST ~ VACUUM UNDER ~ LISTS (1) = = J)
E ELEMENTS # 17 E LISTES
1 = IN-LIST (e.11)
and SOUS ~ LISTS (1) = {17} U SUB-LISTS (17)
Comment:
The SUB-LISTS of a list are the lists obtained by progressively removing the head elements.

FIELDS USED FOR THE DEFINITION OF THE MACHINE data. data1. data2. names, ~ marks of nature, comparison marks
i- given. data2 are disjointed finite sets
F data = data u data2
i- nouns is a countable whole
@ marks ~ of ~ nature = {c1, c2, v1, v2, d1, d2 niv}
@ marks ~ of ~ compariation = {equals. different, not ~ decided}
Comment:
This topic specifies information that is exchanged between the machine and the user when ordering. -in addition to the order code.

 Regarding the data. the skill of the machine is limited to being able to memorize and compare them. On the other hand. the user will generally have mechanisms giving them a special meaning. for example arithmetic or textual For convenience. two formats are provided: data and data2.

Regarding the names. they are under the control of the machine: it decides on the dynamic evolution of their meaning. and she alone can
Really interpret. The user can not do anything that the machine tells him. otherwise memorize them. and re-quote them sooner or later when ordering, or forget them.

 The various brands are used in the context of common conventions between the machine and the user. to discriminate one of several possible cases in certain situations.

varlabies1. yariables2. variables. levels. atoms, cons. soll2. manufacturers.

terms. under terms. replacement. construitsl. construits2
@ levels = integers
i- variablesl variables2 are disjoint countable sets
i- variables = variablesl U variables2
i- variables. data. levels are disjointed
i- atoms = data u levels
@ constructors = {cons1. soll2}
@ @terms. variables @ atoms constructors @ is a space ~ of ~ terms
with ~ built terms. in ~ terms. replacement
as derived notions
TERMS ~ CONSTRUCTED, SUB ~ TERMS.REMPLACEMENT
so (t E constructsl <=> i tg, td E terms t = conslCtg.td))
@@ t (t E constructed2 <=> i tg.td E terms t = cons2ttg.td))
Comment:
This topic specifies the kind of information the machine keeps. Among the terms. only the data can be exchanged with the user. The other terms remain confined in the machine and are accessible to the user only indirectly by practicing the listed commands and names decided by the machine itself.

 Variables are a special kind of leaf. They serve to introduce an additional relationship between terms. the relationship "to be an instance". A term is an instance of another term if it is obtained by replacing some of the variables of the latter by other terms. In the literature, the terms "t2 subsume t1-" or "t2 shematize ti" in place of -t1 is also used as an instance of t2-. To facilitate the interpretation of concepts specific to certain logical languages, and avoid poor coding by the user. the machine offers two classes of variables: variables and variables2.

 Levels are special atoms that can be picked up and stored by the user and allow them to perform certain states on the backup state.

 Figure 6 illustrates how the various classes of terms are distributed.

.L, &num; terms
Comment:
1 is an element used in the specification to replace the role of "undefined",
Definition: designations
designations is the set thus defined ::
Designations #
Names # (termsu {@})
and V ns names
3 builders 3 tg, td E terms
D (n) = cons (tg t @)
1 i ng.nd E names CD (ng) = tg and D (nd = td)
Comment:
A designation is tee only if a term is designatable. that is, if there is a name for that term. all its sub-terms are too.

 One of the components of the state of the machine is a designation and serves to express what are. at any time. terms accessible to the user.

and via which names. The user has commands to change this designation state.

backups, under backups, save. sauvegardeuide. cut
backups, termsxtermsxterms. saves. sauvegardeuide. size>
is a ~ space of ~ lists with
under ~ backups as a derived notion under ~ LISTS
Comment:
A backup is a stack of term triplets. Each triplet constitutes a stratum of the stack. The number of terms in a stratum has been chosen equal to three to obtain a good flexibility of use.

 One of the components of the state of the machine is a backup, the user has some commands to modify this backup, ie.

stack a layer, unpick a layer, capture the current backup state as a level, and recycle it later as a parameter of a save state change command at this time a.

NATURE OF THE MACHINE: ORDERS. SETTINGS. RESULTS. STATE.

 The user submits commands to the machine sequentially over time.

 Each order has as components a command code and in general complementary components which belong to various domains according to the order, and which are specified under the heading 'entries' in the order specification. å a command has its components in areas that also depend on the command considered, and are specified under the heading 'outputs' in the specification.

Between two order submissions the machine has a state that is an element of
designations x backups.

Submission of an order changes the state from <Davant.Savant> to <Daprèa, Saprèa>. Between Davant and Savant. submission entries. After. Sapres and the outputs of the submission, there is the relationship
CONSTRAINT => EVOLUTION
where STRESS and EVOLUTION are the relations respectively under the headings "constraint" and "evolution" in the specification of the commanche.

Comment:
The two components of a state <D, S> can be understood in the following way.

 - D is the "state of designation of terms". A family of commands concerns him and changes the meaning of names.

 - S is the "backup state". Specific commands allow it to evolve in the manner of a stack. These commands also have the side effect of assigning or consulting the designation status.

 When the user does not respect the constraint associated with a command, the effect is undefined. If the user is poorly designed. and risk for example to quote during an order a name meaning nothing. or meaning a term by chance. the designer is unable to prove that the relationship of the "constraints" heading is always true.

DIRECTORY OF ORDERS
Orders can be grouped according to the following families:
Manipulation of the designation of terms:
build, create ~ variable, substitute, access ~ left, access-right
create ~ data, create-data2, access ~ data, access ~ data2
test ~ nature, compare
Handling backups:
save, resume, get ~ level ~ current. cut
memory creation:
reduce
Initialization: Initiate
Build command
Inputs: ng.nd E names m E (ci.c2j
Outputs: nt E names
Constraint: Davant <ng) / 1 and Davant (nd) # @
Evolution:
(m = cl and Dafter (n @ = consl (Davant (ng). Before (nd))
or (m = c2 and Dafter (nt) = cons2 (Davant (ng), Davant (nd)))
and V n E names (Davantin) zi # Dafter (n) = Davant (n))
and SaNés = Savant
Comment:
The construct command creates the representation of a constructed term, which can then be accessed by the rendered name.

Create command ~ variable
Entrfss: m E (v.v2)
Outputs: nv E names
Evolution:
(m = vl and Dafter (nv) E variables i)
or (m = v2 and Dapres (nv) E variables2)
and Davant (nv) = l
and V no names
Davant (n) # @ # (After (n) = Davant (n) and After (nv) #Before (n))
and Saprès = Savant
Comment:
The create ~ variable command creates a new variable. The variable is new in the sense that it was not previously accessible by designation.
Replace command
Inputs: nv.nt E names
Constraint:
Davant (n) e variables and Davant (nt) # @
and Davant (nv), &num; sub ~ terms (Davant (s))
Evolution:
V names
Davant (n) # @
#
After (n) = replacement of Davant (nv) by Davant (nt) in Davant (n)
and Saprés = Savant
Comment:
The substitute command modifies all the terms accessible by the current designation, replacing any occurrence of a given variable by a given term. However, the terms saved in the stack are not affected.

 The machine only makes it possible to represent finite terms that are not looped. that is, that are not sub-terms of themselves. The user is responsible for compliance with this limitation. the machine does not perform checks for reasons of efficiency.

Order create data
Inputs: d E data
Outputs: nd E names
Evolution:
After (nd) = d
and V n E names (Davant (n) # 1 => Doprès (n) = Darant (n))
and SaprEs = Savant
Command create data2
Inputs: d E data2
Outputs: nd E names
Evolution:
Deptès (No.) = d
and V n E names (Davant (n) # 1 => After (n) = before (n))
and Saprès = Sarant
Comment:
The commands create ~ donncel and create ~ data2 make it possible to obtain a designation for data of type i or 2. The user can then use it in term constructions thanks to commands such as construct or substitute.

Command access ~ given
Entries: nd E names
Outputs: d E data
Constraint: Davant (nd) e data1
Evoiution:
d = Davant (nd) and Daprés = Davant
and SaprEs = Savant
Command access ~ data2
Entries: nd E names
Outputs: d E data2
Constraint: Davant (nd) s data2
Evolution:
d = before (nd) and Daprès = Davant
and Saprès = Savant
Comment:
The commands access ~ data1 and access ~ data2 return the data type 1 or 2 designated.

Command access left
Inputs: n E names
Outputs: ng E names
Constraint: Davant (n) E terms ~ constructed
Evolution:
# cons E constructors + td E terms Davant (n) = cons (Davant (ng), (d)
and Daprès = Davant
and Saprès = scholar
Command access right
Inputs: n E names
Outputs: nd E names
Constraint: Davant (n) eterms ~ built
Evolution:
+ cons E constructors # tg E terms Davant (n) = consCtg, Davant (nd)
and Daprès = Davant
and Saprès = scholar
Comment:
The commands access-left and access ~ right allow access to sub-terms of the terms commonly available.

Order test ~ nature
Entries: n enoms
Outputs: m E marks ~ of ~ nature
Constraint: Davant (n) / 1
Evolution:
(Davant (n) E constructsl and m = c1)
or (Davant (n) E constructed2 and m = c2)
or (Davant (n) E variablesi and m = vl)
or (Davant (n) E variables2 and m = v2)
or (Davant (n) E data1 and m = dl)
or (Davant (n) E data2 and m = d2)
or (Davant (n) e levels and m = niv)
and Daprbs = Davant
and Saprbs = Savant
Comment:
The test ~ nature command reveals the nature of the term designated among the various ultimate classes of terms illustrated in Figure 6.

Compare command
Inputs: nl.n2 E names
Outputs: me marks ~ of ~ comparison
Constraint: Davanf (ni) / 1 and Davant (n2) ##
Evolution:
DAfter = Davant
and m = equal # Davant (n1) = Davant (n2)
and m = different => Davant (n1) #Before (n2)
and
~ m = not decided
C Davant n1) # terms ~ built and Davant (n2) # terms ~ built)
and Saprès = Savant
Comment:
The compare command does not make it possible to compare in a systematically decisive way any two constructed terms. In the case of two constructed terms, this operation generally requires a two-term course that would be redundant. in the targeted applications, with the courses ordered by the user for his own reasons.

 If two constructed terms are equal, the machine usually responds unsettled, but it may respond equally if the method of realization makes it reach this decision in a direct way.

save command
Inputs: n1, n2, n3 E names
Constraint: Davant (nl); l and Davant (n2) # and Davant (n3) / 1
Evolution:
Daprea = Front
and After = save (<Davant (n1), Davant (n2). Before (n3)>, Savant)
Comment:
The save command allows the user to keep a state vector consisting of three terms. while continuing the process of transforming the collection of commonly-designatable terms.

 The state vector can in addition subsequently retrieved as it was saved, by practicing the resume command. It is not affected by the operations that take place between its backup and recovery: in particular. replace commands do not perform variable replacements in the saved terms. The order of backups and recoveries is done according to the principle that the last saved is the first one taken back: the backup memory runs in stack.

Resume command
Outputs: n '., R'.2.n3 E names
Constraint: Savant t backupevlde
Evolution:
Savant = saves (<After (n1), After (n2), After (n3)> Saprs)
Comment:
The command resume. in case the backup battery is not empty.

makes accessible again a state vector consists of three terms. Only these terms and their sub-terms then become commonly designatable. The transformation process in progress before the command is thus abandoned and replaced by the resumption of the transformation process represented by the recovered state vector.

Command get current level
Outputs: np E names
Evolution: Daprt (np) = size (Savanl)
and V nor E names (Davant (ni) ti => Dapr (nl) = Davant (nl))
and Saprèa = Savant
Comment:
The commands get ~ level ~ current and cut are available to the user to enable him to perform a complex control of the management of backups.

 The command get ~ level ~ current makes the current stack size.

 designatable as a level. As with any atom, the user can maintain battery levels. compare them and build terms containing them. However. although the levels are integers. the user does not have arithmetic commands to manipulate them; the only command that can interpret them is cut.

 By properties of the directory commands. commonly-readable levels are always less than or equal to the size of the current backup stack. In addition, the levels stored in the elements of any backup stack are always strictly smaller than the size of this stack.

Cut command
Entries: np e names
Constraint: Davant (np) E levels
Evolution:
# n1 e names
Davant (n1) ## # After (n1) = cut (Davant (np))
and Saprès E SOUS ~ saves
and tail (Sapré) = Davant {np)
Comment:
The cut command is used to delete a certain number of state vectors at the top of the backup stack. The new backup stack is the sub-stack of the current stack whose size is equal to the level given in parameter of the command.

 In order to maintain the mentioned property, the levels that are accessible from the designatable terms and that are greater than the size of the new stack are decreased and made equal to the size of the new stack.

Definition: cut
cut e (terms x levels) # terms
and V t E terms V n E levels
(1 # levels and t # terms ~ built and cut (tn) = t)
or C t E levels and 1 # n and cut (tn) = t)
or (te levels and t> n and cut (t, n) = n)
or p cons E constructors 3 lg, td X terms
t = cons (tg .td)
and cut <t.n3 = cons (cut (tg.n.). cut (td.n.)
Comment:
cut (t, n) gives the term deduced from t by replacing in the latter any level greater than n by n.

Reduce command
Inputs: ni, n2.n3 E names
Outputs: nn1, nn2, nn3 e names
Constraint: Davant (ni) t1 and Davanl (n2) ti and Davant (n3) / 1
Evolution:
After (nn1) = Davant (n 1) and Daprâa (nn2) = Davant (n2) and Daprbs (n n3) = Davant (n3>
and Sapra = Savanr
Comment:
After a reduce command, commonly accessible terms are reduced to three terms and their sub-terms.

 This command is for automatic management of memory resources.

It is therefore on a plane other than the other commands from the strict point of view of the possibilities of calculation. This command is made necessary by the deliberately chosen nature of the relationship between the machine and its user. The user is outside the machine, in the sense that he has his own control and his own unknown memories of the machine. Any information created for the user can therefore be used in the future. The reduce command allows the user to make known the information, restricted to three terms, which interest him for the future. The machine can then deduce that the information carried by certain memory resources is no longer useful for the representation of the abstract state, because it has become inaccessible to the user. It can recover these resources and recycle them for a new use.

The resume command also causes the same recovery mechanism: this is possible because the designation is then reduced to the three names rendered in the result. However, without the command reduce. the sequences
Uninterrupted manipulations of the designation would result in the occupation of an increasing amount of memory, leading ineluctably to the saturation of the system as it occurs in existing PROLOG interpreters.

Initialize command
Evolution: Saprêa = safeguarded
Comment:
The initlaliser command puts the machine into a healthy state. The backup battery is empty and no term is retained by the machine.

- ANNE>: E 2
DATA STRUCTURES AND REPRESENTATION
DATA STRUCTURES
TYPES OF INFORMATION ~ brand ~ nature with the given user 1
data2
EXCHANGES has for possible values (ci, c2, v1, v2.dl, d2, nlv3
~ ~ comparison mark has for possible values {ega @ different, not ~ decided}
name is a multi-field structure
indicator: mark ~ of ~ nature
Information @ reference or data
Comment:
The types of information given. data2. ~ ~ kind of brand.

~ ~ mark of comparison and name respectively correspond to sets @@ nne1. data2. ~ ~ kind of brands. ~ comparison marks and names.

 '% t' type reference is of purely internal use bla machine. The coding of these various types of information is illustrated in Figure 7.

TYPES OF INFORMATION FOR INTERNAL USE
reference
level
{11bre, undecided}
{active. cut, dead}
Comment:
The type of reference information makes it possible to address the memory of the cells.

The level type corresponds to all the levels flibre.indecis are marks which serve to indicate the particular status of the cells in the variable format described below. (active.couped.mort} are marks used to indicate the special status of cells in parent format described below.

CELL FORMATS
constructor is a multi-field format
left name
right: name
variable is a multi-field format
status: {11th, undecided}
reference parent
liaison: noo
: {active, cut, dead} a single field format: data2
breeder is a multiple variant format
discriminated by a field nature value ~ d2 is
among
spawner ~ active if nature = active
which contains the other fields
level level
previous reference
neither name
n2 name
n3: name
cutter if nature = cut
which contains the other fields
level: previous level: reference
spawner ~ dead if nature = dead
Comment:
A cell can be considered according to four different formats, constructor.

variable, value ~ d2 and parent. Figure 8 illustrates the distribution of the fields of these various formats on fixed size words. The constructor, variable and value ~ d2 formats are used to represent the terms. These three formats are of a fixed nature and occupy a word. The parent format is used to represent the backup state. It gathers three formats of different sizes, spawner ~ active. cutter or spawner discerned by the content of a common field nature. The formats 4nister ~ coup and géniteur ~ mort occupy a single word. The spawner ~ active format occupies four stringed words as shown in Figure 8: these four words are considered as a single cell.

referenced by the address of the first word. The break-up of this format onto four chained words rather than consecutive words has been chosen so that the memory allocation mechanism manages fixed-size entities.

MEMORY OF CELLS
The machine comprises a collection of cells, referenced by reference type information. Each cell can be considered indifferently in any of the various above-mentioned formats. The mechanisms described in this document exploit predefined access functions to the cell fields because these fields are not always accessible in isolation. In the description of the mechanisms. the cell access functions are noted in a way that implies in which format the referenced cell is considered.

These access functions are as follows, where r is the reference of the cell:
left (rl left field
right] right field
state ~ Haison ['] status fields, spawner
binding ['] binding fields
value ~ d2 ['] value ~ d2
state ~ spawner ['] fields nature, level
previous [r] previous field
name ~ 1 ~ 2 ~ 3 ['] fields n1, n2, n3,
Each access function can be exploited either in reading which is noted:
access function
in writing, which is noted:
access function
Comment::
The cells are identical and accessible in any format because the specificity of the machine is precisely to be a memory allocation system for various and changing needs. But, to be logically correct, the described mechanisms must access their cells in a correct format.

 To avoid going into the uninteresting details of the access management of variants of the parent format, these details are supposed to be realized by the access primitives ettgéniteur, precedent es nom ~ 1 ~ 2 ~ 3: these accesses test the field nature to decide measures to address the memory.

In particular in the accesses state ~ generator the level component is not significant if nature = death The writing with nature = cut, if the previous state is nature = active, automatically causes the copying of the preceding field in the first word. so as to ensure the desired coherence,
CURRENT GENITAL REGISTER genitorcurrent reference
Comment:
The parent register ~ c. Current contains the reference of a cell considered in the parent format. It locates the head of the spawning list that represents the current save status.

REPRESENTATION METHODS
BASIC NOTIONS
references
# references is finished
# data i = references
H names = marks ~ of ~ naturexreferences
DefInition: indicator. information
indicator E names - marks of ~ nature information E names - references
and # me marks ~ of ~ nature # re references
indicator (<mr>) = m and information (<mr>) = r
Statements ~ of ~ cell. left. right. breeder status. binding, value ~ d2. nature.

level, previous, nî, n2, n3
# states ~ of ~ cell is late @
# left, right E states ~ from ~ cell - names
## gd e names # this elat ~ of ~ cell (guche (c) = g and right (c) = d)
# status e states ~ of ~ cell # {free undecided}
# spawner e states ~ of ~ cell # reverences
#llaison e states ~ of ~ cell # names
# # get free. undecided} # references # the states ~ of ~ ceilule
status (c) = s and parent (c) = g and binding (c) = 1
# value ~ d2 e states ~ of ~ cell # data2
# # of data2 # this states ~ of ~ cell value ~ d2 (c) = d
H nature E states ~ of ~ cell - {active, cut. death}
# level E states ~ of ~ cell - levels
# previous e states ~ of ~ cell # references
H nl, n2, n3 E otats ~ of ~ cell - names
# # ie levels # p E references # n1.n2.n3 e names # this states ~ of ~ cell
nature (c) = active and level (c) = i and previous (c) = p
and nl (c) = nl and n2 (c) = n2 and n3 (c) = n3
# # ie levels # pe references # this states ~ of ~ cell
nature (c) = cut and level (c) = i and previous (c) = p
F ic E states ~ of ~ cell nature (c) = death
Definition: configurations
configurations = references - states ~ of ~ ceilule
Comment:
data is assimilated to references.

indicator and information are the field selection functions of the
structure name.

The states of ~ cell are the raw information that the memory is capable of
to keep in a cell. The various functions asked translate the
cell capacity and field selections of the various formats under
which a cell can be considered.

 Configurations are possible states of cell memory.

REPRESENTATION OF A DESIGNATION OF TERMS
Definition: d related variable
n is d ~ variable ~ linked in M if
n E names ME configurations
and indicator (n) = vl or Indicator (n) = v2
and status (M (information (n))) = undecided
and nature (parent (M (dead information
Definition: d terminal
n is d terminal in M if
names me configurations
and no C n is d ~ variable ~ linked in M)
Definition: ultimate d
nu is ultimate d of n in M if
n, nu E names ME configurations
and # Sn E paths ^ names) 3 i E integers
Sn (O) = n
and # @ e integers
j <i #
Sn (j) is variable ~ linked in M
and Sn (j + 1) = bond (M (Information (Sn (j))))
and Sn (l) is d ~ terminal in M
and
indicator (Sn (i)) / level and nu = Sn (i)
or
Indicator (Sn (i)] = level and indicator (nu) = level
and Information (nu) is ultimate information (Sn (l)) in M
Definition :: dregresentatIon
M is drepresentation of D if
M e configurations D e designations
and 9 names D (n) # #
#
# nu e names
naked is ultimate d of n in M
and indicator (nu) = c1 #
# ng.nd e names
ng is ultimate left (M (information (nu))) in M
and nd is ultimate of drolte (M (Information (nu))) in M
and D (n) = consl (D (ng), D (nd))
and indicator (nu) = c2
i ng.nd E names
ng is last from left (M (information (nu))) in M
and nd is ultimate of drolte (M (information (nu))) in M
and D (n) = cons2 (D (ng), D (nd))
and indicator (nu) = v1 #
D (n) e var1
etvnn.nnu e names
D (nn) = D (n) and nnu is the ultimate of nn in M #
NNU = naked
and indicator (nu) = v2 #
D (n) e var2
andVnn, nnu é names
D (nn) = D (n) and nnu is the ultimate of nn in M #
NNU = naked
and indicator (nu) = d1 # D (n) = information (nu)
and indicator (nu) = d2 # D (n) = value ~ d2 (M (information (nu)))
and lndlcateur (nu) = niv => D (n) = level (M (information (nu)))
Comment:
A reference cell r considered in the constructor format represents a constructed term. The left and right fields of the cell contain the names of two terms tg and td. A name of the form cl: r or c2: r is a direct name of consl (tg.td) or cons2 (tg.td).

 A cell considered in the variable format has two different interpretations depending on the status of the status and parent fields. Such a cell is called a free variable if its status field contains free or if its parent field contains the reference of a dead parent. that is, if its status field contains Undecided and if its parent field contains the reference of an active or severed parent. it is called linked variable.

 A reference free variable, represents an element v of the variables. A name of the form vlz or v2: r is a direct name of v. Moreover this cell is the unique representative of v: it is quoted from all the representations of the occurrences of v in the terms, so that its replacement by a term on the occasion of a substitute command is simply realized by a modification of this cell.

 A linked variable is a reference to the term cited in its link field. The replacement of v by t on the occasion of a substitute command is carried out by putting a name of t in the link field of the free variable which represents v and changing it into a linked variable. The role of the parents in defining the free / linked status of the variables will be explained about the representation of the backup. A free variable is initially created with its status field free; during a replacement, the undecided mark is placed in its status field and the reference of the current parent of the moment, contained in the genealogical register ~ current, is stored in its parent field.

The current parent is always active or cut off, so the variable is then considered bound; it remains bound up to the execution of a resume command. to restore the state of the definition of the terms of the moment of the backup, may require to restore a free status for this variable. For that. when executing a resume command, the current parent is transformed into a dead parent, so that all variables that have been linked since the last backup become free again.

In this case the free status of a variable is indirectly coded by the fact that its parent field contains the reference of a dead parent. Broodstock therefore play a role similar to the gtrainbsa used in most PROLOG interpreters.

A reference cell, r considered in the format aieurd2 contains an element d of data2. A name of the form J'2: r is a direct name of d.

 A reference cell r considered in the spawner ~ active format contains in its level field a level element i A name of the form niv.r is a direct name of s.

 The representation of an element of data1, does not require any cell.

A name of the form d1: d is a direct name of d.

 Note that, except for the direct names of the data1, all names are of the form m: r, where r is the reference of a cell and m is a mark that indicates the type of that cell. that is, in what format it should be considered. The chosen method is therefore to note the type of a cell at each occurrence of its reference, rather than note it on the cell itself. Although this method is slightly more expensive in memory size. it has the advantages that the data i do not occupy any cell and that the test of the nature of the term designated by a name is faster. This last criterion is predominant in the targeted applications.

 In addition to the direct names previously enumerated, a name may at a given moment indirectly designate a term.

 A first case concerns the names of the form v1: r or v2: r where r is the reference of a linked variable. Such a name. qualified ci ~ variable ~ linked in the memory configuration considered. can be the start of a string of finite length names. the link field of the linked variable named by a name being the next name of the string. The last name of the string does not quote a linked variable and all the names of the string designate the same term as it.

 Another case of indirect names concerns the names of the form niv: r where r is the reference of a cut off parent. Such a name cites a previously saved stratum that has been destroyed by a cut command. The cell of references from the previous field of this cut off parent ends with the reference of a sotif parent who represents the level element currently designated by this name.

 This indirect designation mechanism is described by the ultimate relationship that associates a name with a direct noun designating the same term.

 All names that participate internally in the representations of terms are not necessarily known to the user. The domain of definition of the designation D essentially comprises direct names. more possibly a collection of indirect names which depends on the history of the orders. After a command reduce. or a resume command, the designation D offered to the user includes only direct names. These are the three names rendered in the result by the command, as well as the direct names of the representations of the sub-terms accessible by these three names. This restriction of the designation, invisible to user, is manifested during the execution of the commands of access to the terms will access and access right, which result in only the names direct.Par cons, between two executions to reduce . that is, while the user is in the process of developing intermediate results. the designation D may temporarily include indirect names: these are names that cite variables recently created and then linked by a substitute command, or strata recently saved and destroyed by a cut command. During these phases the user can indeed keep such names to access the terms.

This reduction in designation is in line with the specification of the machine, which in fact leaves an even greater choice for realization. It is important for the mechanism of recovery of memory: the invisibility of cut broods allows their recovery after having replaced the occurrences of their references by the references of the equivalent active broods; the invisibility of the variables would make it possible to replace certain occurrences of their references. but not all because of sharing with the backup described in the next paragraph. by the equivalent direct names. This would speed up access to the terms by removing the crossing of these linked variables that served as building middlemen and are no longer used. This would also recover some of these variables. This mechanism is however not realized in the version of the machine presented in this document
The representation relation connects the component D of the abstract state and the concrete state of the memory. This relationship is still indeterministic: for an element
M configurations. many elements D of the designations satisfy it.

The complement of determination depends indeed on the history of the commands and can not be supported by a relation involving only the state of the memory of the cells.

Figure 9 is an example of representation. We will notice that several different names. although direct. can refer to the same term, for example
D (c1: C1) = D) c1: C3) The representation allows the classical sharing of representations of sub-terms ,. for example the C7 cell which participates in the representation of the terms D (ci: C7), D (cl: C6), D (cl: C3) and D (cl: Cl). The cell
C9 is a linked variable. cells C5 and C8 are free variables that represent two elements x and y of variables l.

REPRESENTATION OF A SAFEGUARD
Definition: 1 related variable
n is t ~ variable ~ linked for k in M if
do names k E levels ME configurations
and indicator (n) = v1 or indicator (n) = v2
and status (M (Information (n))) = indUcis
and nature (M (engineer (M (information (n)))) t death
and level (M (parent (M (intormation (n)))) <k
Definition: t terminal
n is ~ terminal for k in M if
no names k E levels ME conflguraticns
and no (n is t ~ variable ~ linked for k in M)
Definition :: t ultIme
n is t ~ ultimate of n for k in M if
number of names k e levels M e configurations
and # Sn e (integers # names) # ie integers
Sn (O) = n
and # I integers
j <i #
Sn (j) is t ~ variable linked for k in M
and Sn (1 + 1) = laison (M (information (Sn (J))))
and Sn (i) is t ~ terminal for k in M
and
indicator (Sn (i)) # level and nu = sn (i)
or
indicator (Sn (i)) = level and indicator (nu) = level
and indormation (nu) is s ~ ultimate of information (Sn (i)) in M
Definition :: t representation
M, k is t ~ representation of D if
M s configurations ke levels D e designations
and V no names
D (n) ##
#
# naked # names
nude is ultimate of n for k in M
and indicator (nu) = c1 #
# ng.nd # names
ng is t ~ ultimate left (M (information (nu))) for k in M
and nd is t ~ ultimate of right (M (information (nu))) for k in M
and D (n) = consl (D (ng) .D (nd))
and indicator (nu) = c2 #
# ng.nd e names
ng is t ~ ultimate left (M (information (nu))) for k in M
and nd is t ~ ultimate of right (M (informatîon (nu))) for k in M
and D (n) = cons2 (D (ng) .D (nd))
and indicator (nu) = v1 #
D (n) e var1
andVnn.nnu E names
D (nn) = D (n) and nnu is the ultimate of nn for k in M
NNU = naked
and indicator (nu) = v2 #
D (n) e var2
and V nn, nnu e names
D (nn) = D (n) and nnu is t ~ ultimate of nn for k in M #
NNU = naked
and indicator (nu) = d1 => D (n) = information (nu)
and lndlcateur (nu) = d2 => D (n) = value ~ ds (M (information (nu)))
and indlcator (nu) = niv => D (n) = level (M (information (nu)))
Definition :: ultimate
gu is ultimate s of g in M if
g, gu E references M e configurations
and + Sr e (integers - references) + ie integers
Sr (O) = n
and V j E integers
j <i #
nature (M (Sr (j))) = cut and level (M (Sr (J))) = level (M (gu))
and Sr (J + 1) = previous (M (Sr (j)))
and gu = Sr (i) and nature (M (gu)) = active
Definition: s ~ correspondences
s ~ correspondences = references # (backupsU (1))
Definition: s ~ representation
M is s ~ representation of SC if
M e configurations SC E 5 ~ correspondences
and age references
SC (g) # 1 #
# gu e references
gu is ultimate of g in M
and
level (M (gu)) = O #
SC (g) = saves ~ empty
and
level (M (gu)) # O
#
# ggu e references # D e designations
gu is safe from precedeni (Migy)) in M
and level (M (ggu)) =
and M.niveau (M (ggu)) is t ~ representative of D
and SC (g) = saves <D (n1 (M (ggu))). D (n2 (M (GGU))). D (n3 (Miggu)))>. SC (ggu)) Comment;
The backup is a list of triplets of terms. Such a list es1
represented by cells in spawner format ~ active or spawner ~ cut
chained by their fields preceding the first spawner of the chain. called
spawner current, is at all times spotted by the register spawner ~ current.

A cell in the spawner ~ format contains in its previous field a
see another parent. It is the vestige of a saved layer and then
destroyed by a cut command. The chain of references resulting from its field
previous is made up of a finite number of cutters
and ends with the reference of an active parent who is equivalent to it
referral mechanism is described by your ultimate relationship which associates with a
parent reference the reference of the active parent
A cell in spawner ~ active format whose level field contains o represents
backup ~ empty, By machine behavior, this cell is unique
in memory: it is created by initiatization.

 A cell in the spawner format ~ active at the level field contains / different from o represents a backup of the L scop Its previous field contains the reference of a sparer whose active equivalent represents the sub-save of size iI and contains in its fields sll, n2 and n3 names that designate the three top terms of the backup of size j.

 These mechanisms are described by the relation s ~ representation.

 The saved terms are not represented by copying. that is, by own memory resources. but by sharing resources between them and with the terms of the designation D. Indeed. most of the terms represented at the level k are instances of terms represented at level k-1, that is to say only differs by substitutions of variables. When ordering save the terms parameters of the order are already represented and the execution of the command consists of storing in the fields nor. n2 and n3 of the current parent of the direct names that designate these terms.

However the designation D continues to evolve thereafter. in particular by substituting commands which have an edge effect on the terms accessible by the designation D. effect which must not disturb the saved terms. For this purpose, the linked variables contain in their parent field the reference of a parent that indicates from which level of backup this variable should be considered as linked. Below this level, this variable. if it is encountered in the representation of a saved term. must be considered free.

 At each level X is associated a designation DA which matches the three names ni, n2 and n3 the three terms saved at this level. The presentation relation describes how the memory state of the cells is related, a level k and a proper DA designation at this level. This relationship is analogous to drepresentation. the difference being localized in the relation Lvariable ~ linked which takes into account the level to decide the free / bound status of the variables.

 The spawning level field is not used when performing commands for handling the designation D. When a command resumes. all the spawners equivalent to the current spawner are transformed into dead spawners. This removes all occurrences of a level and makes this level reusable for later backup. For the execution of the orders, only the nature field of the parents intervenes to determine the free / bound status of a variable. The level field is used by the memory retrieval mechanism to know the exact accesses when marking the useful cells.

 Figure 10 is an example of srepresentaflon. The backup represented by the parent C16 is of size 4. At each level 0. 1. 2, and 3 corresponds a designation DO, D1, D2 and D3. These designations match terms with the names entered in the fields ni. n2 and n3 active spawners of the corresponding level. C15 and C14 are cut off parents equivalent to the active parent C12. One will notice the sharing in the representations of the terms saved at various levels: for example the representations of Di (cl: Ci) and D2 (c1: Ci) have in common the cells Cl. C2. C5. C6 and C7. The variables C2.C6 and C7 are considered as linked in level 2 whereas they are considered as free in level 1.

REPRESENTATION OF THE ABSTRACT STATE
Definition: rules
roles = references - [ci, c2, vi.v2.d2.niv, disp]
Definition: coherent name
n is name ~ consistent with R if
do not names. R e roles
and C indicator (n) = d1 or indicator (n) = R (information (n)))
Definition: consistent configuration
M is confiGuratIon ~ consistent with R si
M e configurations, R e r roles
and
V re references
R (r) = cl or R (r) = c2
left (M (r)) is name ~ consistent with R
and right (M (r)) is name ~ consistent with R
and CR (r) = v1 or R (r) = v2) and status (M (r)) = undecided
R (generator (M (r))) = level
and
nature (M (parent (M (r)))) t dead
iiaison (M (r)) is name ~ consistent with R
and R (r) = level and nature (M (r)) = cut R (previous (M (r))) = level
and R (r) = level and nature (M (r)) = active and level (M (r)) rO
R (previous (M (r))) = level
and i ru e references
ru is s ~ ultimate of precedent (M (r)) in M
and n1 (M (ru)) is name ~ consistent with R
and n2 (M (ru)) is name ~ consistent with R
and n3 (M (ru)) is name ~ consistent with R
Definition: representation
M, R, g is a representation of D, S Si
M e configurations R e roles ge references De e designations S e backups
and M is ~ consistent with R configuration
and # ne names CD (n) ## => n is name ~ consistent with R)
and M is d ~ representation of D
and R (g) = niv and nature <M (g)) tmort
and V rs references
R (r) = level and nature (M (r)) # dead
# S trails - references)
S (O) = g
andvj integers C j <i => S (j + 1) = previous (M (S (j))))
and S (i) = r
and i SC s scorrespondances
M is srepresentation of SC and SC (g) = S
and M, level (M (g)) is t-representation of D
Comment:
A role element is a memory allocation status for cells.

The brand disp qualifies the available cells, the other brands qualify the occupied cells and indicate the role they play.

 A name that cites a cell is name, coherent if that cell is busy and if its role matches that name.

 A memory state is qualified as a coherent configuration if all the references encountered in the occupied cells are occupied cell references and whose role is in accordance with the role induced by the reference location.

 The representation relation connects the concrete state consisting of the memory state of the cells and the current genitor register. an allocation state and the abstralt state consisting of the designation D and the backup S. The concrete allocation state results from the memory allocation and recovery mechanism and depends on the state of its own memories: he is represented here by a role P.

 The memory is internally coherent. The names assigned to the user under designation D are consistent. There is only one S backup, and its sub ~ backups, in the system and all active or cut parents, participate in its representation: all these parents are accessible by the reference string from the current parent register.

 Furthermore. the designation D. which is in relation of d, representation with the state of the memory, is also in relation of t ~ representation with the field level of the current spawner. In fact, the reference of the current parent is systematically entered in the variable's parent field when executing the substitute commands. Thus the representation of any term accessible by the designation D is already in a form ready to be saved.

- ANNEX 3
MECHANISMS OF THE IMPLEMENTATION PROCESS
search mechanism ~ representative (nn name) name
nn - n
loop so n.indicator ç (vl.v2J
I m 1 state ~ link [n.information] # e1
if el.statut = undecided then state ~ parent [n.information] # eg
if el.statut = free then exit
I If eg.nature = death then exit
I m II link [n.information] # n
I If n.indicator = level then
III research ~ gen repository (n.information) - n.Information)
no result
If nn refers to an imported variable, the link value is inspected.

until there is something more than a linked variable. Furthermore. if the name then obtained is that of a level, the active parent representing the sire cited by this name is sought. This is the name finally obtained that is called representative of
IF the memory is internally consistent and sl the name is consistent. the mechanism ends and the result is ultimate of nn.

search mechanism ~ gen ~ representative (g: reference): reference
g 2 g1
m being ~ spawner [g1] -etatgen
buckle soque state nature = cut
1 m previous [g1] # g1
1 m state ~ spawner [g1] # shelf
g1 # result
Given a reference to a parent. this mechanism makes the reference of the first active spawner in the chain beginning with this spawner, and of the same level as him.

 If the memory is coherent and if g is the reference of a non-dead parent, the mechanism ends and the result is ultimate of g.

mechanism build (ng.nd name mc: (cl, c2j) name
allocation ~ celluie ~ ref
rnc.ref ^ result
search ~ representative (ng) ^ rg
m rg # left [ref]
search ~ representative (nd) e rd
m rd # right [ref]
A cell is allocated. It is considered in the manufacturer format. Two names are arranged in the left and right fields. who are the respective representative names of ng and nd. The result consists in the nature mark of the constructor and the reference of the cell. On figure 11, the representative name of v1: C1 is c1: C2 because the varlabie in Ci is linked, its status being Undecided and the parent correspondent not dead.

 The role of the cell referenced by ret passes from disp to ci (or c2, according to the mark mo). The designation D is increased by the name cl: ret (or c2: r.f).

mechanism create ~ variable mv: (vi, v2)) name
allocation ~ cell ^ ref
mv.ref | result
m llbre, D - state ~ link [ref]
A cell is allocated. It is considered in the variable format. Its status field is initialized to free. The result includes the mark of nature mv and the reference of the cell. This is illustrated in Figure 12.

 The role of the cell referenced by ref goes from disp to vl (or v2, according to the mark mv). The designation D is increased by the name vi: ref (Or v2: ret).

This cell represents a new element of the variables because it is not referenced since nowhere.

substitute mechanism (nv, nt name)
search ~ representative (nv) ^ rv
searchrepresentative - rt
m
I undecided, spawner ~ current # state-binding [rv. information]
I rt # link [rv. information]
The representative name of nv quotes a cell that. view in variable format, is a free variable. This variable is linked, that is to say that are placed in its parent and status fields respectively the undecided mark. the reference of the current spawner and the representative name of nt. In FIG. 13, the parameter vi: Ci contains the reference of a linked variable; its name representing cl: C2 is ranked as the binding value of the variable located in
C4.

The name nv indicates, before the execution of the command, an element v of the variables. The name rw, ultimate of nv, is a direct name of v. He therefore cites the free variable on which all representations of occurrences of v. By transforming this cell into a linked variable, all occurrences of v are replaced by occurrences of the term designated by nt. This replacement is effective in all terms accessible by the designation
D.Cependant. the parent field of the cell contains the reference of the current parent whose level is higher than all the levels currently saved,
Designations specific to each level. in relation of t ~ representation with the state of the memory. remain unchanged and the replacement is therefore Inaffective in the terms saved.

mechanism create ~ data1 (d data) name
dl, d - result
The creation of a datum i consists simply in adding the mark of nature to the information passed in parameter. The data does not consume memory resources.

mechanism create ~ data2 (d: data2): name
allocation ~ celluie - ref
d2.ref result md # value ~ d2 [ref]
A cell is allocated to hold the data. The result includes the reference of this cell. This is illustrated in Figure 14.

The role of the cell referenced by ret moves from disp to d2. Designation
D is increased by the name d2: ret.

mechanism access ~ data (nd name) data
search ~ representative (nd) # n
n.information # result
The result is obtained by removing from the representative's name his nature mark.

 The name nd denotes a link d of datai. The last name, the ultimate name of nd.

is a direct name of d. The name n is therefore of the form d1: d and its field
Information given and result is worth d.

mechanism access ~ data2 (nd: name): data2
search-representative (nd) # nm value ~ d2 [n.information] # result
The contents of the cell referenced by the representative name of nd is rendered as a result.

 The name nd designates an element of data2. The last name of nd is a direct name of d. He therefore quotes a cell in the format ~ d2 value whose content, rendered as a result. is worth d.

mechanism access left (nc name) name
searchrepresentative (nc) ^ rc
m left [rc.informationj ^ n
searchrepresentative (n) - result
The result is the representative name of the name found in the left field of the cell referenced by the representative name of nc.

 The name nc designates a term built cona (tg, td). The name rc, the ultimate name of nc, is a direct name of cons (tg.td), so it quotes a cell in the constructor format.

The result. ultimate name n contained in the left field of this cell.

denotes tg. Moreover this name is. a direct name of ig. which makes it possible to affirm that after a command to reduce or to resume the designation D includes only direct names.

mechanism access right (nc name) name
Search ~ representative (nc)
m right [rc.information] - n
search ~ representative (n) $ result
The operation is identical to that of the command access ~ left. It is illustrated in Figure 15.

mechanism test nature (n name): marquedenature
search ~ representative (n) # rn
rn.Indicator # result
The name n designates a term t. The name rn. d ~ ultimate of n, is a direct name of t. Its indicator field, rendered as a result. give the nature of t.

mechanism compare (ni.n2 name): ~ mark of comparison search ~ representing (ni) rnl
search ~ representative (n2) # rn2
if rnl = rn2 then equal - result
sinonsi rn1. indicator t rn2.1indicator then different - result
if not
I case rn1, indicator
I d2 then
I m value ~ d2 [rn1.information] # d1
I m value-d2 [rn2.information [# d2
I i if dl = d2 then equal ^ result
otherwise different - result
I then
I m state ~ spawner [rn1. information
m I nor etablenitor [rn2.informationJ - eg2
II s. Level = eg2.threshold then equal to result
otherwise different - result
I cl.c2 then undecided - result
I vl.v2.di then different - result
The names n1 and n2 denote two terms ti and t2. The names rnl and rn2. dultimes of n1 and ns, are direct names of ti and ts. If rn1 is equal to rn2. ti is equal to t2 because a name means at most one term. The marks of rnl and rn2 are indicative of the nature of the terms ti and t2.If these marks are different, the terms are necessarily different. If the marks are equal to d2. the terms are data2 whose values are inscribed in the cells in the format value ~ d2 cited by rn1 and rn2. The result is that of the comparison of these values. If the marks are equal to niv, the terms are levels whose values are written in the level fields of the parent format cells mentioned by rn1 and rn2. The result is that of the comparison of these values. IF the marks are equal to cl or c2. terms are constructed terms whose comparison would require costly and unwanted cell travel in the intended applications. The machine responds un decided ~ in this case.

Finally the only remaining cases for the marks are v1, v2 and dl: in cases vl or v2, rnl and rn2 are two different direct names of variables and the variables are different because an element of the variables is represented by only one cell. In the case d1, rnl and rn2 are two different direct names of data and these data are different because their values are the fields
Informatlon of rnl and rn2.

save mechanism (nl, n2.n3 name)
search ~ representative (n1) # nn1
search ~ representative (n2) - nn2
search ~ representative (n3) # nn3
search ~ gen ~ representative (spawner ~ current) # g1
m nni, nn2.nn3 &num;; name ~ 1 ~ 2 ~ 3 [g1]
allocation ~ call ~ parent # g2
m state ~ parent [g1] # eg1
active. (eg1, level + 1) # eg2
m eg2 # state ~ parent [g2]
m parent ~ current # previous [g2]
g2 - spawner ~ current
The representative names of i, n2, n3 are saved in the active spawner representing the current spawner. In figure 16. it is in C12. A new parent is created, its level is one unit higher than the old one, it is him that marks then spawner ~ current.

Before the execution of the command. the current spawning register contains the reference gc1 of a spawner that corresponds to the Savant backup. After execution, the current breeder register contains the reference g2 of an active parent. this active generator is new, the role of gt has changed from disp to Ive. The reference g2 corresponds to the new backup Saprès, Indeed, its previous field contains gc1. which corresponds to Sovon '. and g1. which is S ~ uitime of gal, contains in its fields neither. n2 ei n3 three names ni, nn2 and nn3 which are direct names of the terms to be saved. These names, which designate these terms in the designation D. also designate them in a designation Dh. where k is the level of gc1. The designation De is compatible with the state of the memory according to the relation t-representation thanks to the systematic inscription of the reference of the current spawner in the field spawner of the variables during the commands to substitute. The new backup is deduced from the old by adding to the top of the triplet terms defined by the parameters of the command. Her size. k + l. is entered in the level field of the new current parent referenced by sz. It will be noted that the names inscribed in the parents are direct names. which makes it possible to affirm that the designations
Dk's at each level have only direct names.

resume mechanism: <name, name.name> state ~ parent [parent] ~ current [# stateg
1 registration, sugar (Atatg. Level-1)
2
i parent ~ current # g
I loop while stateg.nature = cut
II m previoustgj ~ ng II m dead, # # state ~ spawner [g]
II m ng # g
II m state ~ spawner [g] # stateg
I m previous [g3 | ~ current parent
I m death, # - etablenitor (gJ
search ~ gen ~ representative (spawner ~ current) # gr
m noun ~ 1 ~ 2 ~ 3 [gr] - ni.n2.n3
3 start-up, supply (current-feeder nl.n2.n3) - spawner ~ current
ni, n2.n3 - result
The previous layer must be resumed, to go back and retrieve the three terms saved as three names. In figure 17. these names are in the parent located at C12.

 A registration is requested in 1 to maintain the respective positions of the execution process and the recovery process. The latter, which treats the strata by decreasing levels, may indeed be caught up by the process of execution at the opportunity to resume. A forced operation at the inferior level is then taken with respect to it.

 In 2, all the parents of the stratum at the top of the stack, that is to say any cutters and an active parent. located in figure C10 and C18, are put to death. This has the indirect effect of making free again the variables that were linked during the stratum that has just been abandoned. Indeed. their spawning field points to these dead spawners, which is equivalent to being free.

The recovery process will take care of its side of normalizing the situation by noting the indication of freedom in the variable itself. thus allowing, in deferred, to destroy the dead spawners and to recover the place which they occupy.

 In 3 it is taken advantage of the fact that the designation is reduced to the three names returned as result to possibly trigger a memory recovery cycle. This is identical to what is achieved by a reduce command.

 Before executing the command, spawner ~ current contains the gci reference of a spawner that corresponds to the Savant backup of size k. Savant being different from the backup. the previous field of the active parent gcrl equivalent to gcl contains the reference gc2 of a parent that corresponds to savant's under-saving of size k-1. After execution, the current parent register contains gc2 and the new After backup is deduced from Savant by removal of its head element.The new designation D is the designation Dk-l which associates with the three names returned as terms saved by the level k-1, This designation ki. compatible with the state of the memory according to the relation t ~ representation, is made compatible according to the relation d ~ representation by transforming all the spawner level k into dead spawners.

mechanism get ~ level ~ current: name
niv.generator ~ current # result
The result is the reference of the current parent. with the indicator niv. This is illustrated in Figure 18.

 This name refers to the size of the backup S. directly if the current parent is active, indirectly if it is cut.

mechanism cut (n name)
state ~ breeder [n.information] - eg ~ target
m state ~ spawner [spawner ~ current] -eg
if eg ~ target.level <eg.level then
I ~ resetting ~ on ~ cutoff (eg ~ ble ble level)
1 2
II spawner ~ current # g
It loops as much as>level> eg ~ target.number
III m cut. eg ~ target level # state ~ spawner [g] III m previous [g] ≈gg
III m state ~ parent [g] # eg
The name n designates a level, that is to say it includes the reference of a non-dead parent. it is necessary to destroy the strata at the top of the backup stack which are posterior to the stratum of the mentioned spawner. On figure 19, this spawner is in Cii.

 Its role is to deal with the situation of the recovery process, in case it is in the process of marking a stratum destined to be destroyed.

In 2, the execution process cuts off all parents to the excluded target level. and readjust their level to that referred, which is worth ì in the example of Figure 19.

reduce mechanism (n1, n2, n3: name): <name, name, name>
search ~ representative (n1) # nn1 searchrepresentative (n2) - n n2 nn2
search ~ representative (n3) # nn3
nn1, nn2, nn3 # result
1 start ~ batch (spawn ~ current, nn1, nn2, nn3) # spawner ~ current
Representatives of the three names passed in parameter are rendered in result.

Thus in Figure 20 the names cl: C3. niv: C10 and di: a are respectively direct equlvallents of the names v1: CO, niv: Cl i and dl: a. These three names summarize the access that the user now has as part of the designation.

These InformatIons are assigned to an attempt to start batch 1. This will be effective if the recovery process is pending at that time.
After executing this command, the designation offered to the user includes only the three direct names returned in the result as well as direct names designating the sub-terms of the terms accessible by these three names.

This is due to the property of access commands to the terms access and access right ~ which result in only direct names. Thus on flgure 20 the names vi: C9 and vi: C8 have disappeared from the designation although C8 and C9 cells still participate in the representation of the designatable terms after execution of the command. On the other hand the names such as cl: Cl and c2: C2 which do not participate in the representation of the designatable terms after execution of the command. have also disappeared from the designation.

mechanism Initialize Initization ~ management ~ memory
allocation ~ cell ~ parent - g
active m, O # state ~ parent [g]
g # spawner ~ current
A parent is created. it will still be active and will remain the lowest in the backup stack. Its level is O and its previous field is meaningless.

- ANNEX 4
RECOVERY OF CELLS. SYNCHRONIZATION AND IMPLEMENTATION
RECOVERY PROCESS
DATA STRUCTURE
THE MEMORY OF ALLOCATION STATUS
The type of information status ~ allocation has for possible values {batch1, batch2. available 1. The recovery process uses a status ~ alloc table of status ~ allocation type memory. This table is indexed by a reference.

Comment:
Each cell is associated with an allocation status, if it is available then the cell is considered as being unused by the execution process. The two values, batch1 and batch2, are the allocation statuses of the cells used. There are two values in order to allow the parallelism between the execution process, cell consumer, and the recovery process, productsur of available cells.

THE REGISTERS
register level ~ marking: level
spawner register ~ sommat: reference
register name1, name2, name3: name
forne register ~ current: {batch1, batch2}
Comment:
The level ~ tagging and spawner ~ level registers define the position of the currently marked stratum in the backup stack. The registers nomi, nom2, nom3 define the three terms preserved in the stratum.

 A cell is marked if the content of its ~ allocation status equals that of the current batch register: A cell is marked by storing in its allocation status the content of the current batch register.

RECOVERY. PRINCIPLE OF FURNACES
recovery mechanism
marking: pickup: waiting ~ founée
The recovery of memory is done according to the principle of the batches. As part of a batch, the recovery process marks accessible cells and then picks up unmarked cells, ie makes them available again.

 The principle of the batches can be briefly described as follows: the start-up request described below divides the time into successive batches.

At all times the space of allocated cells is divided into two spaces.

The confirmed space contains the cells allocated from the beginning of the batch and the cells visited by the current marking. The unconfirmed space contains the other cells.

 At the end of marking. all cells in the unconfirmed space are made available. It's the pickup.

 After pickup. the unconfirmed space is then empty. A new reclamation batch can start with a new empty confirmed space and with a new unconfirmed space equal to the old confirmed space, there is batch switching. The current batch register allows the identification of the confirmed space. alternatively by batch and batch2.

 Sometimes, the recovery process is interrupted during marking and forced by the execution process to resume its activity after the registers that define its work have been readjusted, without a batch change.

MARKING
marking mechanism
loop while level ~ marking # 0
I it marking ~ term (name1); marquagejerme (name2); marquagejerme (nom3)
I saved 12
II d8cr8mentation, level, marking
I disjoint # situation ~ execution
This mechanism is used to mark cells useful for the representation of the state defined by gener ~ vertex, level ~ marking, nomi, nom2. name3 at the time of its launch. This mechanism processes the levels of the backup stack one after the other. from the one determined by gen- erate ~ vertex, in descending order. We take advantage of the way in which all the cells that participate in the representation of the terms of a stratum partially cover all the cells that participate in the representation of the terms of the lower level strata, in order to limit the path to the cells. not already marked, as will be specified on the occasion of the presentation of the mechanism marking ~ term.

 In 11 are marked the cells serving for the representation of the terms memorized by the level.

 In 12 there is passage to the lower level. The process of execution certainly becomes disjointed.

marking mechanism ~ term (nn name)
nn # n: none ~ part # so ~ place; init ~ battery ~ course
loop course
I loop 1 descent as n, indicator e {v1, v2, c1, c2] II n.information # rcell
II test ~ if ~ marked (rcell) # m
if if m = true then 11; descent exit
I case n.indicator
II vi, v2 then III 121
IIII normalization ~ binding (rcell) # status
II if status = free then exit descent I 122
IIII liais # so ~ place; rcell # rcel ~ place IIII m binding [rcell] # n
IIII Stack (Reassemble, rcell)
II c1, c2 then
II 13 III g ~ cons # so ~ place; rcell # rcell ~ place
III m left [rcell] ^ n
IIII Stack (go down-right, rceit)
I 2
II case n.indicator
II v1, v2 then tagging ~ cell (rcell)
II d2 then labeling ~ cell (n.information)
He then levels 20 normalization ~ atom ~ niv (n.information.

II sort ~ place, rcell ~ place)
I loop up
II stains # flag, what to do, rcell
II if flag ~ stack ~ empty then exit course
II if what ~ do # go up then exit back up
II marking ~ cell (rcell)
I 4
II d ~ cons # sort ~ place: rceil # rcell ~ place
II m right [rcell] ~ n
Stack II (go up rcell)
This mechanism traverses the cells that participate in the representation of the term designated by nn in order to mark Bss. This consists of traversing a tree. dcn: the nodes are constituted by the cells bearing free variables or constructors, and the leaves are constituted by the free variables and the atoms. The route is made by descending primarily on the left.

To manage this course, it uses an auxiliary memory functioning in plle associated with the mechanisms
init ~ pile ~ course that inltise the pile and the empty state,
Stack (: {go up, go down ~ right},: reference) which stacks the parameters, unpacks: <{stack ~ empty, stack ~ no ~ empty}, {go up, go down ~ right}, reference> which returns the information depilated unless the battery is empty, in which case the result is pllel ~ empty.

 The descent through a node consists in stacking the reference of the node, with the indication of what it will be necessary to make the ascent, when one has depilated this reference.

 The marking of the nodes is done during the ascent. so that if a cell is tagged, then all accessible cells from that cell are marked. This property is necessary so that the abandonment of marking caused by the mechanisms recalagesurreprlse and recalagesurcoupure can be done by laIssant a situation of marking consistent.

 1 Only the names of variables or constructed terms can lead the path down, with stacking of the reference of the corresponding cell. For these names, there was nothing to remember where their occurrence was, because it will not have to be updated.

 The course falls on a cell already marked. He will not go down further. Indeed, if a cell is accessible under two levels i and i such that i <J the set of cells to which the cell gives access in the context of i is a part of the set to which it gives access in the i: the difference of course coming exclusively from the way in which the variable cells to which this cell gives access are interpreted.

So, as long as you walk through the layers by decreasing levels, when you encounter a cell that has already been marked during the course, you can skip the path of the cells to which it gives access under the level under marking, because they are certainly already marked.

This phenomenon is illustrated in Figure 21. The sets of cells E1 and
EO represent respectively the terms of the level 1 and O strata conserved in the Cil and Ci3 parents. The intersection of E1 and E0 contains the cells C5, C6 and C7 which represent for level 1 the terms
cons1 (cons1 (cons1 (b, c)), a),
at,
cons1 (b, cons1 (b, c)),
and which represent for level O the terms
cons1 (x, y),
x
there.

 For each of these cells, the term represented by it at level 1 is an Instance of the term that it represents at level 0.

 It may be that the process encounters a cell that is not marked because it has already marked it during its strata journey, but because it has been allocated recently, that is, during from the current batch, to the process of execution. The principle of not going through the cells to which it gives access remains valid. because it leads to cells each of which is newly allocated, therefore automatically marked, solt accessible at the beginning of the batch, and therefore destined to undergo marking elsewhere.

 121 The run encountered an unmarked cell carrying a variable. Take a decision if it is to be considered as the sight of the level under marking, in which case it is necessary to stop descending, or as bound, in which case the route crosses the link and continues to descend.

 122 Crossing the link. The path attacks the link value of the variable and goes down. This results in the stacking of the reference to the variable. We must also memorize in the short term the place of occurrence of the name attacked, that is to say the reference to the variable and the IndIcatIon that it is a value of the season, for the case where the name would be of type level, which will only be discovered at the next loop turn.

 In that case. we must rectify the content of the place where the name appeared, by putting a new name which bypasses the cutters.

13 The course encountered a cell not yet marked, carrying a builder. The course will descend to the left, hence the stacking of the reference cell, with a directive that will serve, when the course will reach again this cell during the ascent, to decide the action to be taken. to go back down to the right rather than go up again. We also memorize in the short term the place of occurrence of the name in the left part of the constructor. for the same reason as in 122,
2 Various actions are undertaken, corresponding to various kinds of sheets of the course.

 23 For a level atom. it may be necessary to modify the content of the place where it appears to make him quote the active parent representing a cutter. So. at the end of the marking. there will be no references to unmarked cutters.

 4 Preparation to go down to the right.

normalization mechanism ~ link ref reference): (lia, lienaj
m state ~ link [ref] - el
if e1, status = free then free - result: output
state ~ spawner [e1.generator] # stategener
If stategén nature - death then
I 11 m free, # state ~ link [ref]
I free # result: exit
If state, level> level ~ then mark 111; I free # result; exit
2
I linked # result
I If state, nature = cut then 21
II search ~ gen ~ representative (e1.génitout) II m undécis.g2 # state ~ link [ref]
This mechanism decides whether the variable carried by the reference cell roE is seen as free or linked from the level ~ marking.

On this occasion. it rectifies certain information in order to remove references to dead or cut spawners to then recover the memory they occupy.

 The variable is free in absolute terms. We normalize the situation by bringing this indication back into the cell of the variable itself. This makes it possible to pick up the cells occupied by dead spawners, since there will be no more references to them. This is illustrated in Figure 23.

 111 The variable is linked. but in the context of a level higher than the level under marking: it is therefore considered as free from this level. Its binding value is not taken into account. and the parent responsible for his affair is not inspected.

 2 The variable is certainly related to the level under marking.

 21 Standardization of the reference from the variable to the parent responsible for the link: this reference is installed to directly indicate the active parent corresponding to the cut parent. This is illustrated in Figure 24. Because of this. as the marker attacks the levels in descending order, the disappearance of the references to the cut spawners having a level lower than the attack level allows, at the end of the treatment of the level. to kill all his cutters, and later to pick them up.

mechanism normalIsation ~ atom ~ niv (refg: reference,
sort ~ place: {g ~ cons, d ~ cons, liais}, rcell ~ place: reference) state ~ spawner [refg] #general
If statusgén.nature = cut then I search ~ gen ~ representative (refg) # gr
I case so ~ place
I g ~ cons then niv.gr # left [rcell ~ place]
I d ~ cons then niv.gr # right [rcell ~ place]
I liais then niv.gr. # link [rcell ~ place]
rerg is the reference of a parent. so place ~ place and.rceil ~ place determine the place where the mechanism arranges the reference of the first active parent prior to that who has rerged for reference. The effect is shown in Figure 25.

search mechanism ~ gen ~ representative (g: reference): reference
g # g1
m state ~ spawner [g1] # stategenerate
loop as stategbn.nature = cut I m previous [g1] # gi
I m state-parent [g1] - state
g1 # result
This mechanism makes the reference of the first active parent in the brood chain starting with the parent passed as a parameter.

decrementation mechanism ~ level ~ marking
1 I m state ~ spawner [spawner ~ summit] # stateg1
I loop so state 1 .nature = Cut II m previous [spawn ~ top] # g1
II m dead, # # state ~ spawner [spawner ~ top]
II g1 - spawner ~ top II m state ~ spawner [spawner ~ top] # stateg1
2 marking ~ generate (genitor-vertex)
3
I level ~ marking - 1 # level-marking
I if level ~ marking # 0 then
II 31
III genitor ~ vertex - ante ~ g III m previous [ante ~ g] # genitor ~ vertex
III search-gen ~ representative (parent ~ vertex) # g
II 32
III mg # previous [ant-g]
III mg name ~ 1 ~ 2 ~ 3 [g] # name1, name2, name3
Figure 22 illustrates the reorganization of the brooding of the broodstock and the installation of the registers which define the new stratum to be marked, when passing to a lower level.

 t Killing of potential cutters participating in the level just marked, until the first active gener is met, and marking of the latter. On the face. he is in C15.

 3 Pass to the lower level. On this occasion, we can detect that the battery is exhausted.

31 Search for the first active parent of the lower level. In the figure, it is in C 18
32 Unhooking of the chain of potential cutters that ended in the active parent found.

COLLECTION
pickup mechanism
O # ref
loop as ref <reference ~ cell ~ max
I revision ~ status ~ cell (ref) I ref + 1 # ref
This mechanism traverses all cells to make available those that still bear the mark of the previous batch, which is a sign that they have become inaccessible to the user and therefore recoverable.

CRITICAL MECHANISMS AND SYNCHRONIZATIONS
In this partle are described the mechanisms that access the memories shared by the two processes. Critical phases are protected by exclusion locks. declared under locks. Interactions are through conditions. declared under the conditions condition.

MODIFICATIONS OF THE SAFETY STACK BY THE EXECUTION PROCESS
register situation ~ execution: {tangent, disjoint}
Saved lock
The sItuatIon ~ execIon register is used to decide between abandoning or continuing the marking of a stratum destroyed by a cut. When the stratum in the course of marking has been, at a moment of its marking, of the same level as the current parent, the processes are said to be tangent. Otherwise They are called 'disjoint' In the tangent case, the recovery process can not give up, under the effect of a break. marking of the current stratum.

Indeed. in this case, all the cells accessible from the stratum under marking can, at the time of the passage to tangent, possibly partaken to the current desIgnatIon. As a result they must all be marked.

reset mechanism ~ on ~ recovery (level ~ target: level)
saved
I if level ~ target # level ~ then mark 1
II if level ~ referred to <level ~ marking then 11
III suspension recovery
III decrementation ~ level ~ marking recommencement recuperation
II 12 tangent and sItuation ~ execIon
This mechanism is illustrated by Figure 26.

 1 The registration is effective only if the level taken is less than or equal to the level being marked. In this case, steps must be taken to ensure consistency in the representation of the two processes.

 11 If the target level of recovery is strictly lower than the level under which it is tagged. the stratum being marked is destroyed for the execution process. The recovery process is forced to abandon the current marking and begin marking the lower level.

 In the previous case as well as in the case where the clone level of the recovery is simply equal to the level under the marking, the two processes become tangent. In fact, the stratum which is now marked is in both cases represented under the designation.

reset mechanism ~ on ~ cutoff (level ~ target: level
saved
if level ~ marking> target level then i
IT suspension recovery
I case situation ~ execution I disjoint then he
II loops while level ~ marking # level ~ target
III decrementation ~ level ~ marking II restart recovery
I tangent then 12
II spawner ~ vertex # g; m state ~ spawner [g] # egg
III if egg.nature = active then empty e indic ~ list ~ off if not otherwise
III no ~ empty # indic ~ list ~ unhooked
IIII loop while egg.nature = cut IIII rn cut, level ~ target <state ~ spawner [g]
IIIII g # ante ~ off the hook
IIIII m previous [g]>g; m state ~ spawner [g] # egg
III labeling ~ cell ~ parent (g): g #
III loop, egg. level> level ~ target
IIII
IIII m previous [g] # g; m state ~ genius [g] # egg
IIII sI -egg.nature = cut then
IIIII case indic ~ list ~ unhooked
IIIII then empty
IIIIII g + spawner ~ top
IIIIII no ~ empty # indic ~ itte ~ unhooked
IIIII no ~ empty then mg # previous [ante ~ off the hook]
IIIII loop lantque egg.nature = cut
IIIIII m cut, level ~ target # state ~ spawner [g]
IIIIII g - ante ~ off the hook
IIIIII m previous [g] # g; mate ~ spawner [g] - egg
IIII mg # previous [ante ~ g]
IIII marking ~ cell ~ genlteur (g): g # ante ~ g
III level ~ target # level ~ marking
III continuation recovery
This mechanism is illustrated by Figure 27.

 1 Measures are to be taken if the cut destroys the stratum being marked and possibly strata not yet marked.

 11 In case the processes are insignificant. the current marking is abandoned and the recovery process is forced to start marking the stratum just below those destroyed by the cut.

 12 In case the processes are tangent. marking of the current stratum can not be abandoned. However, in order to give the process of execution a real vislon of the list of parents consistent with its logical vision, the broodstock cut from the level above or equal to the target level of the cut and dating before the start of the batch are taken from this list.

SYNCHRONIZATION FOR OPERATION BY FURNACES
register recovery ~ in ~ expectation: {true false}
batch lock
condition proposal ~ batch
mechanism diemarrago ~ supplied (g1 reference, ni, n2, n3 name) :: reference
batch
I recovery case ~ in waiting
I wrong then 1 g1 - result
I true then 2
II 21
III case batch ~ current
III batch1 then batch2 # batch ~ current
III batch2 then batch - batch ~ current
II m state ~ spawner [g1] # egg)
II 22
III g1 # spawner ~ top
III egg1, level # level ~ marking
III ni, noml: n2 t name2: n3 - name3
II 23 III search ~ gen ~ representing (g1) # g2
III g2, result
I 24 III tangent # situation ~ execution
III restart recovery
1 If the recovery process is not pending, the mechanism is ineffective.

 2 If the recovery process is pending. starting a new batch is effective.

 21 Inversion of the batch mark.

 22 Initialization of the registers defining the first level to be marked.

 23 The reference of the active parent representing si is returned as a result.

In fact, cut brooders present in the backup pile at the beginning of a batch will be put to death and the cells they occupied recovered at the end of this batch. Logically. In view of the execution process, the list of spawners only includes active spawners. The chain of potential cutters that belong to the stratum that will undergo the marking is known only from the marker, by the genitor register ~ vertex.

 24 Launch the recovery process at the beginning of its mechanism. there is tangency because the list of backups seen by this process contains information useful for representing the designation by the execution process.

mechanics waiting day
batch
I true recovery ~ in waiting
I wait proposition ~ batch
CELL ALLOCATION MANAGEMENT
consumer register ~ wait ~ cellute: {vral
alloc lock
cell condition ~ available
allocation mechanism ~ cell: reference
alloc
I loop
# # search ~ cellute # rm # # if m # found then 12
# # # vral # consumer ~ wait ~ cellul
# # # waiting cellute ~ available
# # otherwise false # consumer ~ wait ~ cell: exit
# 2 batch ~ coruante 3 status ~ alloc [r]
I r. result
search ~ cell is an undescribed mechanism that allows to obtain the reference of an available cell if it exists, or the mark not ~ found if it does not exist.

 12 If there is no cell with an unavailable status. the execution process is waiting. The next pickup can free him from his wait.

 2 The rendered cell is marked.

 Denialism revlsion ~ status ~ collulet r: referene).

alloc
# status ~ alloc [r] # a # s # a # batch ~ current and 3 available then
# # refund ~ cellale (a) # # available # status ~ alloc [r]
# # if consumatour ~ atend ~ cell = true then signal collule ~ dispenible
restitution ~ cell is an undescribed mechanism that updates the inventory management of available cells: it is the symmetric search cell.

tagging mechanism ~ cell (r: referral)
alloc batch ~ current # status ~ alloc [r]
tagging mechanism ~ cell ~ parent (r: reference)
This mechanism, similar to labeling ~ celluls is not described, not to go into details on how a genlieur is distributed over several cells.

test mechanism ~ if ~ marked (r: reference): {vral, faun}
alloc # status ~ alloc [r] # a
# if a = batch ~ current then true # result
# if not false # result
IMPLEMENTATION BASED ON TWO PROCESSORS
The machine is implemented on a system comprising two processors:
the "execution processor" supports the non-critical mechanisms of the execution process, as well as the user process that solicits the commands,
the memory management processor supports all the mechanisms of the recovery process, as well as the critical mechanisms of the execution process: allocate the cell, start up the batch, readjustment and readjustment.

STRUCTURE OF THE MACHINE
The architecture of the machine is illustrated in Figure 2.

 The "main memory" is the reservoir of dynamically allocated memory cells. Access is at the level of the half-cell, a unit in which the various types of information to be kept fit. The number of cells.

can wait a million. a normal configuration being of the order of 128K.

Their width is 48 blts. The access time to a deml-cell is of the order of 400 ns. It can be built based on 4164 circuits from Intel.

The "runtime processor", in interaction with the memory management processor, interprets the commands of the directory.To obtain good performance, it is a micro-programmed processor.Particular use of the machine, for example to realize a PROLOG interpreter, is realized by the adlunction of supplemental micro-programs and special memories, local to the processor.This processor can be built with the microprocessor alde in slices of the 2900 series provided by the company.
Advanced MIcro Device. The execution time of a microinstruction is of the order of 150 ns.

The "memory management processor" ensures the recovery of the memory cells that have become inaccessible to the user.This processor is responsible for managing the current status of allocation of the cells stored in the memory of the allocation statuses, to which -seul accesses it handles the requests issued by the execution processor, This processor is of the same technology as the execIon processor.It has a private memory of 16K words to contain a battery, necessary to its logic of operation
The 'allocation status memo' has as many elements as the main memory of cells. Each element encodes on two bits the current allocation status of the corresponding cell. The access time to this memory is of the order of 100 ns. It can be built with housings
Am9128-10 of the company Advanced MIcro Device.

The "memory bus" realizes and arbitrates the accesses of the two processors to the main memory.This mechanism is classiC and can be realized with the help of circuits developed by the Intel company for the control of its standard bus.
MULTIBUS.

 The "request bus" ensures the exchange of information and the synchronization between the two processors during certain phases of their activity so that the information contained in the machine remains globally coherent.It consists of some registers and means of signal exchange.

REALIZING SYNCHRONIZATIONS
Two hardware devices make it possible to carry out the synchronizations mentioned in the mechanisms previously described; Those are
a system of requests implemented thanks to the request bus.

 - Exclusive access to the memory of the cells implemented by the memory bus.

THE SYSTEM OF REQUESTS
The query system is an asymmetric device that allows the execution processor to force the memory management processor to execute a specified mechanism. This allows on the one hand to access the registers that are located on the memory management processor, and on the other hand ensures the exclusion with the recovery process which is interrupted the time of execution of the request.

 The execution processor sends a request by displaying on the request bus the identity of the mechanism to be exe- cuted, accompanied by its parameters. The execution processor then waits for the acquisition of the request, along with the results displayed on the request bus.

The memory management processor has two levels; of execution of the Instructions: the level of "fonda and the level query." Operations allows to go explicitly from one level to the other:
-Invalidation operation "requests to move to the query level.

 -the operation of "validation" of requests to go to the bottom level.

When the processor is at the background level,
When a request is received, it saves its check state, automatically moves to the query level, and executes the mechanism indicated by the query with the parameters that are being passed.

When the processor is at the query level,
if a request is received, it is not taken into account immediately. It is memorized and will be taken into account as soon as the processor returns to the background level.

When processing a request,
the acknowledgment operation "unblocks the execution processor by displaying the results on the request bus.

the end of request operation "restores the control state saved on receipt of the request and returns to the background level,
the forcing operation destroys the saved control state and causes the bottom level execution to continue at a specified control point.

EXCLUSIVE ACCESS TO MEMORY
Both processors access the memory identically. There is only one memory access bus and all accesses are sequential. If a processor requests access while the bus is busy serving the other processor. the first processor waits for the end of the service in progress to realize its access. In the case of simultaneous requests, which is quite likely because the two processors are finely synchronous for the sake of rapid exchange, the cable prioritization system favors the execution processor.

The exclusive service of the memory bus can be requested for a single elementary access or for any access sequence. In this last case. the first access of the sequence is accompanied by a command to the memo bus to maintain the exclusion between subsequent accesses. and the last access of the sequence is accompanied by an order to release the exclusion after this access.

 To provide memory access exclusion on behalf of the recovery process, the memory management processor automatically performs the query invalidation while it is in a memory exclusive access sequence. To avoid deadlocks, the execution processor must not issue a request while it has exclusive access to the memory bus. It is noted that the described mechanisms respect this constraint.

IMPLEMENTATION OF VARIOUS LOGICAL SYNCHRONIZATIONS
The interactions between the execution process and the recovery process were described using purely logical synchronization tools:
- exclusion locks: m, alone. attoc, provided
- waiting conditions: cell ~ diaponib / e, propoeifion, furn8e
- actions on a process: suspension, continuation. beginning.

 These logical devices made it possible to describe the realization by limiting as little as possible the difference of the possible hardware architectures. In the case of the presented architecture the background task of the memory management processor corresponds to the recovery process. Synchronization logic devices are realized as follows using the hardware devices available to the processors.

 The lock m is directly realized by maintaining and releasing the access exclusion to the memory.

 The save, alloc, and batch locks are made by the query system. These locks are solicited during certain mechanisms of the execution process: recalibration, reworking. allocationcell, startupsupported. These mechanisms are executed by requests on the memory management processor. This allows, besides the exclusion naturally offered by the system of requests. to take advantage of the locality of access to the registers and to the memory of the statutes of allocation necessary to the execution of these mechanisms. The practice of these locks by the recovery process is simply performed by invalidating operations and validating requests on the memory management processor.

 The realization behaves as if these three locks were the same.

We're messy that from the logical point of view we can always turn several exclusion locks into one. However. for reasons of efficiency. it would be preferable for the lock with, which is solicited for each cell allocation, to be differentiated. This would be possible with a multi-level query system. the highest priority level being used for cell allocations.

 The available cell condition is expected by the execution process, on the occasion of the aIlocationcell mechanism which is executed by query on the memory management processor. This wait is achieved by terminating the allocation request with a simple end of the request, without acknowledging the request. The reporting of this condition by the recovery process takes place when it is in -phase pickup and results in a delayed acknowledgment of this request.

 The condition proposition ~ batch is expected by the recovery process.

This wait is performed by an empty loop executed at the background level on the memory management processor.

 The actions of suspension, continuation and recommencement concern only the recovery process. They are caused by the mechanisms on ~ rocage ~ on ~ reprice and registration ~ on ~ cut that are executed at the query level on the processor memory management. The suspension is automatically carried out by taking into account the request. The control is performed by the end-of-request operation that restores the backup control status at the beginning of the request. The restart is performed by a forcing session with the checkpoint as the start of recovery.

Claims (20)

Claims. An information processing machine, intended to receive a software specific to the interpretation of a logic programming language, and comprising processing means (10) and random access memory means (12) interconnected by a bus. (13), characterized in that the random access memory means (12) comprises a memory forming a stack of parents, ordered according to an integer or level, and a designation memory, consisting of individually addressable cells, two fields at least each, each field being intended to contain information which is either an atom or datum, a reference to another cell, or a reference to one of the parents, - a parent constituting the starting point of a lattice of terms, containing itself at least one of said information, the lattice of terms being able to be extended by successive references between cells of the designation memory, - the cells thus r ferencées are either of type constructor, their fields then immediately each containing one of said information, or variable type, being put on hold for a subsequent connection, during which the two fields of a cell will serve one to associate the variable to one of the brooders, and the other to contain one of said information, and - in that the processing means (10) comprise a microprogrammed execution processor (10) that can be associated directly or indirectly to a programmable organ for receiving the interpretation software, this execution process further comprising a current parent register, which refers to one of the parents of the stack memory, the current state of the machine being thus defined by the contents of this register as well as by the contents of the designation memory and the memory forming the parent stack. 2. Machine according to claim 1, characterized in that the execution processor (10) is microprogrammed with a set of instructions comprising - the construction of a term from two others, - the creation of a variable, - the substitution of a term 8 a variable, - the access to the right part of a constructed term; - 3. 'access to the left party of a constructed term, - tests to finish If a term is an atom, a  constructed term or a variable, - the comparison of two terms other than constructed, - the saving of a term, the recovery of a term, and - 1 initialization 3.Machine according to claim 2, characterized in that the execution processor (10) is microprogrammed to also perform the following instructions - get the current level, - perform a cut. 4. Machine according to one of claims 1 to 3, characterized in that, in the designation memory (14), a manufacturer-type cell comprises a left field and a right field, used in the same way, and each comprising an indicator zone and a data zone, the latter being able to contain information of one of the aforementioned types, while the associated indicator zone indicates whether it is an atom, a reference to a cell-constructor, a reference to a variable-cell or a reference to a parent, a variable-type cell has a link status zone, which can contain 'free' as long as the variable remains free, or 'undecided' when the variable has become linked, a reference area to an associated parent, and a binding area to define a binding of this variable, by receiving information from one of the aforementioned types as well as that a corresponding indication, co defined above. 5. Machine according to one of claims 1 to 4, characterized in that the spawning stack memory (14) is arranged to allow three different formats as to the elements of the stack, these three formats all including a field 'nature' in the lead, with a 'nature' field containing the 'active' mark, a 'level' field which contains an integer, a 'previous' field which contains a reference to another its rank and at least one field 'name' which contains a name, which contains one of said information, for a format called 'cut off parent', the field 'nature' which contains the mark 'cut', and a field 'level' and a 'previous' field defined as for an active parent, and for a so-called 'dead parent' format, the only 'nature' field that contains the 'dead' mark. 6. Machine according to one of claims 1 to 5, characterized in that the spawning stack memory (14) is constructed from cells of size identical to that of the designation memory, the formats 'spawner cut' and 'dead parent' occupying a single memory cell, while the 'active parent' format is obtained by chaining together several memory cells. 7. Machine according to claim 6, characterized in that the cells of the random access memory comprise two portions of 24 bits each, each separable into a 4-bit field and a 20-bit field. 8. Machine according to one of claims 1 to 7, characterized in that the execution processor (10) is microprogrammed with a 'reduce' instruction, intended to allow the recovery, in the RAM means, parts of this contains information that has become useless.  9. Machine according to claim 8, characterized in that the processing means are also arranged may partly meet memory-cell allocation requests, allocating available memory cells, and secondly respond to to a specific request following the command 'reduce' by performing an automatic recovery of cells containing information that has become useless. Machine according to claim 9, characterized in that the processing means comprise a separate memory management processor (12) which has a 'wait cell' register, able to contain a 'true' or 'false' mark, and an 'executor status' register which contains one of the two marks 'tangent' or 'disjoint' according to the state of the execution processor relative to the memory management processor, the two processors interacting by requests, and the machine has an exclusive access mechanism to the memory allowing mutual exclusion between the two processors. 11. Machine according to one of claims 9 and 10, characterized in that the processing means (32) perform the automatic recovery in the following manner - scanning at least part of the cell lattice defined by the content of the means RAM memory, and useful to the execution processor, by marking the cells according to predetermined conditions, - and then picking up unmarked cells, which are now considered free. Machine according to claim 11, characterized in that an allocation status memory (15) is associated with the memory management processor (12), said allocation status memory (15) comprising a number of elements at least equal to that of the cells of the designation memory (14), each of these elements being capable of different states comprising a free state, and a marked state at least, in that the memory management processor (12) ) performs the marking of the cells of the memory (14) by an inscription in the corresponding element of this allocation status memory, and in that the memory management processor (12) performs the collection by a complete scan of this allocation status memory (read), while passing its unmarked elements to the free state. 13. Machine according to claim 12, characterized in that each element of the allocation status memory (15) comprises three different states, that is to say the free state, and a first and a second non-free states, respectively defining the assignment of the corresponding cell of the random access memory means in a first and a second batch, and in that the memory management processor (12) alternately performs the memory recovery on the cells of the memory. first. and the second batch, the marking of inverting the batch assignment of the cells, reversing the non-free state of the associated element in the allocation status memory, and the collection of free state the elements of the allocation status memory that have retained the mark they had at the beginning of this batch. 14. Machine according to claim 13, characterized in that the allocation status memory (15) comprises, in one-to-one correspondence, as many elements as there are cells in the RAM means. 15. Machine according to claim 14, characterized in that the memory management processor further has the following registers j parent vertex 'which contains a' reference ',' current batch 'which contains one of the two marks' allocated  first batch 'or' allocated second batch ',' level under marking 'which contains an integer,' name under marking 'which contains at least one name, and in that the management processor is able to respond to a' start 'request a batch 'emanating from the execution processor following a' reduce 'instruction, said request being accompanied by the reference of a' parent 'and that of at least one' name ', representing the current state From the runtime processor, by doing the following operations - put the reference of this spawner in the register 'spawner vertex', - invert the mark contained in the register 'current batch', - arrange the level of the new 'spawner vertex' in the register 'level under marking', - put the name in the register 'name under marking', - then by marking the term defined by the register 'name under marking', said marking concerning, for a built term, no only the cell 'constr of the term, but also the cells designated by it, repetitively if it is again constructed terms. 16. Machine according to one of claims 13 to 15, characterized in that said marking comprises, for a cell of the linked variable genus, a normalization of the link, with:  - a test to determine if the variable is free or if the  sender of the variable is dead, in which case the variable is  'free' status, and the result of standardization  is free',  - otherwise, replacing the parent of the variable by its  breeder representing, the comparison of this geni's level  representative now associated with this variable at  content of the 'level under marking' register,  in case of superiority of the first, the normalization of the binding of the variable to 'free'.  in case of inferiority or equality, the normalization of the binding of the variable to 'linked' and the reiteration of the marking with the result of the thus standardized linkage of the variable.  Machine according to claim 16, characterized in that  that the search for the parent representative includes  looking for the first active spawner encountered from  from the 'previous' field of the parent being examined, the geni  representative being that active parent.  18. Machine according to one of claims 13 to 17, characterized  that after the completion of the markings referred to above, the  processing means (12) produce  - an exploration of the pile of genitors from the geni  to the first active parent, by transforming  dead spawners cut off spawners encountered in progress  route, and a marking of said first active parent  met, which is now reserved,  - the inscription of this field 'previous' in the register  'vertex breeder', replacing the previous content of  this one,  - continued exploration of the spawning pile  to the second active parent, representing the new  breeder summit,  - the inscription of the reference of the parent representing, in the 'preceding' field of the first active parent who comes  to be marked, and  - the inscription of his or her fields 'name' in the register  'name under marking'. 19. Machine according to one of claims 13 to 18, characterized in that in the presence of a cell allocation request during pickup, the memory management processor (12) allocates a cell having retained the mark of the current batch, while reversing this mark, instead of moving this cell to the free state. 20. Machine according to one of claims 11 to 19, characterized in that the fourth state of the allocation status memory (15) identifies cells not subject to the action of the memory management processor (12).