FR2525839A1 - Digital signal detection system - includes integrator producing steady signal in presence of digital signal and changing it in absence of digital signal - Google Patents

Abstract

The process for the detection of the absence of a digital signal (Q) includes integration of the digital signal, in order to provide a signal with constant amplitude (Vm) corresponding to the presence of a signal, and a changing amplitude corresponding to the absence of a signal. The changing signal takes a value greater than that of the constant amplitude signal when the absence corresponds to a series of 1-bits, and a value less that this when the absence corresponds to the O-bits. The series of bits constituting a present signal contains bits O and 1 with equal probability. A window discriminator circuit with two set thresholds detects the absence signals when the integrated voltage steps outside the set limits.

Description

METHOD FOR DETECTING ABSENCE OF DIGITAL SIGNAL,
DEVICE FOR IMPLEMENTING THIS PROC @ DE
AND USE OF SUCH A DEVICE
The present invention involves a method for detecting a digital signal, a @ if q @ 'a device a @ urant @@ implementing this method, and used in particular in @ n @ @ transmission by fiber optics,
In the field of fiber-to-the-@plication of @@ training or digital data coded in a way that @@ o @ able, it is necessary to monitor the electrical equipment used so as to detect any fault of one of this @ equipment - that for example a failure of the transmitting module or a @ cut of @ optical fiber. At the level of the digital data, an @el of @ aut causes an absence of signal translates soi @ by a continuous series of bits equal to 1, ie pe @ a continuous series of b @ ts equal to 0. Consequently, it turns out to be necessary to detect the absence of digital signal to be able to mediate @@ then with the fault causing this absence of signal.

 Different methods are known which make it possible to detect the absence of a digital signal in a transmission system, for example on optical fiber. One of them uses a monostable whose time constant is chosen @@ greater than the largest period which separates two successive bits of the digital signal Under these conditions in the presence of the @gnal numé @@ ne, it that is to say in the presence of a series of equiprobable bits equal to 1 and to 0, the monostable is rediscovered for any edge for example of rise present during the time interval corresponding to the stable state of said monostable, the latter therefore permanently generating a continuous logic level representative of the presence of the digital signal. When a continuous series of bits equal to 1 or 0 appears, such a continuous series being representative of the absence of digital signal, the monostable changes logic level, thus making it possible to: detect the absence of signal In addition, the monostable is followed by an alarm system that goes off @@@@ ch @@@ when there is no signal detected.

 However, such a method has drawbacks. Indeed, monostable @e must operate at the rate @@ digital signal to be able to correctly detect t @ us @@@ @ @ ts present, so that with deb @ ts elevés @@@@ ermations, @@ is essential to design the monestable in a @ @ech @@@@ gie fast to trigger the alarm @ me in the absence of signal; therefore, such a so-called rapid monostable consumes a lot of current and is relatively expensive.

 The aim of the present invention is to remedy these drawbacks by proposing a digital signal presence detection process which is simple to perform, is entirely satisfactory, and calls for its implementation. en o @@@@ e to a positive di @ whose structure has few components, and don @ current consumption is relatively low.

To this effer; the inventi @@ a pout @@ je @ a pro @ edé of detection
I absence of digital signal con @@@@@ by a first series of bits equal to @ and 0 cor @@@ spon @@@@ @ @ @ signal presence and followed by a second series con @ nue of cock equal to 1 or to 0 corresponding to the absence of signal, charac @ é @ is @ en @@ that the process comprises the following stages:
- an integration or digital signal so as to provide a signal having a given amplitu @ e sersiblemen constant corresponding to the presence of signal and @@ attenuation corresponding to the absence of signal, ledi @ attenuation taking a value higher than that of the amplitude @@ constant when the absence of signal corresponds to a continuous series of bits equal to 1 and a value lower than that of @ ampli @@ constant when the absence of signal corresponds to a continuous series of bits @ equal to 0 ;;
- when the absence of signal corresponds to a continuous series of bits equal to 1, a comparison or level of the signal obtained by integration at a given threshold greater than the substantially constant amplitude, thus making it possible to detect the absence of signal when the signal obtained by integration has a loss above the threshold;
- when the absence of signal corresponds to a continuous series of bits equal to 0, a comparison of the level of the signal obtained by integration at a given threshold lower than the substantially constant amplitude, thus making it possible to detect the absence of signal when the signal obtained by integration has an attenuation below the threshold.

The invention also relates to a device for implementing the method according to the invention, this device being characterized in that it comprises:
- an integrator of the digital signal and its digital inverse, delivering a voltage having, in the presence of the signal, a substantially constant and substantially zero amplitude constituting the average value of the signal and its inverse, and in the absence of the signal, a weakening taking a value greater than that of the constant amplitude when the absence of signal corresponds to a continuous series of bits equal to 1 and a value less than that of the constant amplitude when the absence of signal corresponds to a continuous series of bits equal to 0; and
a window discriminator detecting the weakening of the voltage obtained by integration in the absence of a signal, and comprising two given thresholds situated on either side of the substantially constant amplitude, the threshold greater than the constant amplitude assigned to a continuous series of bits equal to 1 and the threshold below the constant amplitude being assigned to a continuous series of bits equal to O, so that the discriminator provides, for a continuous series of bits equal to 1, a signal for detecting the absence of digital signal when the detected loss is greater than the corresponding threshold, and for a continuous series of bits equal to 0, a signal for detecting the absence of digital signal when the detected loss is less than corresponding threshold.

 The invention further relates to a use of the device for detecting the absence of a digital signal according to the invention, this use being characterized in that the device is mounted in the transmitter module of a transmission system by optical fibers.

Other characteristics and advantages of the invention will appear more clearly in the detailed description which follows and which refers to the appended drawings given solely by way of example and in which:
- Figure 1 shows a diagram of an embodiment of the signal absence detection device according to the invention;
- Figure 2, a to c, represent diagrams as a function of time illustrating the detection of absence of signal corresponding to a continuous series of bits equal to 0, by the device according to the invention
- Figure 3, a to c, shows diagrams as a function of time illustrating the detection of absence of signal corresponding to a continuous series of bits equal to 1, by the device according to the invention; and
- Figure 4 shows the response of the window discriminator used for the detection of absence of signal.

 FIG. 1 represents a preferred embodiment of a device for detecting the absence of a digital signal, in accordance with the invention, used in a transmission system for example on optical fiber. This device can be mounted in any equipment of the transmission system, such as for example in the transmitter module so as to detect any failure likely to occur upstream of said transmitter, the failure or fault resulting in an absence of digital signal.

 The detection device, generally identified at 10, includes an integrator 12 constituted for example by a first resistor R1 connected to an input terminal of the digital signal denoted Q, a second resistor R2 connected to an input terminal of the digital inverse of the signal, noted Q, and a capacitor C1 connected between the two resistors R1 and R2.

 Diagram 2a represents as a function of time the digital signal Q constituted by a series of equiprobable bits equal to 1 and to 0 representative of the presence of the signal.

 When a failure occurs in one of the equipment to be checked in the optical fiber transmission system, this failure results in an absence of digital signal appearing either in the form of a continuous series of bits equal to 0, or below a continuous series of bits equal to 1.

 Thus, diagram 2a shows the absence of a signal on coming at time tl and taking the form of a continuous series of bits equal to 0.

 The diagram 3a also represents, as a function of time, the digital signal Q identical to that represented on the diagram 2a, with an absence of signal occurring at the instant tl e. in the form of a continuous series of bits equal to 1.

 Diagram 2b represents the inverse Q of the digital signal in the example chosen, the absence of signal resulting in a continuous series of bits equal to 1.

 Diagram 3b also represents the inverse Q of the digital signal in the example chosen, the absence of signal resulting in a continuous series of bits equal to 0.

 It will be noted that the digital signal Q and its inverse Q are put into logic form using for example a so-called positive logic, that is to say that at a zero voltage corresponds to a level O and that at a positive voltage or negative (for example +5 volts) corresponds to level 1.

 As it appears in FIG. 1, the detection device also includes a window discriminator 14, or double comparator, intended to detect the absence of a digital signal resulting either in a continuous series of bits equal to 0, or in a series continuous of bits equal to 1.

 The window discriminator 14 comprises for example two identical transistors T1 and T2, for example of the PNP type, and mounted in reverse with the base electrode of the transistor T1 connected to the emitter electrode of the transistor T2, and with the base electrode of the transistor T2 connected to the emitter electrode of transistor T1.

 The respective base electrodes of the two transistors T1 and T2 are connected to the terminals of the capacitor C1, and the respective collecting electrodes of said transistors are connected at P to an alarm system 16 constituted for example by an indicator light that lights up during detection. signal abenoe, as will be explained later.

 The operation of the absence of signal detection device 10 according to the invention is as follows.

In the presence of the digital signal corresponding to a series of equiprobable bits equal to 1 and to 0, the capacitor C1 charges and discharges identically as a function of the bits present, so that the capacitor C1 generates at its terminals a voltage V whose the average value is substantially zero throughout the duration of the presence of the digital signal,
Diagrams 2c and 3c represent as a function of time the voltage V generated at the terminals of the capacitor C1 (FIG. 1), whose mean value V m is equal to O volt during the presence of the digital signal, that is to say until time t1 in the example chosen.

 Thus, in the presence of the signal, the respective base emitter voltages of the two transistors T1 and T mounted in reverse are equal to O volt, so that the two transistors are in the off state.

Under these conditions, no current flows through the collecting electrodes of the two transistors T1 and T2, so that the alarm 16 does not trigger.

 It will be noted that advantageously the detection device 10 does not consume any current in the presence of a signal, because the two transistors of the fentr discriminator are in the off state.

 In the absence of a signal corresponding for example to a continuous series of bits equal to 0, as shown in diagram 2a, and occurring at time t1, the capacitor C1 discharges, so that the voltage V across said terminals capacitor exhibits attenuation taking a value less than the zero mean value Vm, as shown in diagram 2c.

 Thus, by discharging, the voltage V across the capacitor C1 reaches at point S the base-emitter voltage of the transistor T1 playing the role of given threshold, noted Vs1 on the diagram 2c and equal for example to -0.7 volts.

 In addition, when the weakening of the voltage V becomes less than the threshold Vsl, the transistor T1 becomes conductive while the transistor T2 mounted in reverse remains in the blocked state, so that only the transistor T1 generates a current in its electrode collector, noted I in FIG. 1. The current I therefore constitutes a current for detecting the absence of a digital signal, and controls the alarm 16 which is triggered to indicate the presence of a fault or defect in the equipment to be checked.

 Symmetrically, in the absence of -signal corresponding to a continuous series of bits equal to 1, as shown in diagram 3a, and occurring at time tl, the capacitor C1 charges, so that the voltage V across said capacitor has a loss taking a value greater than the zero mean value Vm, as shown in diagram 3c.

 Thus, by charging, the voltage V across the capacitor C1 reaches at point S 'the base voltage of the transistor T2 playing the role of given threshold, noted Vs2 on the diagram 3c and equal for example to +0.7 volts.

 In addition, when the weakening of the voltage V becomes greater than the threshold Vs2, the transistor T2 becomes conductive while the transistor T1 mounted in reverse remains in the blocked state, so that only the transistor T2 generates a current I (FIG. 1) in its collecting electrode. As before, this current I therefore constitutes a current for detecting the absence of a digital signal, and controls the alarm 16 which is triggered to indicate the presence of a fault or defect in the equipment to be checked.

 FIG. 4 represents, as a function of the output voltage of the integrator, the response of the window discriminator playing the role of detector of absence of signal.

 When the voltage V obtained by integration remains, as the case may be, above the given threshold VS1 or below the given threshold Vs2, the two transistors of the discriminator are in the off state, so that there is a signal. Similarly, when the voltage V takes the value m corresponding to the average value of the integrator, the two transistors of the discriminator are in the off state, so that there is also a signal.

 Thus, the interval between the two thresholds V51 and VS2 constitutes the window of the discriminator corresponding to the presence of signal.

 In the example chosen, the voltage V m is equal to O volt, and the thresholds and VS2 correspond to the respective base emitter voltages of the two transistors T1 and T2 and are respectively equal to -0.7 volt and +0.7 volt in the case where the two transistors are identical, so that the two thresholds VS1 and VS2 are arranged symmetrically with respect to the mean value Vm.

 As it appears in FIG. 4, when the voltage V obtained by integration becomes lower than the threshold VS1, only one of the two transistors of the discriminator conducts, so that there is no signal corresponding to a continuous series of equal bits to 0, as shown in diagram 2c.

 Similarly, when the voltage V obtained by integration becomes greater than the threshold Vs2, only one of the two transistors of the discriminator conducts, so that there is also no signal corresponding to a continuous series of bits equal to 1, as shown in diagram 3c.

 Of course, the invention is in no way limited to the embodiment described and shown and includes all the technical equivalents of the means described as well as their combinations if the latter are carried out according to the spirit of the invention and implemented in the The scope of the following claims.

Claims (8)

 1. Method for detecting the absence of digital signal (Q) constituted by a first series of bits equal to 1 and to O corresponding to the presence of signal and followed by a second continuous series of bits equal to 1 or to O corresponding to the absence of signai, characterized in that the process comprises the following stages:  an integration of the digital signal (Q) so as to provide a signal having a given substantially constant amplitude (V m> corresponding to the presence of signal and a loss corresponding to the absence of signal, said loss taking a value greater than that of constant amplitude when the absence of signal corresponds to a continuous series of bits equal to 1 and a value lower than that of the constant amplitude when the absence of signal corresponds to a continuous series of bits equal to O  - when the absence of signal corresponds to a continuous series of bits equal to 1, a comparison of the level of the signal obtained by integration at a given threshold (Vs2) greater than the substantially constant amplitude (Vm) 'thus making it possible to detect the absence of signal when the signal obtained by integration has a loss greater than the threshold;  - when the absence of signal corresponds to a continuous series of bits equal to 0, a comparison of the level of the signal obtained by integration at a given threshold (VS1) lower than the substantially constant amplitude (Vm), thus making it possible to detect l absence of signal when the signal obtained by integration has an attenuation below the threshold.  2. Method according to claim 1, characterized in that the series of bits corresponding to the presence of signal contains equiprobable 1's and O's.  3. Device for detecting the absence of a digital signal for implementing the method according to one of claims 1 or 2, the digital signal (Q) consisting of a first series of bits equal to 1 and to O corresponding to the presence of signal and followed by a second continuous series of bits equal to 1 or 0 corresponding to the absence of signal, characterized in that the device comprises:  - an integrator (12) of the digital signal (Q) and of its digital inverse (Q), delivering a voltage having, in the presence of the signal, a substantially constant and substantially zero amplitude constituting the average value (Vm) of the signal and its inverse, and in the absence of the signal, an attenuation taking a value greater than that of the constant amplitude when the absence of signal corresponds to a continuous series of bits equal to 1 and a value less than that of the constant amplitude when the absence of signal corresponds to a continuous series of bits equal to O ;; and  a window discriminator (14) detecting the weakening of the voltage obtained by integration in the absence of a signal, and comprising two given thresholds (Vs1, Vs2) located on either side of the substantially constant amplitude, the upper threshold (Vs2) to the constant amplitude being assigned to a continuous series of bits equal to 1 and the lower threshold (Vs1) to the constant amplitude being assigned to a continuous series of bits equal to O, so that the discriminator provides, for a continuous series of bits equal to 1, a signal for detecting the absence of a digital signal when the detected loss is greater than the corresponding threshold (Vs2), and for a continuous series of bits equal to O, a signal detection of the absence of a digital signal when the attenuation detected is less than the corresponding threshold (vs).  4. Device according to claim 3, characterized in that it further comprises an alarm (16) connected at the output of the window discriminator (14) and controlled by the signal for detecting the absence of digital signal, the alarm triggered in the presence of the detection signal.  5. Device according to one of claims 3 or 4, characterized in that the integrator comprises a first resistor (R1) connected to a first input terminal of the digital signal (Q), a second resistor (R2) connected to a second input terminal of the inverse of the digital signal (Q), and a capacitor (C1) connected between the first and the second resistors and at the terminals of which the voltage is generated having an amplitude substantially constant and substantially zero in the presence of signal and weakening in the absence of signal.  6. Device according to claim 5, characterized in that the window discriminator (14) comprises a first (T1) and a second (T2) transistors mounted in reverse, the base electrode of the first transistor being connected to the emitter electrode of the second transistor and to one of the terminals of the capacitor, and the base electrode of the second transistor being connected to the emitting electrode of the first transistor u re 'u'r terminal of the capacitor, and in that the two thresholds given ( Vsl, Vs2) are constituted by the respective base emitter voltages of the two transistors, so that for a continuous series of bits equal to 1, one of the transistors generates a collector current for a weakening greater than its base-emitter voltage, this current collector thus constituting the detection current (I) of the absence of signal, and for a continuous series of bits equal to 0, The other transistor generates a collector current for a weakening lower than its base-emitter voltage, this collector current thus constituting the detection current (I) of the absence of signal.  7. Device according to claim 6, characterized in that the two transistors (T1, T2) are identical, so that their respective base-emitter voltages are arranged symmetrically with respect to the substantially constant and substantially zero amplitude of the voltage provided by the integrator.  8. Use of a digital signal absence detection device as defined according to one of claims 3 to 7, characterized in that the device (10) is mounted in the transmitter module of a transmission system by optical fiber.