FR2509564A1 - Conducting layer interconnection process for multilayer PCB - has two overlapping conductors separated by insulating layer and connected by laser spot fusion - Google Patents
Conducting layer interconnection process for multilayer PCB - has two overlapping conductors separated by insulating layer and connected by laser spot fusion Download PDFInfo
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- FR2509564A1 FR2509564A1 FR8113473A FR8113473A FR2509564A1 FR 2509564 A1 FR2509564 A1 FR 2509564A1 FR 8113473 A FR8113473 A FR 8113473A FR 8113473 A FR8113473 A FR 8113473A FR 2509564 A1 FR2509564 A1 FR 2509564A1
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- printed circuit
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- 238000000034 method Methods 0.000 title claims abstract description 9
- 239000004020 conductor Substances 0.000 title claims description 22
- 230000004927 fusion Effects 0.000 title abstract description 3
- 229910052751 metal Inorganic materials 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 20
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims abstract description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 8
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052697 platinum Inorganic materials 0.000 claims abstract description 6
- 229910052709 silver Inorganic materials 0.000 claims abstract description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052737 gold Inorganic materials 0.000 claims abstract description 5
- 239000010931 gold Substances 0.000 claims abstract description 5
- 229910052763 palladium Inorganic materials 0.000 claims abstract description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 4
- 239000004332 silver Substances 0.000 claims abstract description 4
- 239000000919 ceramic Substances 0.000 claims abstract description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract 3
- 238000002844 melting Methods 0.000 claims abstract 2
- 230000008018 melting Effects 0.000 claims abstract 2
- 239000011521 glass Substances 0.000 claims description 10
- 150000002739 metals Chemical class 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 9
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims description 3
- 239000002241 glass-ceramic Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 238000003466 welding Methods 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 abstract description 7
- 239000002131 composite material Substances 0.000 abstract 2
- 238000007669 thermal treatment Methods 0.000 abstract 2
- 239000008187 granular material Substances 0.000 abstract 1
- 239000002245 particle Substances 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 7
- 239000000976 ink Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910000510 noble metal Inorganic materials 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 238000010411 cooking Methods 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000010944 silver (metal) Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005524 ceramic coating Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000002815 nickel Chemical class 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/485—Adaptation of interconnections, e.g. engineering charges, repair techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5382—Adaptable interconnections, e.g. for engineering changes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/12—Using specific substances
- H05K2203/128—Molten metals, e.g. casting thereof, or melting by heating and excluding molten solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Procédé de connexion électrique de fines couches métalliques ou vitrométalliques sur circuit sérigraphié multicouches.Method of electrical connection of thin metallic or vitrometallic layers on a multilayer screen printed circuit.
La présente invention concerne un circuit réalisé par la technique dite des "couches épaisses" sur un substrat isolant plan comportant au moins deux couches conductrices et/ou résistives superposées ainsi qu'un procédé de réalisation d'une connexion entre lesdites couches conductrices.The present invention relates to a circuit produced by the technique known as "thick layers" on a flat insulating substrate comprising at least two conductive and / or resistive layers superimposed as well as a method of producing a connection between said conductive layers.
Parmi les technologies modernes de réalisation de circuits électroniques, la technologie dite des "couches épaisses" a vu son champ d'application s'étendre considérablement entre les années 1960 et 1980. Développée en vue d'applications militaires ou spatiales, la technologie des couches épaisses est, en 1980, utilisée dans le domaine des applications commerciales grand public. Cette évolution n'a été possible que grâce à une adaptation réalisée sur les matériaux de base de cette technologie.Among modern technologies for producing electronic circuits, the so-called "thick film" technology saw its field of application expand considerably between the 1960s and 1980s. Developed for military or space applications, the technology of layers thick is, in 1980, used in the field of commercial consumer applications. This evolution was only possible thanks to an adaptation carried out on the basic materials of this technology.
C'est principalement sur les encres utilisées pour la sérigraphie des circuits (sur un substrat isolant plan) que les efforts de réduction des coflts et d'amélioration de la qualité ont été portés. Les toutes premières encres conductrices étaient fabriquées à partir de poudre d'or et de platine. En 1980, ces métaux sont remplacés par l'argent, moins cher, mais aussi par des métaux non nobles comme par exemple, le cuivre, le molybdène, le nickel, l'aluminium.It is mainly on the inks used for screen printing circuits (on a flat insulating substrate) that efforts to reduce costs and improve quality have been made. The very first conductive inks were made from gold powder and platinum. In 1980, these metals were replaced by cheaper silver, but also by non-noble metals such as, for example, copper, molybdenum, nickel, aluminum.
Les équipements nécessaires à la réalisation d'un circuit électronique en technologie des couches épaisses sont de conception relativement simple On distingue notamment, dans l'ordre de la ligne de fabrication 1 - une machine à sérigraphier 2 - un sécheur qui permet l'évaporation des solvants présents dans les
encres de sérigraphie 3 - un four de cuisson, dont la température maximale est comprise
entre 500 OC et 1 000 OC,
La cuisson peut se faire à l'air sec et dépoussiéré ou bien en
atmosphère réductrice contrôlée (azote pur ou azote/hydrogène) 4 - Un équipement de découpe des couches résistives qui permet l'ajus-
tage des valeurs ohmiques des résistances sérigraphiées.The equipment necessary for the realization of an electronic circuit in thick film technology is of relatively simple design. One distinguishes in particular, in the order of the manufacturing line 1 - a screen printing machine 2 - a dryer which allows the evaporation of solvents present in
screen printing inks 3 - a baking oven, the maximum temperature of which is included
between 500 OC and 1000 OC,
Cooking can be done in dry and dusted air or in
controlled reducing atmosphere (pure nitrogen or nitrogen / hydrogen) 4 - Equipment for cutting resistive layers which allows the adjustment
tage of the ohmic values of the screen-printed resistances.
Cet équipement est généralement structuré autour d'un laser dont
le faisceau réalise la découpe.This equipment is generally structured around a laser,
the beam performs the cut.
Les couches conductrices sérigraphiées sont, après traitement thermique au four, constituées de métaux purs, d'alliages de métaux, ou de mélanges de verres et de métaux. La cuisson des circuits sous atmosphère réductrice présente certains inconvénients. Cependant, la cuisson à l'air, c'est-à-dire en présence d'oxygène, est difficilement compatible avec les métaux non nobles car ceux-ci s'oxydent presque complètement -et deviennent isolants.The screen-printed conductive layers are, after heat treatment in an oven, made of pure metals, metal alloys, or mixtures of glasses and metals. Cooking circuits under a reducing atmosphere has certain drawbacks. However, cooking in air, that is to say in the presence of oxygen, is hardly compatible with non-noble metals because these oxidize almost completely - and become insulating.
Pour permettre la cuisson à l'air d'encres à base de métaux non nobles, des matériaux nouveaux ont été élaborés. Parmi ceux-ci, on trouve des mélanges de métaux et de verre, où le verre, en fort pourcentage, protège les grains métalliques de l'oxydation. Citons également les encres à base d'aluminium dont l'oxyde qui se forme en surface de la couche est imperméable et limite l'oxydation de manière acceptable.To allow air-based inks based on non-noble metals, new materials have been developed. Among these are mixtures of metals and glass, where glass, in high percentage, protects the metal grains from oxidation. Mention may also be made of aluminum-based inks whose oxide which forms on the surface of the layer is impermeable and limits oxidation in an acceptable manner.
Une conséquence directe de cette protection efficace contre 1 'oxyda- tion est l'impossibilité d'obtenir une connexion électrique entre la couche conductrice protégée et un deuxième conducteur. En effet, le verre ou les oxydes tels que l'alumine sont des isolants électriques.A direct consequence of this effective protection against oxidation is the impossibility of obtaining an electrical connection between the protected conductive layer and a second conductor. Indeed, glass or oxides such as alumina are electrical insulators.
La présente invention vise à résoudre cette difficulté et ainsi d'assurer une connexion électrique de bonne qualité entre un conducteur protégé par une couche d'isolant et un deuxième conducteur. The present invention aims to resolve this difficulty and thus ensure a good quality electrical connection between a conductor protected by an insulating layer and a second conductor.
L'invention s'applique à tout circuit réalisé en technologie des couches épaisses nécessitant au moins une soudure de ce type
A cet effet, l'invention a pour objet un circuit sérigraphié multicouches comportant un substrat en matière isolante sur lequel sont déposés par sérigraphie, puis traités thermiquement, au moins deux réseaux de conducteurs superposés suivant au moins deux niveaux, caractérisé en ce que ltépaisseur de chaque couche de conducteur est inférieure à 50 pm, en ce que le circuit comporte au moins un chevauchement direct de deux conducteurs, en ce que les deux conducteurs se chevauchant sont isolés électriquement l'un de l'autre par la présence d'une couche intermédiaire isolante résultant dudit traitement thermique, et en ce que les deux conducteurs sont connectés électriquement entre eux dans la zone du chevauchement par soudures en un ou plusieurs points au moyen d'un faisceau laser.The invention applies to any circuit produced in thick layer technology requiring at least one weld of this type.
To this end, the subject of the invention is a multilayer screen printed circuit comprising a substrate of insulating material on which are deposited by screen printing, then heat treated, at least two networks of conductors superimposed according to at least two levels, characterized in that the thickness of each layer of conductor is less than 50 μm, in that the circuit comprises at least a direct overlap of two conductors, in that the two overlapping conductors are electrically insulated from each other by the presence of a layer insulating intermediate resulting from said heat treatment, and in that the two conductors are electrically connected to each other in the region of the overlap by welds at one or more points by means of a laser beam.
L'invention a également pour objet un procédé de réalisation de la connexion électrique entre deux couches conductrices préalablement isolées, d'un circuit sérigraphié tel que défini ci-dessus, procédé caractérisé en ce que la connexion entre lesdites couches conductrices est réalisée par fusion rapide de celles-ci au moyen d'un faisceau laser.The invention also relates to a method of producing the electrical connection between two previously isolated conductive layers, of a screen printed circuit as defined above, process characterized in that the connection between said conductive layers is achieved by rapid fusion of these by means of a laser beam.
D'autres caractéristiques et avantages de l'invention ressortiront de la description qui va suivre de deux modes de sa réalisation donnés uniquement à titre d'exemple et illustrés par les dessins annexés sur lesquels - les Fig la et 2a sont des vues schématiques en coupe montrant res
pectivement deux configurations de circuits auxquels l'invention
est applicable - les Fig lb et 2b sont des vues schématiques en coupe correspondant
respectivement aux Fig la et 2a et montrant le résultat obtenu par
soudure au moyen d'un faisceau laser - la Fig 3 donne un exemple de struèture pour l'équipement nécessaire
au contrôle du faisceau laser ; et - la Fig 4 est une vue de dessus d'une partie d'un circuit pour lequel
l'invention est applicable
La Fig la montre, avant traitement par un faisceau laser, un substrat 1 en matériau isolant, sur la surface duquel ont été déposées au moins deux couches conductrices 2, 4 traitées thermiquement et dont l'épaisseur est inférieure à 50 sm. L'une au moins des couches conductrices est constituée d'un matériau à base d'un métal non noble comme, par exemple, le cuivre, le molybdène, ou l'aluminium. Un traitement thermique en atmosphère oxydante provoque l'apparition d'une couchedtoxyde métallique 3 et éventuellement d'une autre couche 5 d'oxyde métallique en surface. La couche 3 isole électriquement les deux conducteurs2 et 4.Other characteristics and advantages of the invention will emerge from the description which follows of two embodiments given solely by way of example and illustrated by the appended drawings in which - Figs la and 2a are schematic sectional views showing res
pectively two circuit configurations to which the invention
is applicable - Fig lb and 2b are schematic views in corresponding section
respectively in Fig la and 2a and showing the result obtained by
welding by means of a laser beam - Fig 3 gives an example of a structure for the necessary equipment
laser beam control; and - Fig 4 is a top view of part of a circuit for which
the invention is applicable
Fig shows, before treatment with a laser beam, a substrate 1 of insulating material, on the surface of which have been deposited at least two conductive layers 2, 4 heat treated and whose thickness is less than 50 sm. At least one of the conductive layers consists of a material based on a non-noble metal such as, for example, copper, molybdenum, or aluminum. A heat treatment in an oxidizing atmosphere causes the appearance of a metal oxide layer 3 and possibly of another layer of metal oxide on the surface. Layer 3 electrically insulates the two conductors 2 and 4.
En pratique, une telle disposition est rencontrée lorsque la couche 1 est une alumine à 96 %, la couche 2 à base d'aluminium, la couche 3 en oxyde d'aluminium Al203, et la couche 4 à base d'un ou plusieurs métaux de la série Ag, Pd, Pt, Au. Dans cet exemple, la couche 5 n'existe qu'à l'état de traces peu gênantes.In practice, such an arrangement is encountered when layer 1 is a 96% alumina, layer 2 based on aluminum, layer 3 in aluminum oxide Al 2 O 3, and layer 4 based on one or more metals. from the Ag, Pd, Pt, Au series. In this example, layer 5 only exists in the form of slightly annoying traces.
En se reportant à la Fig lb, un faisceau laser 6 focalisé provoque la fusion des couches métalliques 2 et 4 : l'impact thermique détruit la couche isolante 3 et permet le mélange des conducteurs# 2 et 4 La rapidité de l'opération garantit l'obtention d'un contact électrique entre les deux couches, en zone 7 sans formation de barrière isolante.Referring to FIG. 1b, a focused laser beam 6 causes the metal layers 2 and 4 to merge: the thermal impact destroys the insulating layer 3 and allows the conductors # 2 and 4 to be mixed. The speed of the operation guarantees the 'obtaining an electrical contact between the two layers, in zone 7 without forming an insulating barrier.
La Fig 2a montre, avant traitement par un faisceau laser, un deuxième exemple de configuration d'une partie d'un circuit pour lequel l'invention est également applicable. Sur cette vue en coupe, on distingue un substrat isolant Il sur lequel sont disposées deux couches conductrices 12 et 14 d'épaisseur inférieure à 50 Mm. La couche 12 est constituée d'un mélange de grains métalliques 13 et d'un verre ou d'une vitrocéramique enrobant les grains, les grains étant constitués principalement d'un ou plusieurs métaux de la série Nickel,
Molybdène, Aluminium, Cuivre. Dans cette composition, le verre protège les grains de lfoxydation lors du traitement thermique en atmosphère oxydante.La couche métallique 14 est éventuellement recouverte d'une couche d'oxyde 15 provoquée par le traitement thermique en présence d'oxygène.Fig 2a shows, before treatment with a laser beam, a second example of configuration of part of a circuit for which the invention is also applicable. In this sectional view, there is an insulating substrate II on which are arranged two conductive layers 12 and 14 of thickness less than 50 mm. The layer 12 consists of a mixture of metal grains 13 and a glass or d '' a glass ceramic coating the grains, the grains consisting mainly of one or more metals of the Nickel series,
Molybdenum, Aluminum, Copper. In this composition, the glass protects the grains from oxidation during the heat treatment in an oxidizing atmosphere. The metal layer 14 is optionally covered with an oxide layer 15 caused by the heat treatment in the presence of oxygen.
Un exemple précis d'une telle configuration est rencontré en pratique lorsque la couche il est un substrat en alumine à 96 m, la couche 12 est un mélange de grains de nickel 13 et d'un verre ou d'une vitrocéramique, la couche 14 est une couche conductrice à base d'un ou plusieurs métaux de la série Ag, Pd, Pt, Au, où la couche 5 est pratiquement inexistante. La présence d'une forte proportion de matériau vitrifiant dans la couche 12 se traduit au moment du traitement thermique par la formation d'une couche de verre pur en surface qui isole électriquement les couches 12 et 14
La Fig 2b illustre l'action de l'impact thermique du faisceau laser 16 dans la zone 17, comme décrit à propos de la Fig lb.A precise example of such a configuration is encountered in practice when the layer II is an alumina substrate at 96 m, the layer 12 is a mixture of nickel grains 13 and of a glass or a ceramic glass, the layer 14 is a conductive layer based on one or more metals from the Ag, Pd, Pt, Au series, where layer 5 is practically non-existent. The presence of a high proportion of vitrifying material in layer 12 is reflected during the heat treatment by the formation of a layer of pure glass on the surface which electrically insulates layers 12 and 14
FIG. 2b illustrates the action of the thermal impact of the laser beam 16 in the area 17, as described in connection with FIG. 1b.
Dans cette seconde configuration des Fig 2a et 2b, la couche inférieure 12 peut former une résistance dont les extrémités sont recouvertes du conducteur supérieur 14, la connexion électrique étant réalisée en au moins un point à chaque extrémité de la résistance.In this second configuration of Figs 2a and 2b, the lower layer 12 can form a resistor whose ends are covered with the upper conductor 14, the electrical connection being made at at least one point at each end of the resistor.
La Fig 3 illustre schématiquement la structure du dispositif permettant le contrôle du faisceau laser, nécessaire à l'obtention du contact électrique recherché. Cet appareil est un équipement standarden technologie des couches épaisses et comprend un bloc 22 contenant le tube laser, qui est généralement un laser pulsé, alimenté électriquement par un bloc 21 et commandé par un bloc 24 De préférence, le faisceau laser est un faisceau pulsé de longueur d'onde comprise entre 0,5 et 2 pm La focalisation et la déflexion du faisceau laser sontobtenuesaumoyend'un dispositif optique 23 commandé par le bloc 24. FIG. 3 schematically illustrates the structure of the device allowing the control of the laser beam, necessary for obtaining the desired electrical contact. This device is standard equipment in thick film technology and comprises a block 22 containing the laser tube, which is generally a pulsed laser, electrically powered by a block 21 and controlled by a block 24 Preferably, the laser beam is a pulsed beam of wavelength between 0.5 and 2 μm The focusing and deflection of the laser beam are obtained by means of an optical device 23 controlled by the block 24.
En fonctionnement, le faisceau laser focalisé 25 est dirigé sur le point choisi du circuit 26, maintenu en place par le porte-circuit 27 qui est éventuellement mobile et commandé par le bloc 24. In operation, the focused laser beam 25 is directed to the chosen point of the circuit 26, held in place by the circuit holder 27 which is possibly mobile and controlled by the block 24.
La Fig 4 est une vue de dessus montrant un exemple de disposition des différentes couches décrites en regard des Fig la, lb et 2a, 2b. Cette vue montre les couches conductrices inférieure 32 et supérieure 34 déposées sur un substrat isolant 31. Le traitement par faisceau laser permettant d'obtenir un contact électrique entre les couches 32 et 34 peut être fait en un ou plusieurs points 33. Fig 4 is a top view showing an example of arrangement of the different layers described with reference to Fig la, lb and 2a, 2b. This view shows the lower 32 and upper 34 conductive layers deposited on an insulating substrate 31. The laser beam treatment enabling electrical contact to be obtained between the layers 32 and 34 can be done at one or more points 33.
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR8113473A FR2509564A1 (en) | 1981-07-09 | 1981-07-09 | Conducting layer interconnection process for multilayer PCB - has two overlapping conductors separated by insulating layer and connected by laser spot fusion |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR8113473A FR2509564A1 (en) | 1981-07-09 | 1981-07-09 | Conducting layer interconnection process for multilayer PCB - has two overlapping conductors separated by insulating layer and connected by laser spot fusion |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2509564A1 true FR2509564A1 (en) | 1983-01-14 |
| FR2509564B1 FR2509564B1 (en) | 1985-02-01 |
Family
ID=9260372
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR8113473A Granted FR2509564A1 (en) | 1981-07-09 | 1981-07-09 | Conducting layer interconnection process for multilayer PCB - has two overlapping conductors separated by insulating layer and connected by laser spot fusion |
Country Status (1)
| Country | Link |
|---|---|
| FR (1) | FR2509564A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3014283A1 (en) * | 2013-12-02 | 2015-06-05 | Delphi France Sas | METHOD FOR MANUFACTURING A POWER PRINTED CIRCUIT AND PRINTED POWER CIRCUIT OBTAINED BY THIS METHOD. |
-
1981
- 1981-07-09 FR FR8113473A patent/FR2509564A1/en active Granted
Non-Patent Citations (2)
| Title |
|---|
| EXBK/78 * |
| EXBK/80 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3014283A1 (en) * | 2013-12-02 | 2015-06-05 | Delphi France Sas | METHOD FOR MANUFACTURING A POWER PRINTED CIRCUIT AND PRINTED POWER CIRCUIT OBTAINED BY THIS METHOD. |
| WO2015082267A1 (en) * | 2013-12-02 | 2015-06-11 | Delphi France Sas | Method for producing a power printed circuit and power printed circuit obtained by this method |
| US9681537B2 (en) | 2013-12-02 | 2017-06-13 | Delphi France Sas | Method for producing a power printed circuit and power printed circuit obtained by this method |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2509564B1 (en) | 1985-02-01 |
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